1. 40061ac sifive_uart: Implement interrupt pending register by Nathaniel Graff · 6 years ago
  2. 194eef0 RISC-V: Enable second UART on sifive_e and sifive_u by Michael Clark · 6 years ago
  3. e41848e RISC-V: Fix PLIC pending bitfield reads by Michael Clark · 6 years ago
  4. ef9e41d RISC-V: Fix CLINT timecmp low 32-bit writes by Michael Clark · 6 years ago
  5. 6c60757 sifive_u: Set 'clock-frequency' DT property for SiFive UART by Anup Patel · 6 years ago
  6. fe93582 sifive_u: Add clock DT node for GEM ethernet by Anup Patel · 6 years ago
  7. 6d56e39 hw/riscv/virt: Connect the gpex PCIe by Alistair Francis · 6 years ago
  8. bb1973a hw/riscv/virt: Adjust memory layout spacing by Alistair Francis · 6 years ago
  9. 632fb27 hw/riscv/virt: Free the test device tree node name by Alistair Francis · 6 years ago
  10. 00a014a riscv: spike: Fix memory leak in the board init by Alistair Francis · 6 years ago
  11. 7c28f4d RISC-V: Don't add NULL bootargs to device-tree by Michael Clark · 7 years ago
  12. b6aa6ce RISC-V: Add missing free for plic_hart_config by Michael Clark · 7 years ago
  13. 85ba724 RISC-V: Allow setting and clearing multiple irqs by Michael Clark · 7 years ago
  14. 2f831d0 Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into staging by Peter Maydell · 6 years ago
  15. 371b74e Drop "qemu:" prefix from error_report() arguments by Mao Zhongyi · 6 years ago
  16. 117caac hw/riscv/spike: Set the soc device tree node as a simple-bus by Alistair Francis · 6 years ago
  17. 53f5450 hw/riscv/virtio: Set the soc device tree node as a simple-bus by Alistair Francis · 7 years ago
  18. d78940e RISC-V: Use atomic_cmpxchg to update PLIC bitmaps by Michael Clark · 7 years ago
  19. 8ff62f6 spike: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  20. 5657c3f riscv_hart: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  21. a993cb1 virt: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  22. 4eea9d7 sifive_u: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  23. 54f3141 sifive_e: Fix crash when introspecting the device by Alistair Francis · 7 years ago
  24. 5a7f76a hw/riscv/sifive_u: Connect the Cadence GEM Ethernet device by Alistair Francis · 7 years ago
  25. bde3ab9 hw/riscv/sifive_u: Move the uart device tree node under /soc/ by Alistair Francis · 7 years ago
  26. 98ceee7 hw/riscv/sifive_u: Set the interrupt controller number of interrupts by Alistair Francis · 7 years ago
  27. 2a1a6f6 hw/riscv/sifive_u: Set the soc device tree node as a simple-bus by Alistair Francis · 7 years ago
  28. 647a70a hw/riscv/sifive_plic: Use gpios instead of irqs by Alistair Francis · 7 years ago
  29. 651cd8b hw/riscv/sifive_e: Create a SiFive E SoC object by Alistair Francis · 7 years ago
  30. 2308092 hw/riscv/sifive_u: Create a SiFive U SoC object by Alistair Francis · 7 years ago
  31. 4bf46af hw/riscv: Use the IEC binary prefix definitions by Philippe Mathieu-Daudé · 7 years ago
  32. ab72827 hw: Do not include "exec/address-spaces.h" if it is not necessary by Philippe Mathieu-Daudé · 7 years ago
  33. a8a94ef Merge remote-tracking branch 'remotes/riscv/tags/riscv-qemu-2.13-minor-fixes-3' into staging by Peter Maydell · 7 years ago
  34. 6fad7d1 riscv: htif: increase the priority of the htif subregion by KONRAD Frederic · 7 years ago
  35. 17b9751 riscv: spike: allow base == 0 by KONRAD Frederic · 7 years ago
  36. 5aec324 RISC-V: Mark ROM read-only after copying in code by Michael Clark · 7 years ago
  37. 8985480 RISC-V: Remove EM_RISCV ELF_MACHINE indirection by Michael Clark · 7 years ago
  38. 42b3a4b RISC-V: Remove unused class definitions by Michael Clark · 7 years ago
  39. b793898 RISC-V: Remove identity_translate from load_elf by Michael Clark · 7 years ago
  40. 6b01e32 RISC-V: Use ROM base address and size from memmap by Michael Clark · 7 years ago
  41. 77ff5bb RISC-V: Make virt board description match spike by Michael Clark · 7 years ago
  42. 2a8756e RISC-V: Replace hardcoded constants with enum values by Michael Clark · 7 years ago
  43. 9bca0ed Change references to serial_hds[] to serial_hd() by Peter Maydell · 7 years ago
  44. 25fa194 RISC-V Build Infrastructure by Michael Clark · 7 years ago
  45. a7240d1 SiFive Freedom U Series RISC-V Machine by Michael Clark · 7 years ago
  46. eb637ed SiFive Freedom E Series RISC-V Machine by Michael Clark · 7 years ago
  47. e6b8552 SiFive RISC-V PRCI Block by Michael Clark · 7 years ago
  48. bb72692 SiFive RISC-V UART Device by Michael Clark · 7 years ago
  49. 04331d0 RISC-V VirtIO Machine by Michael Clark · 7 years ago
  50. 88a0799 SiFive RISC-V Test Finisher by Michael Clark · 7 years ago
  51. 5b4beba RISC-V Spike Machines by Michael Clark · 7 years ago
  52. 1e24429 SiFive RISC-V PLIC Block by Michael Clark · 7 years ago
  53. 1c77c41 SiFive RISC-V CLINT Block by Michael Clark · 7 years ago
  54. 4b50b8d RISC-V HART Array by Michael Clark · 7 years ago
  55. 5033606 RISC-V HTIF Console by Michael Clark · 7 years ago