commit | 88a07990fa282e4b63845223e90d759ef6811264 | [log] [tgz] |
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author | Michael Clark <mjc@sifive.com> | Sat Mar 03 01:31:13 2018 +1300 |
committer | Michael Clark <mjc@sifive.com> | Wed Mar 07 08:30:28 2018 +1300 |
tree | 3d121bfa1fed1621a26b69f9534d7353c1509e5e | |
parent | 5b4beba1246ff163415bde41cd76935012b16823 [diff] |
SiFive RISC-V Test Finisher Test finisher memory mapped device used to exit simulation. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>