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qemu / qemu / 38bc4e34f29b913d28a8d2abcf2bf74a4a4a816e / target / riscv
  1. 1da4601 target/riscv: Fix implementation of HLVX.WU instruction by Georg Kotheimer · 4 years, 5 months ago
  2. 4aeb9e2 target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interrupt by Georg Kotheimer · 4 years, 5 months ago
  3. ace5445 target/riscv: Fix update of hstatus.SPVP by Georg Kotheimer · 4 years, 5 months ago
  4. 6943011 riscv: Convert interrupt logs to use qemu_log_mask() by Alistair Francis · 4 years, 5 months ago
  5. 8191d36 icount: rename functions to be consistent with the module name by Claudio Fontana · 4 years, 6 months ago
  6. 740b175 cpu-timers, icount: new modules by Claudio Fontana · 4 years, 7 months ago
  7. d73415a qemu/atomic.h: rename atomic_ to qatomic_ by Stefan Hajnoczi · 4 years, 5 months ago
  8. 30b5707 qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros by Eduardo Habkost · 4 years, 6 months ago
  9. 5de5b99 target/riscv: Set instance_align on RISCVCPU TypeInfo by Richard Henderson · 4 years, 6 months ago
  10. f00f57f Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging by Peter Maydell · 4 years, 6 months ago
  11. f4ef8c9 Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging by Peter Maydell · 4 years, 6 months ago
  12. a47ef6e hw/riscv: clint: Avoid using hard-coded timebase frequency by Bin Meng · 4 years, 6 months ago
  13. 73f6ed9 target/riscv: cpu: Set reset vector based on the configured property value by Bin Meng · 4 years, 6 months ago
  14. 9b4c9b2 target/riscv: cpu: Add a new 'resetvec' property by Bin Meng · 4 years, 6 months ago
  15. c51a3f5 target/riscv: Fix bug in getting trap cause name for trace_riscv_trap by Yifei Jiang · 4 years, 7 months ago
  16. b15e402 trace-events: Fix attribution of trace points to source by Markus Armbruster · 4 years, 7 months ago
  17. c821774a Use OBJECT_DECLARE_TYPE where possible by Eduardo Habkost · 4 years, 6 months ago
  18. 8110fa1 Use DECLARE_*CHECKER* macros by Eduardo Habkost · 4 years, 6 months ago
  19. db1015e Move QOM typedefs and add missing includes by Eduardo Habkost · 4 years, 6 months ago
  20. dd20502 softfloat: Implement the full set of comparisons for float16 by Kito Cheng · 4 years, 7 months ago
  21. e39a832 target/riscv: Support the Virtual Instruction fault by Alistair Francis · 4 years, 7 months ago
  22. 57cb208 target/riscv: Return the exception from invalid CSR accesses by Alistair Francis · 4 years, 7 months ago
  23. 8302809 target/riscv: Support the v0.6 Hypervisor extension CRSs by Alistair Francis · 4 years, 7 months ago
  24. 30f663b target/riscv: Only support little endian guests by Alistair Francis · 4 years, 7 months ago
  25. f8dc878 target/riscv: Only support a single VSXL length by Alistair Francis · 4 years, 7 months ago
  26. 543ba53 target/riscv: Update the CSRs to the v0.6 Hyp extension by Alistair Francis · 4 years, 7 months ago
  27. f2d5850 target/riscv: Update the Hypervisor trap return/entry by Alistair Francis · 4 years, 7 months ago
  28. 84b1c04 target/riscv: Fix the interrupt cause code by Alistair Francis · 4 years, 7 months ago
  29. 9034e90 target/riscv: Convert MSTATUS MTL to GVA by Alistair Francis · 4 years, 7 months ago
  30. e2eb5ca target/riscv: Don't allow guest to write to htinst by Alistair Francis · 4 years, 7 months ago
  31. 29b3361 target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructions by Alistair Francis · 4 years, 7 months ago
  32. 8c5362a target/riscv: Allow generating hlv/hlvx/hsv instructions by Alistair Francis · 4 years, 7 months ago
  33. 5a894dd target/riscv: Allow setting a two-stage lookup in the virt status by Alistair Francis · 4 years, 7 months ago
  34. af3fc19 target/riscv: Change the TLB page size depends on PMP entries. by Zong Li · 4 years, 7 months ago
  35. 9ef8211 target/riscv: Fix the translation of physical address by Zong Li · 4 years, 7 months ago
  36. fdd33b8 riscv: Fix bug in setting pmpcfg CSR for RISCV64 by Hou Weiying · 4 years, 7 months ago
  37. ec80f87 target/riscv: check before allocating TCG temps by LIU Zhiwei · 4 years, 7 months ago
  38. 6e0229e target/riscv: Clean up fmv.w.x by LIU Zhiwei · 4 years, 7 months ago
  39. ffe70e4 target/riscv: Check nanboxed inputs in trans_rvf.inc.c by Richard Henderson · 4 years, 7 months ago
  40. 00e925c target/riscv: Check nanboxed inputs to fp helpers by Richard Henderson · 4 years, 7 months ago
  41. 40eaa47 target/riscv: Generate nanboxed results from trans_rvf.inc.c by Richard Henderson · 4 years, 7 months ago
  42. d36a86d target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s by Richard Henderson · 4 years, 7 months ago
  43. 9921e3d target/riscv: Generate nanboxed results from fp helpers by Richard Henderson · 4 years, 7 months ago
  44. abff1ab meson: target by Paolo Bonzini · 4 years, 7 months ago
  45. 139c183 meson: rename included C source files to .c.inc by Paolo Bonzini · 5 years ago
  46. 243af02 trace: switch position of headers to what Meson requires by Paolo Bonzini · 5 years ago
  47. 35c7f52 target/riscv/vector_helper: Fix build on 32-bit big endian hosts by Thomas Huth · 4 years, 7 months ago
  48. 8ba26b0 target/riscv: Fix the range of pmpcfg of CSR funcion table by Zong Li · 4 years, 8 months ago
  49. 3e09396 target/riscv: fix vector index load/store constraints by LIU Zhiwei · 4 years, 8 months ago
  50. eabfeb0 target/riscv: Quiet Coverity complains about vamo* by LIU Zhiwei · 4 years, 8 months ago
  51. cfad709 target/riscv: Fix pmp NA4 implementation by Alexandre Mergnat · 4 years, 8 months ago
  52. fbcbafa target/riscv: fix vill bit index in vtype register by Frank Chang · 4 years, 8 months ago
  53. a69f97c target/riscv: fix return value of do_opivx_widen() by Frank Chang · 4 years, 8 months ago
  54. 1989205 target/riscv: correct the gvec IR called in gen_vec_rsub16_i64() by Frank Chang · 4 years, 8 months ago
  55. 7acafcf target/riscv: fix rsub gvec tcg_assert_listed_vecop assertion by Frank Chang · 4 years, 8 months ago
  56. 6bf9161 target/riscv: configure and turn on vector extension from command line by LIU Zhiwei · 4 years, 8 months ago
  57. 31bf42a target/riscv: vector compress instruction by LIU Zhiwei · 4 years, 8 months ago
  58. e4b83d5 target/riscv: vector register gather instruction by LIU Zhiwei · 4 years, 8 months ago
  59. ec17e03 target/riscv: vector slide instructions by LIU Zhiwei · 4 years, 8 months ago
  60. 2843420 target/riscv: floating-point scalar move instructions by LIU Zhiwei · 4 years, 8 months ago
  61. 9fc08be target/riscv: integer scalar move instruction by LIU Zhiwei · 4 years, 8 months ago
  62. 90355f3 target/riscv: integer extract instruction by LIU Zhiwei · 4 years, 8 months ago
  63. 126bec3 target/riscv: vector element index instruction by LIU Zhiwei · 4 years, 8 months ago
  64. 78d90cf target/riscv: vector iota instruction by LIU Zhiwei · 4 years, 8 months ago
  65. 81fbf7d target/riscv: set-X-first mask bit by LIU Zhiwei · 4 years, 8 months ago
  66. 0db67e1 target/riscv: vmfirst find-first-set mask bit by LIU Zhiwei · 4 years, 8 months ago
  67. 2e88f55 target/riscv: vector mask population count vmpopc by LIU Zhiwei · 4 years, 8 months ago
  68. c21f34a target/riscv: vector mask-register logical instructions by LIU Zhiwei · 4 years, 8 months ago
  69. 696b0c2 target/riscv: vector widening floating-point reduction instructions by LIU Zhiwei · 4 years, 8 months ago
  70. 523547f target/riscv: vector single-width floating-point reduction instructions by LIU Zhiwei · 4 years, 8 months ago
  71. bba7182 target/riscv: vector wideing integer reduction instructions by LIU Zhiwei · 4 years, 8 months ago
  72. fe5c9ab target/riscv: vector single-width integer reduction instructions by LIU Zhiwei · 4 years, 8 months ago
  73. 878d406 target/riscv: narrowing floating-point/integer type-convert instructions by LIU Zhiwei · 4 years, 8 months ago
  74. 4514b7b target/riscv: widening floating-point/integer type-convert instructions by LIU Zhiwei · 4 years, 8 months ago
  75. 9210097 target/riscv: vector floating-point/integer type-convert instructions by LIU Zhiwei · 4 years, 8 months ago
  76. 64ab584 target/riscv: vector floating-point merge instructions by LIU Zhiwei · 4 years, 8 months ago
  77. 121ddbb target/riscv: vector floating-point classify instructions by LIU Zhiwei · 4 years, 8 months ago
  78. 2a68e9e target/riscv: vector floating-point compare instructions by LIU Zhiwei · 4 years, 8 months ago
  79. 1d426b8 target/riscv: vector floating-point sign-injection instructions by LIU Zhiwei · 4 years, 8 months ago
  80. 230b53d target/riscv: vector floating-point min/max instructions by LIU Zhiwei · 4 years, 8 months ago
  81. d9e4ce7 target/riscv: vector floating-point square-root instruction by LIU Zhiwei · 4 years, 8 months ago
  82. 0dd5095 target/riscv: vector widening floating-point fused multiply-add instructions by LIU Zhiwei · 4 years, 8 months ago
  83. 4aa5a8f target/riscv: vector single-width floating-point fused multiply-add instructions by LIU Zhiwei · 4 years, 8 months ago
  84. f7c7b7c target/riscv: vector widening floating-point multiply by LIU Zhiwei · 4 years, 8 months ago
  85. 0e0057c target/riscv: vector single-width floating-point multiply/divide instructions by LIU Zhiwei · 4 years, 8 months ago
  86. eeffab2 target/riscv: vector widening floating-point add/subtract instructions by LIU Zhiwei · 4 years, 8 months ago
  87. ce2a034 target/riscv: vector single-width floating-point add/subtract instructions by LIU Zhiwei · 4 years, 8 months ago
  88. 9ff3d28 target/riscv: vector narrowing fixed-point clip instructions by LIU Zhiwei · 4 years, 8 months ago
  89. 04a6140 target/riscv: vector single-width scaling shift instructions by LIU Zhiwei · 4 years, 8 months ago
  90. 0a1eaf0 target/riscv: vector widening saturating scaled multiply-add by LIU Zhiwei · 4 years, 8 months ago
  91. 9f0ff9e target/riscv: vector single-width fractional multiply with rounding and saturation by LIU Zhiwei · 4 years, 8 months ago
  92. b7aee48 target/riscv: vector single-width averaging add and subtract by LIU Zhiwei · 4 years, 8 months ago
  93. eb2650e target/riscv: vector single-width saturating add and subtract by LIU Zhiwei · 4 years, 8 months ago
  94. f020a7a target/riscv: vector integer merge and move instructions by LIU Zhiwei · 4 years, 8 months ago
  95. 2b587b3 target/riscv: vector widening integer multiply-add instructions by LIU Zhiwei · 4 years, 8 months ago
  96. 54df813 target/riscv: vector single-width integer multiply-add instructions by LIU Zhiwei · 4 years, 8 months ago
  97. 97b1cba target/riscv: vector widening integer multiply instructions by LIU Zhiwei · 4 years, 8 months ago
  98. 85e6658 target/riscv: vector integer divide instructions by LIU Zhiwei · 4 years, 8 months ago
  99. 958b85f target/riscv: vector single-width integer multiply instructions by LIU Zhiwei · 4 years, 8 months ago
  100. 558fa77 target/riscv: vector integer min/max instructions by LIU Zhiwei · 4 years, 8 months ago