| commit | fbcbafa2c1c33ae6630e7717f7f4141befb5b31a | [log] [tgz] |
|---|---|---|
| author | Frank Chang <frank.chang@sifive.com> | Fri Jul 10 18:48:18 2020 +0800 |
| committer | Alistair Francis <alistair.francis@wdc.com> | Mon Jul 13 17:25:37 2020 -0700 |
| tree | a91a4fa832380d21ccfae7bae7760e2769e32e94 | |
| parent | a69f97c1110205bc173657c77ce2d16877cad683 [diff] |
target/riscv: fix vill bit index in vtype register vill bit is at vtype[XLEN-1]. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200710104920.13550-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>