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qemu / qemu / 0bd0c44372868432c6bde5b0022974f65241f105 / target / openrisc
  1. 9e3bab0 target/openrisc: Update cpu "any" to v1.3 by Richard Henderson · 6 years ago
  2. 3e0e41e target/openrisc: Implement l.adrp by Richard Henderson · 6 years ago
  3. a465772 target/openrisc: Implement move to/from FPCSR by Richard Henderson · 6 years ago
  4. 2b13b4b target/openrisc: Implement unordered fp comparisons by Richard Henderson · 6 years ago
  5. 62f2b03 target/openrisc: Add support for ORFPX64A32 by Richard Henderson · 6 years ago
  6. fe636d3 target/openrisc: Check CPUCFG_OF32S for float insns by Richard Henderson · 6 years ago
  7. 091a351 target/openrisc: Fix lf.ftoi.s by Richard Henderson · 6 years ago
  8. 8bebf7d target/openrisc: Add VR2 and AVR special processor registers by Richard Henderson · 6 years ago
  9. c7efab4 target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init by Richard Henderson · 6 years ago
  10. b72e3ff target/openrisc: Make VR and PPC read-only by Richard Henderson · 6 years ago
  11. d29f436 target/openrisc: Cache R0 in DisasContext by Richard Henderson · 6 years ago
  12. 8bba761 target/openrisc: Replace cpu register array with a function by Richard Henderson · 6 years ago
  13. cdd0f45 target/openrisc: Add DisasContext parameter to check_r0_write by Richard Henderson · 6 years ago
  14. 14776ab tcg: TCGMemOp is now accelerator independent MemOp by Tony Nguyen · 6 years ago
  15. 2e5b09f hw/core: Move cpu.c, cpu.h from qom/ to hw/core/ by Markus Armbruster · 6 years ago
  16. 12e9493 Include hw/boards.h a bit less by Markus Armbruster · 6 years ago
  17. 650d103 Include hw/hw.h exactly where needed by Markus Armbruster · 6 years ago
  18. 8a9358c migration: Move the VMStateDescription typedef to typedefs.h by Markus Armbruster · 6 years ago
  19. 5cc8767 general: Replace global smp variables with smp machine properties by Like Xu · 6 years ago
  20. a8d2532 Include qemu-common.h exactly where needed by Markus Armbruster · 6 years ago
  21. e8b5fae cpu: Remove CPU_COMMON by Richard Henderson · 6 years ago
  22. 5b146dc cpu: Introduce CPUNegativeOffsetState by Richard Henderson · 6 years ago
  23. 7506ed9 cpu: Introduce cpu_set_cpustate_pointers by Richard Henderson · 6 years ago
  24. 677c4d6 cpu: Move ENV_OFFSET to exec/gen-icount.h by Richard Henderson · 6 years ago
  25. 5ee2b02 target/openrisc: Use env_cpu, env_archcpu by Richard Henderson · 6 years ago
  26. 29a0af6 cpu: Replace ENV_GET_CPU with env_cpu by Richard Henderson · 6 years ago
  27. 2161a61 cpu: Define ArchCPU by Richard Henderson · 6 years ago
  28. 4f7c64b cpu: Define CPUArchState with typedef by Richard Henderson · 6 years ago
  29. 74433bf tcg: Split out target/arch/cpu-param.h by Richard Henderson · 6 years ago
  30. c319dc1 tcg: Use CPUClass::tlb_fill in cputlb.c by Richard Henderson · 6 years ago
  31. 35e911a target/openrisc: Convert to CPUClass::tlb_fill by Richard Henderson · 6 years ago
  32. 198a2d2 target/openrisc: Fix LGPL information in the file headers by Thomas Huth · 6 years ago
  33. 8b86d6d tcg: Hoist max_insns computation to tb_gen_code by Richard Henderson · 6 years ago
  34. 3979fca disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h by Markus Armbruster · 6 years ago
  35. 90c84c5 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints by Markus Armbruster · 6 years ago
  36. 0442428 target: Simplify how the TARGET_cpu_list() print by Markus Armbruster · 6 years ago
  37. 779fc6a target/openrisc: Fix LGPL version number by Thomas Huth · 6 years ago
  38. 03fee66 vmstate: constify VMStateField by Marc-André Lureau · 6 years ago
  39. 3a7be55 decodetree: Remove "insn" argument from trans_* expanders by Richard Henderson · 6 years ago
  40. dfc8474 target/openrisc: Fix writes to interrupt mask register by Stafford Horne · 7 years ago
  41. 9f6e8af target/openrisc: Fix delay slot exception flag to match spec by Stafford Horne · 7 years ago
  42. e8f2904 linux-user: Implement signals for openrisc by Richard Henderson · 7 years ago
  43. f065542 target/openrisc: Reorg tlb lookup by Richard Henderson · 7 years ago
  44. 1cc9e5d target/openrisc: Increase the TLB size by Richard Henderson · 7 years ago
  45. 5ce5dad target/openrisc: Stub out handle_mmu_fault for softmmu by Richard Henderson · 7 years ago
  46. 56c3a14 target/openrisc: Use identical sizes for ITLB and DTLB by Richard Henderson · 7 years ago
  47. b9bed1b target/openrisc: Fix cpu_mmu_index by Richard Henderson · 7 years ago
  48. fffde66 target/openrisc: Fix tlb flushing in mtspr by Richard Henderson · 7 years ago
  49. 2acaa23 target/openrisc: Reduce tlb to a single dimension by Richard Henderson · 7 years ago
  50. fd992ee target/openrisc: Merge mmu_helper.c into mmu.c by Richard Henderson · 7 years ago
  51. 23d45eb target/openrisc: Remove indirect function calls for mmu by Richard Henderson · 7 years ago
  52. 455d45d target/openrisc: Merge tlb allocation into CPUOpenRISCState by Richard Henderson · 7 years ago
  53. c28fa81 target/openrisc: Form the spr index from tcg by Richard Henderson · 7 years ago
  54. 01ec3ec target/openrisc: Exit the TB after l.mtspr by Richard Henderson · 7 years ago
  55. 2ba6541 target/openrisc: Split out is_user by Richard Henderson · 7 years ago
  56. 8000ba5 target/openrisc: Link more translation blocks by Richard Henderson · 7 years ago
  57. e0a369c target/openrisc: Fix singlestep_enabled by Richard Henderson · 7 years ago
  58. 64e46c9 target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB by Richard Henderson · 7 years ago
  59. c86395c target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP by Richard Henderson · 7 years ago
  60. 378cd36 target/openrisc: Log interrupts by Richard Henderson · 7 years ago
  61. d5cabcc target/openrisc: Add print_insn_or1k by Richard Henderson · 7 years ago
  62. c3513c8 target/openrisc: Fix mtspr shadow gprs by Richard Henderson · 7 years ago
  63. 1636705 Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into staging by Peter Maydell · 7 years ago
  64. 07ea28b tcg: Pass tb and index to tcg_gen_exit_tb separately by Richard Henderson · 7 years ago
  65. 23c11b0 target: Do not include "exec/exec-all.h" if it is not necessary by Philippe Mathieu-Daudé · 7 years ago
  66. c7b6f54 target/openrisc: Merge disas_openrisc_insn by Richard Henderson · 7 years ago
  67. 6fd204a target/openrisc: Convert dec_float by Richard Henderson · 7 years ago
  68. 032de4f target/openrisc: Convert dec_compi by Richard Henderson · 7 years ago
  69. fbb3e29 target/openrisc: Convert dec_comp by Richard Henderson · 7 years ago
  70. e720a57 target/openrisc: Convert dec_M by Richard Henderson · 7 years ago
  71. e20c259 target/openrisc: Convert dec_logic by Richard Henderson · 7 years ago
  72. 99d863d target/openrisc: Convert dec_mac by Richard Henderson · 7 years ago
  73. 6ad216a target/openrisc: Convert dec_calc by Richard Henderson · 7 years ago
  74. 8816f70 target/openrisc: Convert remainder of dec_misc insns by Richard Henderson · 7 years ago
  75. d80bff1 target/openrisc: Convert memory insns by Richard Henderson · 7 years ago
  76. 136e13a target/openrisc: Convert branch insns by Richard Henderson · 7 years ago
  77. 7de9729 target/openrisc: Start conversion to decodetree.py by Richard Henderson · 7 years ago
  78. 4e2d300 target-openrisc: Write back result before FPE exception by Richard Henderson · 10 years ago
  79. a4fd3ec target/openrisc: convert to TranslatorOps by Emilio G. Cota · 7 years ago
  80. 1ffa4bc target/openrisc: convert to DisasContextBase by Emilio G. Cota · 7 years ago
  81. afd46fc icount: fix cpu_restore_state_from_tb for non-tb-exit cases by Pavel Dovgalyuk · 7 years ago
  82. 3f71e72 cpu: get rid of unused cpu_init() defines by Igor Mammedov · 7 years ago
  83. 0dacec8 cpu: add CPU_RESOLVING_TYPE macro by Igor Mammedov · 7 years ago
  84. 24f91e8 target/*/cpu.h: remove softfloat.h by Alex Bennée · 7 years ago
  85. bf85388 qdev: use device_class_set_parent_realize/unrealize/reset() by Philippe Mathieu-Daudé · 7 years ago
  86. 98670d4 accel/tcg: add size paremeter in tlb_fill() by Laurent Vivier · 7 years ago
  87. 65255e8 target/*helper: don't check retaddr before calling cpu_restore_state by Alex Bennée · 7 years ago
  88. ff67604 misc: remove duplicated includes by Philippe Mathieu-Daudé · 7 years ago
  89. ab752f2 Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging by Peter Maydell · 7 years ago
  90. a677273 openrisc: cleanup cpu type name composition by Igor Mammedov · 7 years ago
  91. 6e6430a Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging by Peter Maydell · 7 years ago
  92. 1d48474 disas: Remove unused flags arguments by Richard Henderson · 7 years ago
  93. 1c2adb9 tcg: Initialize cpu_env generically by Richard Henderson · 7 years ago
  94. b1311c4 tcg: define tcg_init_ctx and make tcg_ctx a pointer by Emilio G. Cota · 8 years ago
  95. c5a49c6 tcg: convert tb->cflags reads to tb_cflags(tb) by Emilio G. Cota · 8 years ago
  96. 55c3cee qom: Introduce CPUClass.tcg_initialize by Richard Henderson · 7 years ago
  97. 6b4bbd6 openrisc/cputimer: Perparation for Multicore by Stafford Horne · 8 years ago
  98. 8c94995 target/openrisc: Make coreid and numcores variable by Stafford Horne · 8 years ago
  99. 8301ea4 qom/cpu: move cpu_model null check to cpu_class_by_name() by Philippe Mathieu-Daudé · 7 years ago
  100. 77fc6f5 target: [tcg] Use a generic enum for DISAS_ values by Lluís Vilanova · 8 years ago