commit | 8c949951ed257567303c3d3b83bcd876b53d79e5 | [log] [tgz] |
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author | Stafford Horne <shorne@gmail.com> | Sun Jun 18 01:50:06 2017 +0900 |
committer | Stafford Horne <shorne@gmail.com> | Sat Oct 21 06:35:47 2017 +0900 |
tree | 39a29ce409d4c834b13d0f65afaee8694e283c49 | |
parent | 0ca9fa2e3c2d072ef7546190976e326ff2673a33 [diff] |
target/openrisc: Make coreid and numcores variable Previously coreid and numcores were hard coded as 0 and 1 respectively as OpenRISC QEMU did not have multicore support. Multicore support is now being added so these registers need to have configured values. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>