bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 1 | /* |
陳韋任 | e965fc3 | 2012-02-06 14:02:55 +0800 | [diff] [blame] | 2 | * emulator main execution loop |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 66321a1 | 2005-04-06 20:47:48 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 5 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 10 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 15 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 18 | */ |
bellard | e4533c7 | 2003-06-15 19:51:39 +0000 | [diff] [blame] | 19 | #include "config.h" |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 20 | #include "cpu.h" |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 21 | #include "trace.h" |
Paolo Bonzini | 76cad71 | 2012-10-24 11:12:21 +0200 | [diff] [blame] | 22 | #include "disas/disas.h" |
bellard | 7cb69ca | 2008-05-10 10:55:51 +0000 | [diff] [blame] | 23 | #include "tcg.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 24 | #include "qemu/atomic.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 25 | #include "sysemu/qtest.h" |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 26 | #include "qemu/timer.h" |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 27 | #include "exec/address-spaces.h" |
| 28 | #include "exec/memory-internal.h" |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 29 | #include "qemu/rcu.h" |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 30 | |
| 31 | /* -icount align implementation. */ |
| 32 | |
| 33 | typedef struct SyncClocks { |
| 34 | int64_t diff_clk; |
| 35 | int64_t last_cpu_icount; |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 36 | int64_t realtime_clock; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 37 | } SyncClocks; |
| 38 | |
| 39 | #if !defined(CONFIG_USER_ONLY) |
| 40 | /* Allow the guest to have a max 3ms advance. |
| 41 | * The difference between the 2 clocks could therefore |
| 42 | * oscillate around 0. |
| 43 | */ |
| 44 | #define VM_CLOCK_ADVANCE 3000000 |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 45 | #define THRESHOLD_REDUCE 1.5 |
| 46 | #define MAX_DELAY_PRINT_RATE 2000000000LL |
| 47 | #define MAX_NB_PRINTS 100 |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 48 | |
| 49 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) |
| 50 | { |
| 51 | int64_t cpu_icount; |
| 52 | |
| 53 | if (!icount_align_option) { |
| 54 | return; |
| 55 | } |
| 56 | |
| 57 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
| 58 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); |
| 59 | sc->last_cpu_icount = cpu_icount; |
| 60 | |
| 61 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { |
| 62 | #ifndef _WIN32 |
| 63 | struct timespec sleep_delay, rem_delay; |
| 64 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; |
| 65 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; |
| 66 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { |
Paolo Bonzini | a498d0e | 2015-01-28 10:09:55 +0100 | [diff] [blame] | 67 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 68 | } else { |
| 69 | sc->diff_clk = 0; |
| 70 | } |
| 71 | #else |
| 72 | Sleep(sc->diff_clk / SCALE_MS); |
| 73 | sc->diff_clk = 0; |
| 74 | #endif |
| 75 | } |
| 76 | } |
| 77 | |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 78 | static void print_delay(const SyncClocks *sc) |
| 79 | { |
| 80 | static float threshold_delay; |
| 81 | static int64_t last_realtime_clock; |
| 82 | static int nb_prints; |
| 83 | |
| 84 | if (icount_align_option && |
| 85 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && |
| 86 | nb_prints < MAX_NB_PRINTS) { |
| 87 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || |
| 88 | (-sc->diff_clk / (float)1000000000LL < |
| 89 | (threshold_delay - THRESHOLD_REDUCE))) { |
| 90 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; |
| 91 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", |
| 92 | threshold_delay - 1, |
| 93 | threshold_delay); |
| 94 | nb_prints++; |
| 95 | last_realtime_clock = sc->realtime_clock; |
| 96 | } |
| 97 | } |
| 98 | } |
| 99 | |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 100 | static void init_delay_params(SyncClocks *sc, |
| 101 | const CPUState *cpu) |
| 102 | { |
| 103 | if (!icount_align_option) { |
| 104 | return; |
| 105 | } |
Paolo Bonzini | 2e91cc6 | 2015-01-28 10:16:37 +0100 | [diff] [blame] | 106 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
| 107 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 108 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
Sebastian Tanase | 27498be | 2014-07-25 11:56:33 +0200 | [diff] [blame] | 109 | if (sc->diff_clk < max_delay) { |
| 110 | max_delay = sc->diff_clk; |
| 111 | } |
| 112 | if (sc->diff_clk > max_advance) { |
| 113 | max_advance = sc->diff_clk; |
| 114 | } |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 115 | |
| 116 | /* Print every 2s max if the guest is late. We limit the number |
| 117 | of printed messages to NB_PRINT_MAX(currently 100) */ |
| 118 | print_delay(sc); |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 119 | } |
| 120 | #else |
| 121 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) |
| 122 | { |
| 123 | } |
| 124 | |
| 125 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) |
| 126 | { |
| 127 | } |
| 128 | #endif /* CONFIG USER ONLY */ |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 129 | |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 130 | void cpu_loop_exit(CPUState *cpu) |
bellard | e4533c7 | 2003-06-15 19:51:39 +0000 | [diff] [blame] | 131 | { |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 132 | cpu->current_tb = NULL; |
Andreas Färber | 6f03bef | 2013-08-26 06:22:03 +0200 | [diff] [blame] | 133 | siglongjmp(cpu->jmp_env, 1); |
bellard | e4533c7 | 2003-06-15 19:51:39 +0000 | [diff] [blame] | 134 | } |
ths | bfed01f | 2007-06-03 17:44:37 +0000 | [diff] [blame] | 135 | |
bellard | fbf9eeb | 2004-04-25 21:21:33 +0000 | [diff] [blame] | 136 | /* exit the current TB from a signal handler. The host registers are |
| 137 | restored in a state compatible with the CPU emulator |
| 138 | */ |
Blue Swirl | 9eff14f | 2011-05-21 08:42:35 +0000 | [diff] [blame] | 139 | #if defined(CONFIG_SOFTMMU) |
Andreas Färber | 0ea8cb8 | 2013-09-03 02:12:23 +0200 | [diff] [blame] | 140 | void cpu_resume_from_signal(CPUState *cpu, void *puc) |
bellard | fbf9eeb | 2004-04-25 21:21:33 +0000 | [diff] [blame] | 141 | { |
Blue Swirl | 9eff14f | 2011-05-21 08:42:35 +0000 | [diff] [blame] | 142 | /* XXX: restore cpu registers saved in host registers */ |
| 143 | |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 144 | cpu->exception_index = -1; |
Andreas Färber | 6f03bef | 2013-08-26 06:22:03 +0200 | [diff] [blame] | 145 | siglongjmp(cpu->jmp_env, 1); |
Blue Swirl | 9eff14f | 2011-05-21 08:42:35 +0000 | [diff] [blame] | 146 | } |
Paolo Bonzini | 76e5c76 | 2015-01-15 12:46:47 +0100 | [diff] [blame] | 147 | |
| 148 | void cpu_reload_memory_map(CPUState *cpu) |
| 149 | { |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 150 | AddressSpaceDispatch *d; |
| 151 | |
| 152 | if (qemu_in_vcpu_thread()) { |
| 153 | /* Do not let the guest prolong the critical section as much as it |
| 154 | * as it desires. |
| 155 | * |
| 156 | * Currently, this is prevented by the I/O thread's periodinc kicking |
| 157 | * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread) |
| 158 | * but this will go away once TCG's execution moves out of the global |
| 159 | * mutex. |
| 160 | * |
| 161 | * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which |
| 162 | * only protects cpu->as->dispatch. Since we reload it below, we can |
| 163 | * split the critical section. |
| 164 | */ |
| 165 | rcu_read_unlock(); |
| 166 | rcu_read_lock(); |
| 167 | } |
| 168 | |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 169 | /* The CPU and TLB are protected by the iothread lock. */ |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 170 | d = atomic_rcu_read(&cpu->as->dispatch); |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 171 | cpu->memory_dispatch = d; |
Paolo Bonzini | 76e5c76 | 2015-01-15 12:46:47 +0100 | [diff] [blame] | 172 | tlb_flush(cpu, 1); |
| 173 | } |
Blue Swirl | 9eff14f | 2011-05-21 08:42:35 +0000 | [diff] [blame] | 174 | #endif |
bellard | fbf9eeb | 2004-04-25 21:21:33 +0000 | [diff] [blame] | 175 | |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 176 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
| 177 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) |
| 178 | { |
| 179 | CPUArchState *env = cpu->env_ptr; |
Richard Henderson | 03afa5f | 2013-11-06 17:29:39 +1000 | [diff] [blame] | 180 | uintptr_t next_tb; |
| 181 | |
| 182 | #if defined(DEBUG_DISAS) |
| 183 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { |
| 184 | #if defined(TARGET_I386) |
| 185 | log_cpu_state(cpu, CPU_DUMP_CCOP); |
| 186 | #elif defined(TARGET_M68K) |
| 187 | /* ??? Should not modify env state for dumping. */ |
| 188 | cpu_m68k_flush_flags(env, env->cc_op); |
| 189 | env->cc_op = CC_OP_FLAGS; |
| 190 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); |
| 191 | log_cpu_state(cpu, 0); |
| 192 | #else |
| 193 | log_cpu_state(cpu, 0); |
| 194 | #endif |
| 195 | } |
| 196 | #endif /* DEBUG_DISAS */ |
| 197 | |
Pavel Dovgalyuk | 626cf8f | 2014-12-08 10:53:17 +0300 | [diff] [blame] | 198 | cpu->can_do_io = 0; |
Richard Henderson | 03afa5f | 2013-11-06 17:29:39 +1000 | [diff] [blame] | 199 | next_tb = tcg_qemu_tb_exec(env, tb_ptr); |
Pavel Dovgalyuk | 626cf8f | 2014-12-08 10:53:17 +0300 | [diff] [blame] | 200 | cpu->can_do_io = 1; |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 201 | trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), |
| 202 | next_tb & TB_EXIT_MASK); |
| 203 | |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 204 | if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { |
| 205 | /* We didn't start executing this TB (eg because the instruction |
| 206 | * counter hit zero); we must restore the guest PC to the address |
| 207 | * of the start of the TB. |
| 208 | */ |
Andreas Färber | bdf7ae5 | 2013-06-28 19:31:32 +0200 | [diff] [blame] | 209 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 210 | TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
Andreas Färber | bdf7ae5 | 2013-06-28 19:31:32 +0200 | [diff] [blame] | 211 | if (cc->synchronize_from_tb) { |
| 212 | cc->synchronize_from_tb(cpu, tb); |
| 213 | } else { |
| 214 | assert(cc->set_pc); |
| 215 | cc->set_pc(cpu, tb->pc); |
| 216 | } |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 217 | } |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 218 | if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { |
| 219 | /* We were asked to stop executing TBs (probably a pending |
| 220 | * interrupt. We've now stopped, so clear the flag. |
| 221 | */ |
| 222 | cpu->tcg_exit_req = 0; |
| 223 | } |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 224 | return next_tb; |
| 225 | } |
| 226 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 227 | /* Execute the code without caching the generated code. An interpreter |
| 228 | could be used if available. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 229 | static void cpu_exec_nocache(CPUArchState *env, int max_cycles, |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 230 | TranslationBlock *orig_tb) |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 231 | { |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 232 | CPUState *cpu = ENV_GET_CPU(env); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 233 | TranslationBlock *tb; |
Pavel Dovgalyuk | b4ac20b | 2014-11-26 13:38:52 +0300 | [diff] [blame] | 234 | target_ulong pc = orig_tb->pc; |
| 235 | target_ulong cs_base = orig_tb->cs_base; |
| 236 | uint64_t flags = orig_tb->flags; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 237 | |
| 238 | /* Should never happen. |
| 239 | We only end up here when an existing TB is too long. */ |
| 240 | if (max_cycles > CF_COUNT_MASK) |
| 241 | max_cycles = CF_COUNT_MASK; |
| 242 | |
Pavel Dovgalyuk | b4ac20b | 2014-11-26 13:38:52 +0300 | [diff] [blame] | 243 | /* tb_gen_code can flush our orig_tb, invalidate it now */ |
| 244 | tb_phys_invalidate(orig_tb, -1); |
| 245 | tb = tb_gen_code(cpu, pc, cs_base, flags, |
Pavel Dovgalyuk | d8a499f | 2014-11-26 13:40:16 +0300 | [diff] [blame] | 246 | max_cycles | CF_NOCACHE); |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 247 | cpu->current_tb = tb; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 248 | /* execute the generated code */ |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 249 | trace_exec_tb_nocache(tb, tb->pc); |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 250 | cpu_tb_exec(cpu, tb->tc_ptr); |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 251 | cpu->current_tb = NULL; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 252 | tb_phys_invalidate(tb, -1); |
| 253 | tb_free(tb); |
| 254 | } |
| 255 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 256 | static TranslationBlock *tb_find_slow(CPUArchState *env, |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 257 | target_ulong pc, |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 258 | target_ulong cs_base, |
j_mayer | c068688 | 2007-09-20 22:47:42 +0000 | [diff] [blame] | 259 | uint64_t flags) |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 260 | { |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 261 | CPUState *cpu = ENV_GET_CPU(env); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 262 | TranslationBlock *tb, **ptb1; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 263 | unsigned int h; |
Blue Swirl | 337fc75 | 2011-09-04 11:06:22 +0000 | [diff] [blame] | 264 | tb_page_addr_t phys_pc, phys_page1; |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 265 | target_ulong virt_page2; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 266 | |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 267 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 268 | |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 269 | /* find translated block using physical mappings */ |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 270 | phys_pc = get_page_addr_code(env, pc); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 271 | phys_page1 = phys_pc & TARGET_PAGE_MASK; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 272 | h = tb_phys_hash_func(phys_pc); |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 273 | ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h]; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 274 | for(;;) { |
| 275 | tb = *ptb1; |
| 276 | if (!tb) |
| 277 | goto not_found; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 278 | if (tb->pc == pc && |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 279 | tb->page_addr[0] == phys_page1 && |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 280 | tb->cs_base == cs_base && |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 281 | tb->flags == flags) { |
| 282 | /* check next page if needed */ |
| 283 | if (tb->page_addr[1] != -1) { |
Blue Swirl | 337fc75 | 2011-09-04 11:06:22 +0000 | [diff] [blame] | 284 | tb_page_addr_t phys_page2; |
| 285 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 286 | virt_page2 = (pc & TARGET_PAGE_MASK) + |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 287 | TARGET_PAGE_SIZE; |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 288 | phys_page2 = get_page_addr_code(env, virt_page2); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 289 | if (tb->page_addr[1] == phys_page2) |
| 290 | goto found; |
| 291 | } else { |
| 292 | goto found; |
| 293 | } |
| 294 | } |
| 295 | ptb1 = &tb->phys_hash_next; |
| 296 | } |
| 297 | not_found: |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 298 | /* if no translated code available, then translate it now */ |
Andreas Färber | 648f034 | 2013-09-01 17:43:17 +0200 | [diff] [blame] | 299 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 300 | |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 301 | found: |
Kirill Batuzov | 2c90fe2 | 2010-12-02 16:12:46 +0300 | [diff] [blame] | 302 | /* Move the last found TB to the head of the list */ |
| 303 | if (likely(*ptb1)) { |
| 304 | *ptb1 = tb->phys_hash_next; |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 305 | tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h]; |
| 306 | tcg_ctx.tb_ctx.tb_phys_hash[h] = tb; |
Kirill Batuzov | 2c90fe2 | 2010-12-02 16:12:46 +0300 | [diff] [blame] | 307 | } |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 308 | /* we add the TB in the virtual pc hash table */ |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 309 | cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 310 | return tb; |
| 311 | } |
| 312 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 313 | static inline TranslationBlock *tb_find_fast(CPUArchState *env) |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 314 | { |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 315 | CPUState *cpu = ENV_GET_CPU(env); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 316 | TranslationBlock *tb; |
| 317 | target_ulong cs_base, pc; |
aliguori | 6b91754 | 2008-11-18 19:46:41 +0000 | [diff] [blame] | 318 | int flags; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 319 | |
| 320 | /* we record a subset of the CPU state. It will |
| 321 | always be the same before a given translated block |
| 322 | is executed. */ |
aliguori | 6b91754 | 2008-11-18 19:46:41 +0000 | [diff] [blame] | 323 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 324 | tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 325 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
| 326 | tb->flags != flags)) { |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 327 | tb = tb_find_slow(env, pc, cs_base, flags); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 328 | } |
| 329 | return tb; |
| 330 | } |
| 331 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 332 | static void cpu_handle_debug_exception(CPUArchState *env) |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 333 | { |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 334 | CPUState *cpu = ENV_GET_CPU(env); |
Peter Maydell | 86025ee | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 335 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 336 | CPUWatchpoint *wp; |
| 337 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 338 | if (!cpu->watchpoint_hit) { |
| 339 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 340 | wp->flags &= ~BP_WATCHPOINT_HIT; |
| 341 | } |
| 342 | } |
Peter Maydell | 86025ee | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 343 | |
| 344 | cc->debug_excp_handler(cpu); |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 345 | } |
| 346 | |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 347 | /* main execution loop */ |
| 348 | |
Marcelo Tosatti | 1a28cac | 2010-05-04 09:45:20 -0300 | [diff] [blame] | 349 | volatile sig_atomic_t exit_request; |
| 350 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 351 | int cpu_exec(CPUArchState *env) |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 352 | { |
Andreas Färber | c356a1b | 2012-05-04 19:39:23 +0200 | [diff] [blame] | 353 | CPUState *cpu = ENV_GET_CPU(env); |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 354 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 355 | #ifdef TARGET_I386 |
| 356 | X86CPU *x86_cpu = X86_CPU(cpu); |
| 357 | #endif |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 358 | int ret, interrupt_request; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 359 | TranslationBlock *tb; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 360 | uint8_t *tc_ptr; |
Richard Henderson | 3e9bd63 | 2013-08-20 14:40:25 -0700 | [diff] [blame] | 361 | uintptr_t next_tb; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 362 | SyncClocks sc; |
| 363 | |
Peter Maydell | bae2c27 | 2014-04-04 17:42:56 +0100 | [diff] [blame] | 364 | /* This must be volatile so it is not trashed by longjmp() */ |
| 365 | volatile bool have_tb_lock = false; |
bellard | 8c6939c | 2003-06-09 15:28:00 +0000 | [diff] [blame] | 366 | |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 367 | if (cpu->halted) { |
Andreas Färber | 3993c6b | 2012-05-03 06:43:49 +0200 | [diff] [blame] | 368 | if (!cpu_has_work(cpu)) { |
Paolo Bonzini | eda48c3 | 2011-03-12 17:43:56 +0100 | [diff] [blame] | 369 | return EXCP_HALTED; |
| 370 | } |
| 371 | |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 372 | cpu->halted = 0; |
Paolo Bonzini | eda48c3 | 2011-03-12 17:43:56 +0100 | [diff] [blame] | 373 | } |
bellard | 5a1e3cf | 2005-11-23 21:02:53 +0000 | [diff] [blame] | 374 | |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 375 | current_cpu = cpu; |
bellard | e4533c7 | 2003-06-15 19:51:39 +0000 | [diff] [blame] | 376 | |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 377 | /* As long as current_cpu is null, up to the assignment just above, |
Olivier Hainque | ec9bd89 | 2013-04-09 18:06:54 +0200 | [diff] [blame] | 378 | * requests by other threads to exit the execution loop are expected to |
| 379 | * be issued using the exit_request global. We must make sure that our |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 380 | * evaluation of the global value is performed past the current_cpu |
Olivier Hainque | ec9bd89 | 2013-04-09 18:06:54 +0200 | [diff] [blame] | 381 | * value transition point, which requires a memory barrier as well as |
| 382 | * an instruction scheduling constraint on modern architectures. */ |
| 383 | smp_mb(); |
| 384 | |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 385 | rcu_read_lock(); |
| 386 | |
Jan Kiszka | c629a4b | 2010-06-25 16:56:52 +0200 | [diff] [blame] | 387 | if (unlikely(exit_request)) { |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 388 | cpu->exit_request = 1; |
Marcelo Tosatti | 1a28cac | 2010-05-04 09:45:20 -0300 | [diff] [blame] | 389 | } |
| 390 | |
Richard Henderson | cffe7b3 | 2014-09-13 09:45:12 -0700 | [diff] [blame] | 391 | cc->cpu_exec_enter(cpu); |
bellard | 9d27abd | 2003-05-10 13:13:54 +0000 | [diff] [blame] | 392 | |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 393 | /* Calculate difference between guest clock and host clock. |
| 394 | * This delay includes the delay of the last cycle, so |
| 395 | * what we have to do is sleep until it is 0. As for the |
| 396 | * advance/delay we gain here, we try to fix it next time. |
| 397 | */ |
| 398 | init_delay_params(&sc, cpu); |
| 399 | |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 400 | /* prepare setjmp context for exception handling */ |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 401 | for(;;) { |
Andreas Färber | 6f03bef | 2013-08-26 06:22:03 +0200 | [diff] [blame] | 402 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 403 | /* if an exception is pending, we execute it here */ |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 404 | if (cpu->exception_index >= 0) { |
| 405 | if (cpu->exception_index >= EXCP_INTERRUPT) { |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 406 | /* exit request from the cpu execution loop */ |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 407 | ret = cpu->exception_index; |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 408 | if (ret == EXCP_DEBUG) { |
| 409 | cpu_handle_debug_exception(env); |
| 410 | } |
Pavel Dovgalyuk | e511b4d | 2014-11-26 13:39:20 +0300 | [diff] [blame] | 411 | cpu->exception_index = -1; |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 412 | break; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 413 | } else { |
| 414 | #if defined(CONFIG_USER_ONLY) |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 415 | /* if user mode only, we simulate a fake exception |
ths | 9f08349 | 2006-12-07 18:28:42 +0000 | [diff] [blame] | 416 | which will be handled outside the cpu execution |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 417 | loop */ |
bellard | 83479e7 | 2003-06-25 16:12:37 +0000 | [diff] [blame] | 418 | #if defined(TARGET_I386) |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 419 | cc->do_interrupt(cpu); |
bellard | 83479e7 | 2003-06-25 16:12:37 +0000 | [diff] [blame] | 420 | #endif |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 421 | ret = cpu->exception_index; |
Pavel Dovgalyuk | e511b4d | 2014-11-26 13:39:20 +0300 | [diff] [blame] | 422 | cpu->exception_index = -1; |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 423 | break; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 424 | #else |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 425 | cc->do_interrupt(cpu); |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 426 | cpu->exception_index = -1; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 427 | #endif |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 428 | } |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 429 | } |
bellard | 9df217a | 2005-02-10 22:05:51 +0000 | [diff] [blame] | 430 | |
blueswir1 | b5fc09a | 2008-05-04 06:38:18 +0000 | [diff] [blame] | 431 | next_tb = 0; /* force lookup of first TB */ |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 432 | for(;;) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 433 | interrupt_request = cpu->interrupt_request; |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 434 | if (unlikely(interrupt_request)) { |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 435 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 436 | /* Mask out external interrupts for this step. */ |
Richard Henderson | 3125f76 | 2011-05-04 13:34:25 -0700 | [diff] [blame] | 437 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 438 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 439 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 440 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 441 | cpu->exception_index = EXCP_DEBUG; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 442 | cpu_loop_exit(cpu); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 443 | } |
balrog | a90b731 | 2007-05-01 01:28:01 +0000 | [diff] [blame] | 444 | if (interrupt_request & CPU_INTERRUPT_HALT) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 445 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; |
| 446 | cpu->halted = 1; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 447 | cpu->exception_index = EXCP_HLT; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 448 | cpu_loop_exit(cpu); |
balrog | a90b731 | 2007-05-01 01:28:01 +0000 | [diff] [blame] | 449 | } |
bellard | 68a7931 | 2003-06-30 13:12:32 +0000 | [diff] [blame] | 450 | #if defined(TARGET_I386) |
Paolo Bonzini | 4a92a55 | 2013-03-05 15:35:17 +0100 | [diff] [blame] | 451 | if (interrupt_request & CPU_INTERRUPT_INIT) { |
| 452 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); |
| 453 | do_cpu_init(x86_cpu); |
| 454 | cpu->exception_index = EXCP_HALTED; |
| 455 | cpu_loop_exit(cpu); |
| 456 | } |
| 457 | #else |
| 458 | if (interrupt_request & CPU_INTERRUPT_RESET) { |
| 459 | cpu_reset(cpu); |
| 460 | } |
| 461 | #endif |
Richard Henderson | 9585db6 | 2014-09-13 09:45:17 -0700 | [diff] [blame] | 462 | /* The target hook has 3 exit conditions: |
| 463 | False when the interrupt isn't processed, |
| 464 | True when it is, and we should restart on a new TB, |
| 465 | and via longjmp via cpu_loop_exit. */ |
| 466 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { |
| 467 | next_tb = 0; |
| 468 | } |
| 469 | /* Don't use the cached interrupt_request value, |
| 470 | do_interrupt may have updated the EXITTB flag. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 471 | if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { |
| 472 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
bellard | bf3e8bf | 2004-02-16 21:58:54 +0000 | [diff] [blame] | 473 | /* ensure that no TB jump will be modified as |
| 474 | the program flow was changed */ |
blueswir1 | b5fc09a | 2008-05-04 06:38:18 +0000 | [diff] [blame] | 475 | next_tb = 0; |
bellard | bf3e8bf | 2004-02-16 21:58:54 +0000 | [diff] [blame] | 476 | } |
aurel32 | be214e6 | 2009-03-06 21:48:00 +0000 | [diff] [blame] | 477 | } |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 478 | if (unlikely(cpu->exit_request)) { |
| 479 | cpu->exit_request = 0; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 480 | cpu->exception_index = EXCP_INTERRUPT; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 481 | cpu_loop_exit(cpu); |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 482 | } |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 483 | spin_lock(&tcg_ctx.tb_ctx.tb_lock); |
Peter Maydell | bae2c27 | 2014-04-04 17:42:56 +0100 | [diff] [blame] | 484 | have_tb_lock = true; |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 485 | tb = tb_find_fast(env); |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 486 | /* Note: we do it here to avoid a gcc bug on Mac OS X when |
| 487 | doing it in tb_find_slow */ |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 488 | if (tcg_ctx.tb_ctx.tb_invalidated_flag) { |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 489 | /* as some TB could have been invalidated because |
| 490 | of memory exceptions while generating the code, we |
| 491 | must recompute the hash index here */ |
| 492 | next_tb = 0; |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 493 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 494 | } |
Peter Maydell | c30d1ae | 2013-04-11 21:21:46 +0100 | [diff] [blame] | 495 | if (qemu_loglevel_mask(CPU_LOG_EXEC)) { |
| 496 | qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n", |
| 497 | tb->tc_ptr, tb->pc, lookup_symbol(tb->pc)); |
| 498 | } |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 499 | /* see if we can patch the calling TB. When the TB |
| 500 | spans two pages, we cannot safely do a direct |
| 501 | jump. */ |
Paolo Bonzini | 040f2fb | 2010-01-15 08:56:36 +0100 | [diff] [blame] | 502 | if (next_tb != 0 && tb->page_addr[1] == -1) { |
Peter Maydell | 0980011 | 2013-02-22 18:10:00 +0000 | [diff] [blame] | 503 | tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), |
| 504 | next_tb & TB_EXIT_MASK, tb); |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 505 | } |
Peter Maydell | bae2c27 | 2014-04-04 17:42:56 +0100 | [diff] [blame] | 506 | have_tb_lock = false; |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 507 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); |
malc | 55e8b85 | 2008-11-04 14:18:13 +0000 | [diff] [blame] | 508 | |
| 509 | /* cpu_interrupt might be called while translating the |
| 510 | TB, but before it is linked into a potentially |
| 511 | infinite loop and becomes env->current_tb. Avoid |
| 512 | starting execution if there is a pending interrupt. */ |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 513 | cpu->current_tb = tb; |
Jan Kiszka | b0052d1 | 2010-06-25 16:56:50 +0200 | [diff] [blame] | 514 | barrier(); |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 515 | if (likely(!cpu->exit_request)) { |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 516 | trace_exec_tb(tb, tb->pc); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 517 | tc_ptr = tb->tc_ptr; |
陳韋任 | e965fc3 | 2012-02-06 14:02:55 +0800 | [diff] [blame] | 518 | /* execute the generated code */ |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 519 | next_tb = cpu_tb_exec(cpu, tc_ptr); |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 520 | switch (next_tb & TB_EXIT_MASK) { |
| 521 | case TB_EXIT_REQUESTED: |
| 522 | /* Something asked us to stop executing |
| 523 | * chained TBs; just continue round the main |
| 524 | * loop. Whatever requested the exit will also |
| 525 | * have set something else (eg exit_request or |
| 526 | * interrupt_request) which we will handle |
| 527 | * next time around the loop. |
| 528 | */ |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 529 | next_tb = 0; |
| 530 | break; |
| 531 | case TB_EXIT_ICOUNT_EXPIRED: |
| 532 | { |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 533 | /* Instruction counter expired. */ |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 534 | int insns_left = cpu->icount_decr.u32; |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 535 | if (cpu->icount_extra && insns_left >= 0) { |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 536 | /* Refill decrementer and continue execution. */ |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 537 | cpu->icount_extra += insns_left; |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 538 | insns_left = MIN(0xffff, cpu->icount_extra); |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 539 | cpu->icount_extra -= insns_left; |
Andreas Färber | 28ecfd7 | 2013-08-26 05:51:49 +0200 | [diff] [blame] | 540 | cpu->icount_decr.u16.low = insns_left; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 541 | } else { |
| 542 | if (insns_left > 0) { |
| 543 | /* Execute remaining instructions. */ |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 544 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 545 | cpu_exec_nocache(env, insns_left, tb); |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 546 | align_clocks(&sc, cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 547 | } |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 548 | cpu->exception_index = EXCP_INTERRUPT; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 549 | next_tb = 0; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 550 | cpu_loop_exit(cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 551 | } |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 552 | break; |
| 553 | } |
| 554 | default: |
| 555 | break; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 556 | } |
| 557 | } |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 558 | cpu->current_tb = NULL; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 559 | /* Try to align the host and virtual clocks |
| 560 | if the guest is in advance */ |
| 561 | align_clocks(&sc, cpu); |
bellard | 4cbf74b | 2003-08-10 21:48:43 +0000 | [diff] [blame] | 562 | /* reset soft MMU for next block (it can currently |
| 563 | only be set by a memory fault) */ |
ths | 50a518e | 2007-06-03 18:52:15 +0000 | [diff] [blame] | 564 | } /* for(;;) */ |
Jan Kiszka | 0d10193 | 2011-07-02 09:50:51 +0200 | [diff] [blame] | 565 | } else { |
| 566 | /* Reload env after longjmp - the compiler may have smashed all |
| 567 | * local variables as longjmp is marked 'noreturn'. */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 568 | cpu = current_cpu; |
| 569 | env = cpu->env_ptr; |
Juergen Lock | 6c78f29 | 2013-10-03 16:09:37 +0200 | [diff] [blame] | 570 | cc = CPU_GET_CLASS(cpu); |
Pavel Dovgalyuk | 626cf8f | 2014-12-08 10:53:17 +0300 | [diff] [blame] | 571 | cpu->can_do_io = 1; |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 572 | #ifdef TARGET_I386 |
| 573 | x86_cpu = X86_CPU(cpu); |
| 574 | #endif |
Peter Maydell | bae2c27 | 2014-04-04 17:42:56 +0100 | [diff] [blame] | 575 | if (have_tb_lock) { |
| 576 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); |
| 577 | have_tb_lock = false; |
| 578 | } |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 579 | } |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 580 | } /* for(;;) */ |
| 581 | |
Richard Henderson | cffe7b3 | 2014-09-13 09:45:12 -0700 | [diff] [blame] | 582 | cc->cpu_exec_exit(cpu); |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 583 | rcu_read_unlock(); |
pbrook | 1057eaa | 2007-02-04 13:37:44 +0000 | [diff] [blame] | 584 | |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 585 | /* fail safe : never use current_cpu outside cpu_exec() */ |
| 586 | current_cpu = NULL; |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 587 | return ret; |
| 588 | } |