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Paul Brook1ad21342009-05-19 16:17:58 +01001#ifndef CPU_COMMON_H
2#define CPU_COMMON_H 1
3
4/* CPU interfaces that are target indpendent. */
5
6#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__)
7#define WORDS_ALIGNED
8#endif
9
10#include "bswap.h"
11
12/* address in the RAM (different from a physical address) */
Anthony Liguoric227f092009-10-01 16:12:16 -050013typedef unsigned long ram_addr_t;
Paul Brook1ad21342009-05-19 16:17:58 +010014
15/* memory API */
16
Anthony Liguoric227f092009-10-01 16:12:16 -050017typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
18typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
Paul Brook1ad21342009-05-19 16:17:58 +010019
Anthony Liguoric227f092009-10-01 16:12:16 -050020void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
21 ram_addr_t size,
22 ram_addr_t phys_offset,
23 ram_addr_t region_offset);
24static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
25 ram_addr_t size,
26 ram_addr_t phys_offset)
Paul Brook1ad21342009-05-19 16:17:58 +010027{
28 cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
29}
30
Anthony Liguoric227f092009-10-01 16:12:16 -050031ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
32ram_addr_t qemu_ram_alloc(ram_addr_t);
33void qemu_ram_free(ram_addr_t addr);
Paul Brook1ad21342009-05-19 16:17:58 +010034/* This should only be used for ram local to a device. */
Anthony Liguoric227f092009-10-01 16:12:16 -050035void *qemu_get_ram_ptr(ram_addr_t addr);
Paul Brook1ad21342009-05-19 16:17:58 +010036/* This should not be used by devices. */
Anthony Liguoric227f092009-10-01 16:12:16 -050037ram_addr_t qemu_ram_addr_from_host(void *ptr);
Paul Brook1ad21342009-05-19 16:17:58 +010038
Blue Swirld60efc62009-08-25 18:29:31 +000039int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
40 CPUWriteMemoryFunc * const *mem_write,
Paul Brook1ad21342009-05-19 16:17:58 +010041 void *opaque);
42void cpu_unregister_io_memory(int table_address);
43
Anthony Liguoric227f092009-10-01 16:12:16 -050044void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
Paul Brook1ad21342009-05-19 16:17:58 +010045 int len, int is_write);
Anthony Liguoric227f092009-10-01 16:12:16 -050046static inline void cpu_physical_memory_read(target_phys_addr_t addr,
Paul Brook1ad21342009-05-19 16:17:58 +010047 uint8_t *buf, int len)
48{
49 cpu_physical_memory_rw(addr, buf, len, 0);
50}
Anthony Liguoric227f092009-10-01 16:12:16 -050051static inline void cpu_physical_memory_write(target_phys_addr_t addr,
Paul Brook1ad21342009-05-19 16:17:58 +010052 const uint8_t *buf, int len)
53{
54 cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
55}
Anthony Liguoric227f092009-10-01 16:12:16 -050056void *cpu_physical_memory_map(target_phys_addr_t addr,
57 target_phys_addr_t *plen,
Paul Brook1ad21342009-05-19 16:17:58 +010058 int is_write);
Anthony Liguoric227f092009-10-01 16:12:16 -050059void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
60 int is_write, target_phys_addr_t access_len);
Paul Brook1ad21342009-05-19 16:17:58 +010061void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
62void cpu_unregister_map_client(void *cookie);
63
Anthony Liguoric227f092009-10-01 16:12:16 -050064uint32_t ldub_phys(target_phys_addr_t addr);
65uint32_t lduw_phys(target_phys_addr_t addr);
66uint32_t ldl_phys(target_phys_addr_t addr);
67uint64_t ldq_phys(target_phys_addr_t addr);
68void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
69void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
70void stb_phys(target_phys_addr_t addr, uint32_t val);
71void stw_phys(target_phys_addr_t addr, uint32_t val);
72void stl_phys(target_phys_addr_t addr, uint32_t val);
73void stq_phys(target_phys_addr_t addr, uint64_t val);
Paul Brook1ad21342009-05-19 16:17:58 +010074
Anthony Liguoric227f092009-10-01 16:12:16 -050075void cpu_physical_memory_write_rom(target_phys_addr_t addr,
Paul Brook1ad21342009-05-19 16:17:58 +010076 const uint8_t *buf, int len);
77
78#define IO_MEM_SHIFT 3
79
80#define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */
81#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
82#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
83#define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT)
84
85/* Acts like a ROM when read and like a device when written. */
86#define IO_MEM_ROMD (1)
87#define IO_MEM_SUBPAGE (2)
88#define IO_MEM_SUBWIDTH (4)
89
90#endif /* !CPU_COMMON_H */