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aliguori244ab902009-02-05 21:23:50 +00001/*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
Peter Maydelld38ea872016-01-29 17:50:05 +000010#include "qemu/osdep.h"
Markus Armbruster4be74632014-10-07 13:59:18 +020011#include "sysemu/block-backend.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010012#include "sysemu/dma.h"
Kevin Wolfc57c4652011-11-24 06:15:28 -050013#include "trace.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010014#include "qemu/thread.h"
Alex Bligh6a1751b2013-08-21 16:02:47 +010015#include "qemu/main-loop.h"
aliguori244ab902009-02-05 21:23:50 +000016
David Gibsone5332e62012-06-27 14:50:43 +100017/* #define DEBUG_IOMMU */
18
Paolo Bonzinidf32fd12013-04-10 18:15:49 +020019int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
David Gibsond86a77f2012-06-27 14:50:38 +100020{
Paolo Bonzinidf32fd12013-04-10 18:15:49 +020021 dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
Paolo Bonzini24addbc2013-04-10 17:49:04 +020022
David Gibsond86a77f2012-06-27 14:50:38 +100023#define FILLBUF_SIZE 512
24 uint8_t fillbuf[FILLBUF_SIZE];
25 int l;
Paolo Bonzini24addbc2013-04-10 17:49:04 +020026 bool error = false;
David Gibsond86a77f2012-06-27 14:50:38 +100027
28 memset(fillbuf, c, FILLBUF_SIZE);
29 while (len > 0) {
30 l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
Peter Maydell5c9eb022015-04-26 16:49:24 +010031 error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
32 fillbuf, l, true);
Benjamin Herrenschmidtbc9b78d2012-08-14 17:41:47 +100033 len -= l;
34 addr += l;
David Gibsond86a77f2012-06-27 14:50:38 +100035 }
David Gibsone5332e62012-06-27 14:50:43 +100036
Paolo Bonzini24addbc2013-04-10 17:49:04 +020037 return error;
David Gibsond86a77f2012-06-27 14:50:38 +100038}
39
Paolo Bonzinif487b672013-06-03 14:17:19 +020040void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
41 AddressSpace *as)
aliguori244ab902009-02-05 21:23:50 +000042{
Anthony Liguori7267c092011-08-20 22:09:37 -050043 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
aliguori244ab902009-02-05 21:23:50 +000044 qsg->nsg = 0;
45 qsg->nalloc = alloc_hint;
46 qsg->size = 0;
Paolo Bonzinidf32fd12013-04-10 18:15:49 +020047 qsg->as = as;
Paolo Bonzinif487b672013-06-03 14:17:19 +020048 qsg->dev = dev;
49 object_ref(OBJECT(dev));
aliguori244ab902009-02-05 21:23:50 +000050}
51
David Gibsond3231182011-10-31 17:06:46 +110052void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
aliguori244ab902009-02-05 21:23:50 +000053{
54 if (qsg->nsg == qsg->nalloc) {
55 qsg->nalloc = 2 * qsg->nalloc + 1;
Anthony Liguori7267c092011-08-20 22:09:37 -050056 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
aliguori244ab902009-02-05 21:23:50 +000057 }
58 qsg->sg[qsg->nsg].base = base;
59 qsg->sg[qsg->nsg].len = len;
60 qsg->size += len;
61 ++qsg->nsg;
62}
63
64void qemu_sglist_destroy(QEMUSGList *qsg)
65{
Paolo Bonzinif487b672013-06-03 14:17:19 +020066 object_unref(OBJECT(qsg->dev));
Anthony Liguori7267c092011-08-20 22:09:37 -050067 g_free(qsg->sg);
Jason Baronea8d82a2012-08-03 15:57:10 -040068 memset(qsg, 0, sizeof(*qsg));
aliguori244ab902009-02-05 21:23:50 +000069}
70
aliguori59a703e2009-02-05 21:23:58 +000071typedef struct {
Markus Armbruster7c84b1b2014-10-07 13:59:14 +020072 BlockAIOCB common;
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +020073 AioContext *ctx;
Markus Armbruster7c84b1b2014-10-07 13:59:14 +020074 BlockAIOCB *acb;
aliguori59a703e2009-02-05 21:23:58 +000075 QEMUSGList *sg;
Eric Blaked4f510e2016-05-06 10:26:31 -060076 uint64_t offset;
David Gibson43cf8ae2012-03-27 13:42:23 +110077 DMADirection dir;
aliguori59a703e2009-02-05 21:23:58 +000078 int sg_cur_index;
David Gibsond3231182011-10-31 17:06:46 +110079 dma_addr_t sg_cur_byte;
aliguori59a703e2009-02-05 21:23:58 +000080 QEMUIOVector iov;
81 QEMUBH *bh;
Christoph Hellwigcb144cc2011-05-19 10:57:59 +020082 DMAIOFunc *io_func;
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +020083 void *io_func_opaque;
aliguori37b78422009-03-20 18:26:16 +000084} DMAAIOCB;
aliguori59a703e2009-02-05 21:23:58 +000085
Markus Armbruster4be74632014-10-07 13:59:18 +020086static void dma_blk_cb(void *opaque, int ret);
aliguori59a703e2009-02-05 21:23:58 +000087
88static void reschedule_dma(void *opaque)
89{
aliguori37b78422009-03-20 18:26:16 +000090 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
aliguori59a703e2009-02-05 21:23:58 +000091
92 qemu_bh_delete(dbs->bh);
93 dbs->bh = NULL;
Markus Armbruster4be74632014-10-07 13:59:18 +020094 dma_blk_cb(dbs, 0);
aliguori59a703e2009-02-05 21:23:58 +000095}
96
Markus Armbruster4be74632014-10-07 13:59:18 +020097static void dma_blk_unmap(DMAAIOCB *dbs)
aliguori59a703e2009-02-05 21:23:58 +000098{
aliguori59a703e2009-02-05 21:23:58 +000099 int i;
100
aliguori59a703e2009-02-05 21:23:58 +0000101 for (i = 0; i < dbs->iov.niov; ++i) {
Paolo Bonzinidf32fd12013-04-10 18:15:49 +0200102 dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base,
David Gibsonc65bcef2012-06-27 14:50:40 +1000103 dbs->iov.iov[i].iov_len, dbs->dir,
104 dbs->iov.iov[i].iov_len);
aliguori59a703e2009-02-05 21:23:58 +0000105 }
Paolo Bonzinic3adb5b2011-09-16 16:40:02 +0200106 qemu_iovec_reset(&dbs->iov);
107}
108
109static void dma_complete(DMAAIOCB *dbs, int ret)
110{
Kevin Wolfc57c4652011-11-24 06:15:28 -0500111 trace_dma_complete(dbs, ret, dbs->common.cb);
112
Markus Armbruster4be74632014-10-07 13:59:18 +0200113 dma_blk_unmap(dbs);
Paolo Bonzinic3adb5b2011-09-16 16:40:02 +0200114 if (dbs->common.cb) {
115 dbs->common.cb(dbs->common.opaque, ret);
116 }
117 qemu_iovec_destroy(&dbs->iov);
118 if (dbs->bh) {
119 qemu_bh_delete(dbs->bh);
120 dbs->bh = NULL;
121 }
Fam Zheng80074292014-09-11 13:41:28 +0800122 qemu_aio_unref(dbs);
aliguori7403b142009-03-28 16:11:25 +0000123}
124
Markus Armbruster4be74632014-10-07 13:59:18 +0200125static void dma_blk_cb(void *opaque, int ret)
aliguori7403b142009-03-28 16:11:25 +0000126{
127 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
David Gibsonc65bcef2012-06-27 14:50:40 +1000128 dma_addr_t cur_addr, cur_len;
aliguori7403b142009-03-28 16:11:25 +0000129 void *mem;
130
Markus Armbruster4be74632014-10-07 13:59:18 +0200131 trace_dma_blk_cb(dbs, ret);
Kevin Wolfc57c4652011-11-24 06:15:28 -0500132
aliguori7403b142009-03-28 16:11:25 +0000133 dbs->acb = NULL;
Eric Blaked4f510e2016-05-06 10:26:31 -0600134 dbs->offset += dbs->iov.size;
aliguori59a703e2009-02-05 21:23:58 +0000135
136 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
Paolo Bonzinic3adb5b2011-09-16 16:40:02 +0200137 dma_complete(dbs, ret);
aliguori59a703e2009-02-05 21:23:58 +0000138 return;
139 }
Markus Armbruster4be74632014-10-07 13:59:18 +0200140 dma_blk_unmap(dbs);
aliguori59a703e2009-02-05 21:23:58 +0000141
142 while (dbs->sg_cur_index < dbs->sg->nsg) {
143 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
144 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
Paolo Bonzinidf32fd12013-04-10 18:15:49 +0200145 mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
aliguori59a703e2009-02-05 21:23:58 +0000146 if (!mem)
147 break;
148 qemu_iovec_add(&dbs->iov, mem, cur_len);
149 dbs->sg_cur_byte += cur_len;
150 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
151 dbs->sg_cur_byte = 0;
152 ++dbs->sg_cur_index;
153 }
154 }
155
156 if (dbs->iov.size == 0) {
Kevin Wolfc57c4652011-11-24 06:15:28 -0500157 trace_dma_map_wait(dbs);
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200158 dbs->bh = aio_bh_new(dbs->ctx, reschedule_dma, dbs);
Fam Zhenge95205e2015-03-16 17:03:37 +0800159 cpu_register_map_client(dbs->bh);
aliguori59a703e2009-02-05 21:23:58 +0000160 return;
161 }
162
Kevin Wolf58f423f2014-07-09 19:17:30 +0200163 if (dbs->iov.size & ~BDRV_SECTOR_MASK) {
164 qemu_iovec_discard_back(&dbs->iov, dbs->iov.size & ~BDRV_SECTOR_MASK);
165 }
166
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200167 dbs->acb = dbs->io_func(dbs->offset, &dbs->iov,
168 dma_blk_cb, dbs, dbs->io_func_opaque);
Paolo Bonzini6bee44e2011-11-14 17:50:52 +0100169 assert(dbs->acb);
aliguori59a703e2009-02-05 21:23:58 +0000170}
171
Markus Armbruster7c84b1b2014-10-07 13:59:14 +0200172static void dma_aio_cancel(BlockAIOCB *acb)
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200173{
174 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
175
Kevin Wolfc57c4652011-11-24 06:15:28 -0500176 trace_dma_aio_cancel(dbs);
177
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200178 if (dbs->acb) {
Markus Armbruster4be74632014-10-07 13:59:18 +0200179 blk_aio_cancel_async(dbs->acb);
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200180 }
Fam Zhenge95205e2015-03-16 17:03:37 +0800181 if (dbs->bh) {
182 cpu_unregister_map_client(dbs->bh);
183 qemu_bh_delete(dbs->bh);
184 dbs->bh = NULL;
185 }
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200186}
187
Fam Zheng9bb9da42014-09-11 13:41:14 +0800188
Stefan Hajnoczid7331be2012-10-31 16:34:37 +0100189static const AIOCBInfo dma_aiocb_info = {
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200190 .aiocb_size = sizeof(DMAAIOCB),
Fam Zheng9bb9da42014-09-11 13:41:14 +0800191 .cancel_async = dma_aio_cancel,
Christoph Hellwigc16b5a22009-05-25 12:37:32 +0200192};
193
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200194BlockAIOCB *dma_blk_io(AioContext *ctx,
195 QEMUSGList *sg, uint64_t offset,
196 DMAIOFunc *io_func, void *io_func_opaque,
197 BlockCompletionFunc *cb,
David Gibson43cf8ae2012-03-27 13:42:23 +1100198 void *opaque, DMADirection dir)
aliguori59a703e2009-02-05 21:23:58 +0000199{
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200200 DMAAIOCB *dbs = qemu_aio_get(&dma_aiocb_info, NULL, cb, opaque);
aliguori59a703e2009-02-05 21:23:58 +0000201
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200202 trace_dma_blk_io(dbs, io_func_opaque, offset, (dir == DMA_DIRECTION_TO_DEVICE));
Kevin Wolfc57c4652011-11-24 06:15:28 -0500203
aliguori37b78422009-03-20 18:26:16 +0000204 dbs->acb = NULL;
aliguori59a703e2009-02-05 21:23:58 +0000205 dbs->sg = sg;
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200206 dbs->ctx = ctx;
Paolo Bonzinicbe0ed62016-05-23 14:54:05 +0200207 dbs->offset = offset;
aliguori59a703e2009-02-05 21:23:58 +0000208 dbs->sg_cur_index = 0;
209 dbs->sg_cur_byte = 0;
David Gibson43cf8ae2012-03-27 13:42:23 +1100210 dbs->dir = dir;
Christoph Hellwigcb144cc2011-05-19 10:57:59 +0200211 dbs->io_func = io_func;
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200212 dbs->io_func_opaque = io_func_opaque;
aliguori59a703e2009-02-05 21:23:58 +0000213 dbs->bh = NULL;
214 qemu_iovec_init(&dbs->iov, sg->nsg);
Markus Armbruster4be74632014-10-07 13:59:18 +0200215 dma_blk_cb(dbs, 0);
aliguori37b78422009-03-20 18:26:16 +0000216 return &dbs->common;
aliguori59a703e2009-02-05 21:23:58 +0000217}
218
219
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200220static
221BlockAIOCB *dma_blk_read_io_func(int64_t offset, QEMUIOVector *iov,
222 BlockCompletionFunc *cb, void *cb_opaque,
223 void *opaque)
224{
225 BlockBackend *blk = opaque;
226 return blk_aio_preadv(blk, offset, iov, 0, cb, cb_opaque);
227}
228
Markus Armbruster4be74632014-10-07 13:59:18 +0200229BlockAIOCB *dma_blk_read(BlockBackend *blk,
Paolo Bonzinicbe0ed62016-05-23 14:54:05 +0200230 QEMUSGList *sg, uint64_t offset,
Markus Armbruster4be74632014-10-07 13:59:18 +0200231 void (*cb)(void *opaque, int ret), void *opaque)
232{
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200233 return dma_blk_io(blk_get_aio_context(blk),
234 sg, offset, dma_blk_read_io_func, blk, cb, opaque,
Markus Armbruster4be74632014-10-07 13:59:18 +0200235 DMA_DIRECTION_FROM_DEVICE);
236}
237
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200238static
239BlockAIOCB *dma_blk_write_io_func(int64_t offset, QEMUIOVector *iov,
240 BlockCompletionFunc *cb, void *cb_opaque,
241 void *opaque)
242{
243 BlockBackend *blk = opaque;
244 return blk_aio_pwritev(blk, offset, iov, 0, cb, cb_opaque);
245}
246
Markus Armbruster4be74632014-10-07 13:59:18 +0200247BlockAIOCB *dma_blk_write(BlockBackend *blk,
Paolo Bonzinicbe0ed62016-05-23 14:54:05 +0200248 QEMUSGList *sg, uint64_t offset,
Markus Armbruster7c84b1b2014-10-07 13:59:14 +0200249 void (*cb)(void *opaque, int ret), void *opaque)
aliguori59a703e2009-02-05 21:23:58 +0000250{
Paolo Bonzini8a8e63e2016-05-23 14:54:06 +0200251 return dma_blk_io(blk_get_aio_context(blk),
252 sg, offset, dma_blk_write_io_func, blk, cb, opaque,
Markus Armbruster4be74632014-10-07 13:59:18 +0200253 DMA_DIRECTION_TO_DEVICE);
aliguori59a703e2009-02-05 21:23:58 +0000254}
Paolo Bonzini8171ee32011-07-06 08:02:14 +0200255
256
David Gibsonc65bcef2012-06-27 14:50:40 +1000257static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
258 DMADirection dir)
Paolo Bonzini8171ee32011-07-06 08:02:14 +0200259{
260 uint64_t resid;
261 int sg_cur_index;
262
263 resid = sg->size;
264 sg_cur_index = 0;
265 len = MIN(len, resid);
266 while (len > 0) {
267 ScatterGatherEntry entry = sg->sg[sg_cur_index++];
268 int32_t xfer = MIN(len, entry.len);
Paolo Bonzinidf32fd12013-04-10 18:15:49 +0200269 dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
Paolo Bonzini8171ee32011-07-06 08:02:14 +0200270 ptr += xfer;
271 len -= xfer;
272 resid -= xfer;
273 }
274
275 return resid;
276}
277
278uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
279{
David Gibsonc65bcef2012-06-27 14:50:40 +1000280 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
Paolo Bonzini8171ee32011-07-06 08:02:14 +0200281}
282
283uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
284{
David Gibsonc65bcef2012-06-27 14:50:40 +1000285 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
Paolo Bonzini8171ee32011-07-06 08:02:14 +0200286}
Paolo Bonzini84a69352011-09-05 14:20:29 +0200287
Markus Armbruster4be74632014-10-07 13:59:18 +0200288void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
Paolo Bonzini84a69352011-09-05 14:20:29 +0200289 QEMUSGList *sg, enum BlockAcctType type)
290{
Markus Armbruster4be74632014-10-07 13:59:18 +0200291 block_acct_start(blk_get_stats(blk), cookie, sg->size, type);
Paolo Bonzini84a69352011-09-05 14:20:29 +0200292}