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bellardd19893d2003-06-15 19:58:51 +00001/*
2 * Host code generation
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardd19893d2003-06-15 19:58:51 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
aurel32fad6cb12009-01-04 22:05:52 +000018 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
bellardd19893d2003-06-15 19:58:51 +000019 */
20#include <stdarg.h>
21#include <stdlib.h>
22#include <stdio.h>
23#include <string.h>
24#include <inttypes.h>
25
26#include "config.h"
bellard20543962003-06-15 23:28:43 +000027
bellardaf5ad102004-01-04 23:28:12 +000028#define NO_CPU_IO_DEFS
bellardd3eead22003-09-30 20:59:51 +000029#include "cpu.h"
30#include "exec-all.h"
bellardd19893d2003-06-15 19:58:51 +000031#include "disas.h"
bellard57fec1f2008-02-01 10:50:11 +000032#include "tcg.h"
bellardd19893d2003-06-15 19:58:51 +000033
bellard57fec1f2008-02-01 10:50:11 +000034/* code generation context */
35TCGContext tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000036
bellardd19893d2003-06-15 19:58:51 +000037uint16_t gen_opc_buf[OPC_BUF_SIZE];
bellard57fec1f2008-02-01 10:50:11 +000038TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
bellardc4687872005-01-03 23:44:44 +000039
40target_ulong gen_opc_pc[OPC_BUF_SIZE];
pbrook2e70f6e2008-06-29 01:03:05 +000041uint16_t gen_opc_icount[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000042uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000043#if defined(TARGET_I386)
44uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
bellarde95c8d52004-09-30 22:22:08 +000045#elif defined(TARGET_SPARC)
bellardc4687872005-01-03 23:44:44 +000046target_ulong gen_opc_npc[OPC_BUF_SIZE];
bellardc3278b72005-03-20 12:43:29 +000047target_ulong gen_opc_jump_pc[2];
ths823029f2007-12-02 06:10:04 +000048#elif defined(TARGET_MIPS) || defined(TARGET_SH4)
bellard30d6cb82005-12-05 19:56:07 +000049uint32_t gen_opc_hflags[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000050#endif
bellardd19893d2003-06-15 19:58:51 +000051
bellard57fec1f2008-02-01 10:50:11 +000052/* XXX: suppress that */
blueswir1d07bde82007-12-11 19:35:45 +000053unsigned long code_gen_max_block_size(void)
54{
55 static unsigned long max;
56
57 if (max == 0) {
pbrooka208e542008-03-31 17:07:36 +000058 max = TCG_MAX_OP_SIZE;
blueswir1d07bde82007-12-11 19:35:45 +000059#define DEF(s, n, copy_size) max = copy_size > max? copy_size : max;
bellard57fec1f2008-02-01 10:50:11 +000060#include "tcg-opc.h"
blueswir1d07bde82007-12-11 19:35:45 +000061#undef DEF
62 max *= OPC_MAX_SIZE;
63 }
64
65 return max;
66}
67
bellard57fec1f2008-02-01 10:50:11 +000068void cpu_gen_init(void)
69{
70 tcg_context_init(&tcg_ctx);
71 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
blueswir1a20e31d2008-04-08 19:29:54 +000072 CPU_TEMP_BUF_NLONGS * sizeof(long));
bellard57fec1f2008-02-01 10:50:11 +000073}
74
bellardd19893d2003-06-15 19:58:51 +000075/* return non zero if the very first instruction is invalid so that
ths5fafdf22007-09-16 21:08:06 +000076 the virtual CPU can trigger an exception.
bellardd19893d2003-06-15 19:58:51 +000077
78 '*gen_code_size_ptr' contains the size of the generated code (host
79 code).
80*/
blueswir1d07bde82007-12-11 19:35:45 +000081int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
bellardd19893d2003-06-15 19:58:51 +000082{
bellard57fec1f2008-02-01 10:50:11 +000083 TCGContext *s = &tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000084 uint8_t *gen_code_buf;
85 int gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000086#ifdef CONFIG_PROFILER
87 int64_t ti;
88#endif
89
90#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000091 s->tb_count1++; /* includes aborted translations because of
92 exceptions */
bellard57fec1f2008-02-01 10:50:11 +000093 ti = profile_getclock();
94#endif
95 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +000096
ths2cfc5f12008-07-18 18:01:29 +000097 gen_intermediate_code(env, tb);
98
bellardec6338b2007-11-08 14:25:03 +000099 /* generate machine code */
bellard57fec1f2008-02-01 10:50:11 +0000100 gen_code_buf = tb->tc_ptr;
bellardec6338b2007-11-08 14:25:03 +0000101 tb->tb_next_offset[0] = 0xffff;
102 tb->tb_next_offset[1] = 0xffff;
bellard57fec1f2008-02-01 10:50:11 +0000103 s->tb_next_offset = tb->tb_next_offset;
bellard4cbb86e2003-09-17 22:53:29 +0000104#ifdef USE_DIRECT_JUMP
bellard57fec1f2008-02-01 10:50:11 +0000105 s->tb_jmp_offset = tb->tb_jmp_offset;
106 s->tb_next = NULL;
bellardec6338b2007-11-08 14:25:03 +0000107 /* the following two entries are optional (only used for string ops) */
bellard57fec1f2008-02-01 10:50:11 +0000108 /* XXX: not used ? */
bellardec6338b2007-11-08 14:25:03 +0000109 tb->tb_jmp_offset[2] = 0xffff;
110 tb->tb_jmp_offset[3] = 0xffff;
bellardd19893d2003-06-15 19:58:51 +0000111#else
bellard57fec1f2008-02-01 10:50:11 +0000112 s->tb_jmp_offset = NULL;
113 s->tb_next = tb->tb_next;
bellardd19893d2003-06-15 19:58:51 +0000114#endif
bellard57fec1f2008-02-01 10:50:11 +0000115
116#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000117 s->tb_count++;
118 s->interm_time += profile_getclock() - ti;
119 s->code_time -= profile_getclock();
bellard57fec1f2008-02-01 10:50:11 +0000120#endif
aurel3254604f72008-12-07 20:35:00 +0000121 gen_code_size = tcg_gen_code(s, gen_code_buf);
bellardd19893d2003-06-15 19:58:51 +0000122 *gen_code_size_ptr = gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +0000123#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000124 s->code_time += profile_getclock();
125 s->code_in_len += tb->size;
126 s->code_out_len += gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +0000127#endif
128
bellardd19893d2003-06-15 19:58:51 +0000129#ifdef DEBUG_DISAS
aliguori8fec2b82009-01-15 22:36:53 +0000130 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
aliguori93fcfe32009-01-15 22:34:14 +0000131 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
132 log_disas(tb->tc_ptr, *gen_code_size_ptr);
133 qemu_log("\n");
aliguori31b1a7b2009-01-15 22:35:09 +0000134 qemu_log_flush();
bellardd19893d2003-06-15 19:58:51 +0000135 }
136#endif
137 return 0;
138}
139
ths5fafdf22007-09-16 21:08:06 +0000140/* The cpu state corresponding to 'searched_pc' is restored.
bellardd19893d2003-06-15 19:58:51 +0000141 */
ths5fafdf22007-09-16 21:08:06 +0000142int cpu_restore_state(TranslationBlock *tb,
bellard58fe2f12004-02-16 22:11:32 +0000143 CPUState *env, unsigned long searched_pc,
144 void *puc)
bellardd19893d2003-06-15 19:58:51 +0000145{
bellard57fec1f2008-02-01 10:50:11 +0000146 TCGContext *s = &tcg_ctx;
147 int j;
bellardd19893d2003-06-15 19:58:51 +0000148 unsigned long tc_ptr;
bellard57fec1f2008-02-01 10:50:11 +0000149#ifdef CONFIG_PROFILER
150 int64_t ti;
151#endif
152
153#ifdef CONFIG_PROFILER
154 ti = profile_getclock();
155#endif
156 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +0000157
ths2cfc5f12008-07-18 18:01:29 +0000158 gen_intermediate_code_pc(env, tb);
ths3b46e622007-09-17 08:09:54 +0000159
pbrook2e70f6e2008-06-29 01:03:05 +0000160 if (use_icount) {
161 /* Reset the cycle counter to the start of the block. */
162 env->icount_decr.u16.low += tb->icount;
163 /* Clear the IO flag. */
164 env->can_do_io = 0;
165 }
166
bellardd19893d2003-06-15 19:58:51 +0000167 /* find opc index corresponding to search_pc */
168 tc_ptr = (unsigned long)tb->tc_ptr;
169 if (searched_pc < tc_ptr)
170 return -1;
bellard57fec1f2008-02-01 10:50:11 +0000171
172 s->tb_next_offset = tb->tb_next_offset;
173#ifdef USE_DIRECT_JUMP
174 s->tb_jmp_offset = tb->tb_jmp_offset;
175 s->tb_next = NULL;
176#else
177 s->tb_jmp_offset = NULL;
178 s->tb_next = tb->tb_next;
179#endif
aurel3254604f72008-12-07 20:35:00 +0000180 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
bellard57fec1f2008-02-01 10:50:11 +0000181 if (j < 0)
182 return -1;
bellardd19893d2003-06-15 19:58:51 +0000183 /* now find start of instruction before */
184 while (gen_opc_instr_start[j] == 0)
185 j--;
pbrook2e70f6e2008-06-29 01:03:05 +0000186 env->icount_decr.u16.low -= gen_opc_icount[j];
ths3b46e622007-09-17 08:09:54 +0000187
aurel32d2856f12008-04-28 00:32:32 +0000188 gen_pc_load(env, tb, searched_pc, j, puc);
bellard57fec1f2008-02-01 10:50:11 +0000189
190#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000191 s->restore_time += profile_getclock() - ti;
192 s->restore_count++;
bellard57fec1f2008-02-01 10:50:11 +0000193#endif
bellardd19893d2003-06-15 19:58:51 +0000194 return 0;
195}