Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Tiny Code Generator for QEMU |
| 3 | * |
| 4 | * Copyright (c) 2009 Ulrich Hecht <uli@suse.de> |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
Markus Armbruster | 14e54f8 | 2016-06-29 11:14:47 +0200 | [diff] [blame] | 24 | |
| 25 | #ifndef S390_TCG_TARGET_H |
| 26 | #define S390_TCG_TARGET_H |
Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 27 | |
Richard Henderson | 8c081b1 | 2014-04-25 10:18:59 -0400 | [diff] [blame] | 28 | #define TCG_TARGET_INSN_UNIT_SIZE 2 |
| 29 | |
Richard Henderson | 26a75d1 | 2021-03-09 23:30:38 -0600 | [diff] [blame] | 30 | /* We have a +- 4GB range on the branches; leave some slop. */ |
| 31 | #define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) |
| 32 | |
Richard Henderson | 48bb375 | 2010-06-28 19:15:37 -0700 | [diff] [blame] | 33 | typedef enum TCGReg { |
Richard Henderson | eee6251 | 2019-04-27 17:09:38 -0700 | [diff] [blame] | 34 | TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, |
| 35 | TCG_REG_R4, TCG_REG_R5, TCG_REG_R6, TCG_REG_R7, |
| 36 | TCG_REG_R8, TCG_REG_R9, TCG_REG_R10, TCG_REG_R11, |
| 37 | TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15, |
| 38 | |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 39 | TCG_REG_V0 = 32, TCG_REG_V1, TCG_REG_V2, TCG_REG_V3, |
| 40 | TCG_REG_V4, TCG_REG_V5, TCG_REG_V6, TCG_REG_V7, |
| 41 | TCG_REG_V8, TCG_REG_V9, TCG_REG_V10, TCG_REG_V11, |
| 42 | TCG_REG_V12, TCG_REG_V13, TCG_REG_V14, TCG_REG_V15, |
| 43 | TCG_REG_V16, TCG_REG_V17, TCG_REG_V18, TCG_REG_V19, |
| 44 | TCG_REG_V20, TCG_REG_V21, TCG_REG_V22, TCG_REG_V23, |
| 45 | TCG_REG_V24, TCG_REG_V25, TCG_REG_V26, TCG_REG_V27, |
| 46 | TCG_REG_V28, TCG_REG_V29, TCG_REG_V30, TCG_REG_V31, |
| 47 | |
Richard Henderson | eee6251 | 2019-04-27 17:09:38 -0700 | [diff] [blame] | 48 | TCG_AREG0 = TCG_REG_R10, |
| 49 | TCG_REG_CALL_STACK = TCG_REG_R15 |
Richard Henderson | 48bb375 | 2010-06-28 19:15:37 -0700 | [diff] [blame] | 50 | } TCGReg; |
| 51 | |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 52 | #define TCG_TARGET_NB_REGS 64 |
Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 53 | |
Richard Henderson | 761ea52 | 2022-12-07 16:08:46 +0000 | [diff] [blame] | 54 | /* Facilities required for proper operation; checked at startup. */ |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 55 | |
Richard Henderson | 748b7f3 | 2019-04-27 16:51:09 -0700 | [diff] [blame] | 56 | #define FACILITY_ZARCH_ACTIVE 2 |
| 57 | #define FACILITY_LONG_DISP 18 |
Richard Henderson | 3e25f7d | 2022-12-07 16:28:07 +0000 | [diff] [blame] | 58 | #define FACILITY_EXT_IMM 21 |
Richard Henderson | 9c3bfb7 | 2022-12-07 16:51:27 +0000 | [diff] [blame] | 59 | #define FACILITY_GEN_INST_EXT 34 |
Richard Henderson | c68d5b7 | 2022-12-07 17:38:42 +0000 | [diff] [blame] | 60 | #define FACILITY_45 45 |
Richard Henderson | 761ea52 | 2022-12-07 16:08:46 +0000 | [diff] [blame] | 61 | |
| 62 | /* Facilities that are checked at runtime. */ |
| 63 | |
Richard Henderson | 748b7f3 | 2019-04-27 16:51:09 -0700 | [diff] [blame] | 64 | #define FACILITY_LOAD_ON_COND2 53 |
Richard Henderson | 92c89a0 | 2022-02-24 01:28:44 +0000 | [diff] [blame] | 65 | #define FACILITY_MISC_INSN_EXT2 58 |
Richard Henderson | 6c9b5c0 | 2022-02-24 00:04:25 +0000 | [diff] [blame] | 66 | #define FACILITY_MISC_INSN_EXT3 61 |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 67 | #define FACILITY_VECTOR 129 |
Richard Henderson | ae77bbe | 2020-09-14 18:23:16 -0700 | [diff] [blame] | 68 | #define FACILITY_VECTOR_ENH1 135 |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 69 | |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 70 | extern uint64_t s390_facilities[3]; |
Richard Henderson | 748b7f3 | 2019-04-27 16:51:09 -0700 | [diff] [blame] | 71 | |
| 72 | #define HAVE_FACILITY(X) \ |
| 73 | ((s390_facilities[FACILITY_##X / 64] >> (63 - FACILITY_##X % 64)) & 1) |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 74 | |
Richard Henderson | 3682825 | 2010-02-18 14:44:39 -0800 | [diff] [blame] | 75 | /* optional instructions */ |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 76 | #define TCG_TARGET_HAS_div2_i32 1 |
| 77 | #define TCG_TARGET_HAS_rot_i32 1 |
| 78 | #define TCG_TARGET_HAS_ext8s_i32 1 |
| 79 | #define TCG_TARGET_HAS_ext16s_i32 1 |
| 80 | #define TCG_TARGET_HAS_ext8u_i32 1 |
| 81 | #define TCG_TARGET_HAS_ext16u_i32 1 |
| 82 | #define TCG_TARGET_HAS_bswap16_i32 1 |
| 83 | #define TCG_TARGET_HAS_bswap32_i32 1 |
Richard Henderson | 6c9b5c0 | 2022-02-24 00:04:25 +0000 | [diff] [blame] | 84 | #define TCG_TARGET_HAS_not_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
Richard Henderson | 6c9b5c0 | 2022-02-24 00:04:25 +0000 | [diff] [blame] | 85 | #define TCG_TARGET_HAS_andc_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
| 86 | #define TCG_TARGET_HAS_orc_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
| 87 | #define TCG_TARGET_HAS_eqv_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
| 88 | #define TCG_TARGET_HAS_nand_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
| 89 | #define TCG_TARGET_HAS_nor_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 90 | #define TCG_TARGET_HAS_clz_i32 0 |
| 91 | #define TCG_TARGET_HAS_ctz_i32 0 |
Richard Henderson | 29a5ea7 | 2022-02-24 00:43:18 +0000 | [diff] [blame] | 92 | #define TCG_TARGET_HAS_ctpop_i32 1 |
Richard Henderson | 9c3bfb7 | 2022-12-07 16:51:27 +0000 | [diff] [blame] | 93 | #define TCG_TARGET_HAS_deposit_i32 1 |
| 94 | #define TCG_TARGET_HAS_extract_i32 1 |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 95 | #define TCG_TARGET_HAS_sextract_i32 0 |
Richard Henderson | fce1296 | 2019-02-25 10:29:25 -0800 | [diff] [blame] | 96 | #define TCG_TARGET_HAS_extract2_i32 0 |
Richard Henderson | 128c7d5 | 2023-08-05 18:55:54 +0000 | [diff] [blame] | 97 | #define TCG_TARGET_HAS_negsetcond_i32 1 |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 98 | #define TCG_TARGET_HAS_add2_i32 1 |
| 99 | #define TCG_TARGET_HAS_sub2_i32 1 |
| 100 | #define TCG_TARGET_HAS_mulu2_i32 0 |
| 101 | #define TCG_TARGET_HAS_muls2_i32 0 |
| 102 | #define TCG_TARGET_HAS_muluh_i32 0 |
| 103 | #define TCG_TARGET_HAS_mulsh_i32 0 |
Richard Henderson | 13d885b | 2023-08-22 10:51:10 -0700 | [diff] [blame] | 104 | #define TCG_TARGET_HAS_extr_i64_i32 0 |
Richard Henderson | 07ce0b0 | 2020-12-09 13:58:39 -0600 | [diff] [blame] | 105 | #define TCG_TARGET_HAS_qemu_st8_i32 0 |
Richard Henderson | 3682825 | 2010-02-18 14:44:39 -0800 | [diff] [blame] | 106 | |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 107 | #define TCG_TARGET_HAS_div2_i64 1 |
| 108 | #define TCG_TARGET_HAS_rot_i64 1 |
| 109 | #define TCG_TARGET_HAS_ext8s_i64 1 |
| 110 | #define TCG_TARGET_HAS_ext16s_i64 1 |
| 111 | #define TCG_TARGET_HAS_ext32s_i64 1 |
| 112 | #define TCG_TARGET_HAS_ext8u_i64 1 |
| 113 | #define TCG_TARGET_HAS_ext16u_i64 1 |
| 114 | #define TCG_TARGET_HAS_ext32u_i64 1 |
| 115 | #define TCG_TARGET_HAS_bswap16_i64 1 |
| 116 | #define TCG_TARGET_HAS_bswap32_i64 1 |
| 117 | #define TCG_TARGET_HAS_bswap64_i64 1 |
Richard Henderson | 6c9b5c0 | 2022-02-24 00:04:25 +0000 | [diff] [blame] | 118 | #define TCG_TARGET_HAS_not_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
Richard Henderson | 6c9b5c0 | 2022-02-24 00:04:25 +0000 | [diff] [blame] | 119 | #define TCG_TARGET_HAS_andc_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
| 120 | #define TCG_TARGET_HAS_orc_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
| 121 | #define TCG_TARGET_HAS_eqv_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
| 122 | #define TCG_TARGET_HAS_nand_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
| 123 | #define TCG_TARGET_HAS_nor_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
Richard Henderson | 3e25f7d | 2022-12-07 16:28:07 +0000 | [diff] [blame] | 124 | #define TCG_TARGET_HAS_clz_i64 1 |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 125 | #define TCG_TARGET_HAS_ctz_i64 0 |
Richard Henderson | 29a5ea7 | 2022-02-24 00:43:18 +0000 | [diff] [blame] | 126 | #define TCG_TARGET_HAS_ctpop_i64 1 |
Richard Henderson | 9c3bfb7 | 2022-12-07 16:51:27 +0000 | [diff] [blame] | 127 | #define TCG_TARGET_HAS_deposit_i64 1 |
| 128 | #define TCG_TARGET_HAS_extract_i64 1 |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 129 | #define TCG_TARGET_HAS_sextract_i64 0 |
Richard Henderson | fce1296 | 2019-02-25 10:29:25 -0800 | [diff] [blame] | 130 | #define TCG_TARGET_HAS_extract2_i64 0 |
Richard Henderson | 128c7d5 | 2023-08-05 18:55:54 +0000 | [diff] [blame] | 131 | #define TCG_TARGET_HAS_negsetcond_i64 1 |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 132 | #define TCG_TARGET_HAS_add2_i64 1 |
| 133 | #define TCG_TARGET_HAS_sub2_i64 1 |
| 134 | #define TCG_TARGET_HAS_mulu2_i64 1 |
Richard Henderson | 668ce34 | 2022-02-24 01:35:43 +0000 | [diff] [blame] | 135 | #define TCG_TARGET_HAS_muls2_i64 HAVE_FACILITY(MISC_INSN_EXT2) |
Richard Henderson | b2c98d9 | 2016-10-17 11:24:38 -0400 | [diff] [blame] | 136 | #define TCG_TARGET_HAS_muluh_i64 0 |
| 137 | #define TCG_TARGET_HAS_mulsh_i64 0 |
Richard Henderson | d5690ea | 2013-03-27 09:30:58 -0400 | [diff] [blame] | 138 | |
Richard Henderson | 4caad79 | 2023-04-19 17:58:23 +0200 | [diff] [blame] | 139 | #define TCG_TARGET_HAS_qemu_ldst_i128 1 |
Richard Henderson | 12fde9b | 2022-11-07 10:42:56 +1100 | [diff] [blame] | 140 | |
Richard Henderson | 585b7a4 | 2023-10-25 02:57:58 +0000 | [diff] [blame] | 141 | #define TCG_TARGET_HAS_tst 1 |
Richard Henderson | caf3eac | 2024-01-09 08:46:19 +1100 | [diff] [blame] | 142 | |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 143 | #define TCG_TARGET_HAS_v64 HAVE_FACILITY(VECTOR) |
| 144 | #define TCG_TARGET_HAS_v128 HAVE_FACILITY(VECTOR) |
| 145 | #define TCG_TARGET_HAS_v256 0 |
| 146 | |
Richard Henderson | ae77bbe | 2020-09-14 18:23:16 -0700 | [diff] [blame] | 147 | #define TCG_TARGET_HAS_andc_vec 1 |
| 148 | #define TCG_TARGET_HAS_orc_vec HAVE_FACILITY(VECTOR_ENH1) |
Richard Henderson | 21eab5b | 2021-12-17 18:59:02 -0800 | [diff] [blame] | 149 | #define TCG_TARGET_HAS_nand_vec HAVE_FACILITY(VECTOR_ENH1) |
| 150 | #define TCG_TARGET_HAS_nor_vec 1 |
| 151 | #define TCG_TARGET_HAS_eqv_vec HAVE_FACILITY(VECTOR_ENH1) |
Richard Henderson | ae77bbe | 2020-09-14 18:23:16 -0700 | [diff] [blame] | 152 | #define TCG_TARGET_HAS_not_vec 1 |
| 153 | #define TCG_TARGET_HAS_neg_vec 1 |
| 154 | #define TCG_TARGET_HAS_abs_vec 1 |
Richard Henderson | 22cb37b | 2020-09-14 19:00:38 -0700 | [diff] [blame] | 155 | #define TCG_TARGET_HAS_roti_vec 1 |
| 156 | #define TCG_TARGET_HAS_rots_vec 1 |
| 157 | #define TCG_TARGET_HAS_rotv_vec 1 |
| 158 | #define TCG_TARGET_HAS_shi_vec 1 |
| 159 | #define TCG_TARGET_HAS_shs_vec 1 |
| 160 | #define TCG_TARGET_HAS_shv_vec 1 |
Richard Henderson | 479b61c | 2020-09-14 18:33:47 -0700 | [diff] [blame] | 161 | #define TCG_TARGET_HAS_mul_vec 1 |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 162 | #define TCG_TARGET_HAS_sat_vec 0 |
Richard Henderson | 220db7a | 2020-09-14 19:07:16 -0700 | [diff] [blame] | 163 | #define TCG_TARGET_HAS_minmax_vec 1 |
Richard Henderson | 9bca986 | 2020-09-14 20:36:36 -0700 | [diff] [blame] | 164 | #define TCG_TARGET_HAS_bitsel_vec 1 |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 165 | #define TCG_TARGET_HAS_cmpsel_vec 0 |
Richard Henderson | af8c14a | 2024-05-15 12:49:01 +0200 | [diff] [blame] | 166 | #define TCG_TARGET_HAS_tst_vec 0 |
Richard Henderson | 34ef767 | 2020-09-14 16:33:14 -0700 | [diff] [blame] | 167 | |
Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 168 | /* used for function call generation */ |
Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 169 | #define TCG_TARGET_STACK_ALIGN 8 |
Richard Henderson | a4924e8 | 2013-03-25 20:54:30 -0700 | [diff] [blame] | 170 | #define TCG_TARGET_CALL_STACK_OFFSET 160 |
Richard Henderson | eb8b022 | 2022-10-16 20:07:48 +1000 | [diff] [blame] | 171 | #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND |
Richard Henderson | c8eef96 | 2022-10-16 13:48:48 +1100 | [diff] [blame] | 172 | #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL |
Richard Henderson | 5427a9a | 2022-10-20 07:54:48 +1000 | [diff] [blame] | 173 | #define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF |
| 174 | #define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF |
Alexander Graf | 2827822 | 2009-12-05 12:44:23 +0100 | [diff] [blame] | 175 | |
Pranith Kumar | 71650df | 2017-08-29 02:33:11 -0400 | [diff] [blame] | 176 | #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) |
Richard Henderson | 659ef5c | 2017-07-30 12:30:41 -0700 | [diff] [blame] | 177 | #define TCG_TARGET_NEED_LDST_LABELS |
Richard Henderson | 28eef8a | 2017-07-31 19:16:02 -0700 | [diff] [blame] | 178 | #define TCG_TARGET_NEED_POOL_LABELS |
Richard Henderson | 659ef5c | 2017-07-30 12:30:41 -0700 | [diff] [blame] | 179 | |
Paolo Bonzini | cb9c377 | 2012-12-06 12:15:58 +0100 | [diff] [blame] | 180 | #endif |