bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 1 | /* |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 2 | * QEMU TCX Frame buffer |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 5 | * |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 24 | |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 25 | #include "console.h" |
blueswir1 | 9447084 | 2007-06-10 16:06:20 +0000 | [diff] [blame] | 26 | #include "pixel_ops.h" |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 27 | #include "sysbus.h" |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 28 | #include "qdev-addr.h" |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 29 | |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 30 | #define MAXX 1024 |
| 31 | #define MAXY 768 |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 32 | #define TCX_DAC_NREGS 16 |
blueswir1 | 8508b89 | 2007-05-06 17:39:55 +0000 | [diff] [blame] | 33 | #define TCX_THC_NREGS_8 0x081c |
| 34 | #define TCX_THC_NREGS_24 0x1000 |
| 35 | #define TCX_TEC_NREGS 0x1000 |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 36 | |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 37 | typedef struct TCXState { |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 38 | SysBusDevice busdev; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 39 | target_phys_addr_t addr; |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 40 | DisplayState *ds; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 41 | uint8_t *vram; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 42 | uint32_t *vram24, *cplane; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 43 | MemoryRegion vram_mem; |
| 44 | MemoryRegion vram_8bit; |
| 45 | MemoryRegion vram_24bit; |
| 46 | MemoryRegion vram_cplane; |
| 47 | MemoryRegion dac; |
| 48 | MemoryRegion tec; |
| 49 | MemoryRegion thc24; |
| 50 | MemoryRegion thc8; |
| 51 | ram_addr_t vram24_offset, cplane_offset; |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 52 | uint32_t vram_size; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 53 | uint32_t palette[256]; |
Blue Swirl | 427a66c | 2011-08-07 19:13:24 +0000 | [diff] [blame] | 54 | uint8_t r[256], g[256], b[256]; |
| 55 | uint16_t width, height, depth; |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 56 | uint8_t dac_index, dac_state; |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 57 | } TCXState; |
| 58 | |
Luiz Capitulino | d709813 | 2012-05-21 16:41:37 -0300 | [diff] [blame] | 59 | static void tcx_screen_dump(void *opaque, const char *filename, bool cswitch, |
| 60 | Error **errp); |
| 61 | static void tcx24_screen_dump(void *opaque, const char *filename, bool cswitch, |
| 62 | Error **errp); |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 63 | |
| 64 | static void tcx_set_dirty(TCXState *s) |
| 65 | { |
Blue Swirl | fd4aa97 | 2011-10-16 16:04:59 +0000 | [diff] [blame] | 66 | memory_region_set_dirty(&s->vram_mem, 0, MAXX * MAXY); |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | static void tcx24_set_dirty(TCXState *s) |
| 70 | { |
Blue Swirl | fd4aa97 | 2011-10-16 16:04:59 +0000 | [diff] [blame] | 71 | memory_region_set_dirty(&s->vram_mem, s->vram24_offset, MAXX * MAXY * 4); |
| 72 | memory_region_set_dirty(&s->vram_mem, s->cplane_offset, MAXX * MAXY * 4); |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 73 | } |
pbrook | 9521989 | 2006-04-09 01:06:34 +0000 | [diff] [blame] | 74 | |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 75 | static void update_palette_entries(TCXState *s, int start, int end) |
| 76 | { |
| 77 | int i; |
| 78 | for(i = start; i < end; i++) { |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 79 | switch(ds_get_bits_per_pixel(s->ds)) { |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 80 | default: |
| 81 | case 8: |
| 82 | s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]); |
| 83 | break; |
| 84 | case 15: |
aliguori | 8927bcf | 2009-01-15 22:07:16 +0000 | [diff] [blame] | 85 | s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]); |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 86 | break; |
| 87 | case 16: |
aliguori | 8927bcf | 2009-01-15 22:07:16 +0000 | [diff] [blame] | 88 | s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]); |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 89 | break; |
| 90 | case 32: |
aliguori | 7b5d76d | 2009-03-13 15:02:13 +0000 | [diff] [blame] | 91 | if (is_surface_bgr(s->ds->surface)) |
| 92 | s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); |
| 93 | else |
| 94 | s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 95 | break; |
| 96 | } |
| 97 | } |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 98 | if (s->depth == 24) { |
| 99 | tcx24_set_dirty(s); |
| 100 | } else { |
| 101 | tcx_set_dirty(s); |
| 102 | } |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 103 | } |
| 104 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 105 | static void tcx_draw_line32(TCXState *s1, uint8_t *d, |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 106 | const uint8_t *s, int width) |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 107 | { |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 108 | int x; |
| 109 | uint8_t val; |
ths | 8bdc215 | 2006-12-21 17:24:45 +0000 | [diff] [blame] | 110 | uint32_t *p = (uint32_t *)d; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 111 | |
| 112 | for(x = 0; x < width; x++) { |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 113 | val = *s++; |
ths | 8bdc215 | 2006-12-21 17:24:45 +0000 | [diff] [blame] | 114 | *p++ = s1->palette[val]; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 115 | } |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 116 | } |
| 117 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 118 | static void tcx_draw_line16(TCXState *s1, uint8_t *d, |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 119 | const uint8_t *s, int width) |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 120 | { |
| 121 | int x; |
| 122 | uint8_t val; |
ths | 8bdc215 | 2006-12-21 17:24:45 +0000 | [diff] [blame] | 123 | uint16_t *p = (uint16_t *)d; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 124 | |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 125 | for(x = 0; x < width; x++) { |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 126 | val = *s++; |
ths | 8bdc215 | 2006-12-21 17:24:45 +0000 | [diff] [blame] | 127 | *p++ = s1->palette[val]; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 128 | } |
| 129 | } |
| 130 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 131 | static void tcx_draw_line8(TCXState *s1, uint8_t *d, |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 132 | const uint8_t *s, int width) |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 133 | { |
| 134 | int x; |
| 135 | uint8_t val; |
| 136 | |
| 137 | for(x = 0; x < width; x++) { |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 138 | val = *s++; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 139 | *d++ = s1->palette[val]; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 140 | } |
| 141 | } |
| 142 | |
blueswir1 | 688ea2e | 2008-07-24 11:26:38 +0000 | [diff] [blame] | 143 | /* |
| 144 | XXX Could be much more optimal: |
| 145 | * detect if line/page/whole screen is in 24 bit mode |
| 146 | * if destination is also BGR, use memcpy |
| 147 | */ |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 148 | static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d, |
| 149 | const uint8_t *s, int width, |
| 150 | const uint32_t *cplane, |
| 151 | const uint32_t *s24) |
| 152 | { |
aliguori | 7b5d76d | 2009-03-13 15:02:13 +0000 | [diff] [blame] | 153 | int x, bgr, r, g, b; |
blueswir1 | 688ea2e | 2008-07-24 11:26:38 +0000 | [diff] [blame] | 154 | uint8_t val, *p8; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 155 | uint32_t *p = (uint32_t *)d; |
| 156 | uint32_t dval; |
| 157 | |
aliguori | 7b5d76d | 2009-03-13 15:02:13 +0000 | [diff] [blame] | 158 | bgr = is_surface_bgr(s1->ds->surface); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 159 | for(x = 0; x < width; x++, s++, s24++) { |
blueswir1 | 688ea2e | 2008-07-24 11:26:38 +0000 | [diff] [blame] | 160 | if ((be32_to_cpu(*cplane++) & 0xff000000) == 0x03000000) { |
| 161 | // 24-bit direct, BGR order |
| 162 | p8 = (uint8_t *)s24; |
| 163 | p8++; |
| 164 | b = *p8++; |
| 165 | g = *p8++; |
Blue Swirl | f7e683b | 2010-01-13 18:58:51 +0000 | [diff] [blame] | 166 | r = *p8; |
aliguori | 7b5d76d | 2009-03-13 15:02:13 +0000 | [diff] [blame] | 167 | if (bgr) |
| 168 | dval = rgb_to_pixel32bgr(r, g, b); |
| 169 | else |
| 170 | dval = rgb_to_pixel32(r, g, b); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 171 | } else { |
| 172 | val = *s; |
| 173 | dval = s1->palette[val]; |
| 174 | } |
| 175 | *p++ = dval; |
| 176 | } |
| 177 | } |
| 178 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 179 | static inline int check_dirty(TCXState *s, ram_addr_t page, ram_addr_t page24, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 180 | ram_addr_t cpage) |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 181 | { |
| 182 | int ret; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 183 | |
Blue Swirl | cd7a45c | 2012-01-22 16:38:21 +0000 | [diff] [blame] | 184 | ret = memory_region_get_dirty(&s->vram_mem, page, TARGET_PAGE_SIZE, |
| 185 | DIRTY_MEMORY_VGA); |
| 186 | ret |= memory_region_get_dirty(&s->vram_mem, page24, TARGET_PAGE_SIZE * 4, |
| 187 | DIRTY_MEMORY_VGA); |
| 188 | ret |= memory_region_get_dirty(&s->vram_mem, cpage, TARGET_PAGE_SIZE * 4, |
| 189 | DIRTY_MEMORY_VGA); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 190 | return ret; |
| 191 | } |
| 192 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 193 | static inline void reset_dirty(TCXState *ts, ram_addr_t page_min, |
| 194 | ram_addr_t page_max, ram_addr_t page24, |
| 195 | ram_addr_t cpage) |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 196 | { |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 197 | memory_region_reset_dirty(&ts->vram_mem, |
| 198 | page_min, page_max + TARGET_PAGE_SIZE, |
| 199 | DIRTY_MEMORY_VGA); |
| 200 | memory_region_reset_dirty(&ts->vram_mem, |
| 201 | page24 + page_min * 4, |
| 202 | page24 + page_max * 4 + TARGET_PAGE_SIZE, |
| 203 | DIRTY_MEMORY_VGA); |
| 204 | memory_region_reset_dirty(&ts->vram_mem, |
| 205 | cpage + page_min * 4, |
| 206 | cpage + page_max * 4 + TARGET_PAGE_SIZE, |
| 207 | DIRTY_MEMORY_VGA); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 208 | } |
| 209 | |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 210 | /* Fixed line length 1024 allows us to do nice tricks not possible on |
| 211 | VGA... */ |
pbrook | 9521989 | 2006-04-09 01:06:34 +0000 | [diff] [blame] | 212 | static void tcx_update_display(void *opaque) |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 213 | { |
| 214 | TCXState *ts = opaque; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 215 | ram_addr_t page, page_min, page_max; |
bellard | 550be12 | 2006-08-02 22:19:33 +0000 | [diff] [blame] | 216 | int y, y_start, dd, ds; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 217 | uint8_t *d, *s; |
blueswir1 | b3ceef2 | 2007-06-25 19:56:13 +0000 | [diff] [blame] | 218 | void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 219 | |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 220 | if (ds_get_bits_per_pixel(ts->ds) == 0) |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 221 | return; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 222 | page = 0; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 223 | y_start = -1; |
Blue Swirl | c0c440f | 2009-04-27 18:10:37 +0000 | [diff] [blame] | 224 | page_min = -1; |
bellard | 550be12 | 2006-08-02 22:19:33 +0000 | [diff] [blame] | 225 | page_max = 0; |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 226 | d = ds_get_data(ts->ds); |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 227 | s = ts->vram; |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 228 | dd = ds_get_linesize(ts->ds); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 229 | ds = 1024; |
| 230 | |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 231 | switch (ds_get_bits_per_pixel(ts->ds)) { |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 232 | case 32: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 233 | f = tcx_draw_line32; |
| 234 | break; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 235 | case 15: |
| 236 | case 16: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 237 | f = tcx_draw_line16; |
| 238 | break; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 239 | default: |
| 240 | case 8: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 241 | f = tcx_draw_line8; |
| 242 | break; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 243 | case 0: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 244 | return; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 245 | } |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 246 | |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 247 | for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE) { |
Blue Swirl | cd7a45c | 2012-01-22 16:38:21 +0000 | [diff] [blame] | 248 | if (memory_region_get_dirty(&ts->vram_mem, page, TARGET_PAGE_SIZE, |
| 249 | DIRTY_MEMORY_VGA)) { |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 250 | if (y_start < 0) |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 251 | y_start = y; |
| 252 | if (page < page_min) |
| 253 | page_min = page; |
| 254 | if (page > page_max) |
| 255 | page_max = page; |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 256 | f(ts, d, s, ts->width); |
| 257 | d += dd; |
| 258 | s += ds; |
| 259 | f(ts, d, s, ts->width); |
| 260 | d += dd; |
| 261 | s += ds; |
| 262 | f(ts, d, s, ts->width); |
| 263 | d += dd; |
| 264 | s += ds; |
| 265 | f(ts, d, s, ts->width); |
| 266 | d += dd; |
| 267 | s += ds; |
| 268 | } else { |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 269 | if (y_start >= 0) { |
| 270 | /* flush to display */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 271 | dpy_update(ts->ds, 0, y_start, |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 272 | ts->width, y - y_start); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 273 | y_start = -1; |
| 274 | } |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 275 | d += dd * 4; |
| 276 | s += ds * 4; |
| 277 | } |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 278 | } |
| 279 | if (y_start >= 0) { |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 280 | /* flush to display */ |
| 281 | dpy_update(ts->ds, 0, y_start, |
| 282 | ts->width, y - y_start); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 283 | } |
| 284 | /* reset modified pages */ |
Blue Swirl | c0c440f | 2009-04-27 18:10:37 +0000 | [diff] [blame] | 285 | if (page_max >= page_min) { |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 286 | memory_region_reset_dirty(&ts->vram_mem, |
| 287 | page_min, page_max + TARGET_PAGE_SIZE, |
| 288 | DIRTY_MEMORY_VGA); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 289 | } |
| 290 | } |
| 291 | |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 292 | static void tcx24_update_display(void *opaque) |
| 293 | { |
| 294 | TCXState *ts = opaque; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 295 | ram_addr_t page, page_min, page_max, cpage, page24; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 296 | int y, y_start, dd, ds; |
| 297 | uint8_t *d, *s; |
| 298 | uint32_t *cptr, *s24; |
| 299 | |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 300 | if (ds_get_bits_per_pixel(ts->ds) != 32) |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 301 | return; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 302 | page = 0; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 303 | page24 = ts->vram24_offset; |
| 304 | cpage = ts->cplane_offset; |
| 305 | y_start = -1; |
Blue Swirl | c0c440f | 2009-04-27 18:10:37 +0000 | [diff] [blame] | 306 | page_min = -1; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 307 | page_max = 0; |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 308 | d = ds_get_data(ts->ds); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 309 | s = ts->vram; |
| 310 | s24 = ts->vram24; |
| 311 | cptr = ts->cplane; |
aliguori | 0e1f5a0 | 2008-11-24 19:29:13 +0000 | [diff] [blame] | 312 | dd = ds_get_linesize(ts->ds); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 313 | ds = 1024; |
| 314 | |
| 315 | for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE, |
| 316 | page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) { |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 317 | if (check_dirty(ts, page, page24, cpage)) { |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 318 | if (y_start < 0) |
| 319 | y_start = y; |
| 320 | if (page < page_min) |
| 321 | page_min = page; |
| 322 | if (page > page_max) |
| 323 | page_max = page; |
| 324 | tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); |
| 325 | d += dd; |
| 326 | s += ds; |
| 327 | cptr += ds; |
| 328 | s24 += ds; |
| 329 | tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); |
| 330 | d += dd; |
| 331 | s += ds; |
| 332 | cptr += ds; |
| 333 | s24 += ds; |
| 334 | tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); |
| 335 | d += dd; |
| 336 | s += ds; |
| 337 | cptr += ds; |
| 338 | s24 += ds; |
| 339 | tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); |
| 340 | d += dd; |
| 341 | s += ds; |
| 342 | cptr += ds; |
| 343 | s24 += ds; |
| 344 | } else { |
| 345 | if (y_start >= 0) { |
| 346 | /* flush to display */ |
| 347 | dpy_update(ts->ds, 0, y_start, |
| 348 | ts->width, y - y_start); |
| 349 | y_start = -1; |
| 350 | } |
| 351 | d += dd * 4; |
| 352 | s += ds * 4; |
| 353 | cptr += ds * 4; |
| 354 | s24 += ds * 4; |
| 355 | } |
| 356 | } |
| 357 | if (y_start >= 0) { |
| 358 | /* flush to display */ |
| 359 | dpy_update(ts->ds, 0, y_start, |
| 360 | ts->width, y - y_start); |
| 361 | } |
| 362 | /* reset modified pages */ |
Blue Swirl | c0c440f | 2009-04-27 18:10:37 +0000 | [diff] [blame] | 363 | if (page_max >= page_min) { |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 364 | reset_dirty(ts, page_min, page_max, page24, cpage); |
| 365 | } |
| 366 | } |
| 367 | |
pbrook | 9521989 | 2006-04-09 01:06:34 +0000 | [diff] [blame] | 368 | static void tcx_invalidate_display(void *opaque) |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 369 | { |
| 370 | TCXState *s = opaque; |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 371 | |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 372 | tcx_set_dirty(s); |
| 373 | qemu_console_resize(s->ds, s->width, s->height); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 374 | } |
| 375 | |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 376 | static void tcx24_invalidate_display(void *opaque) |
| 377 | { |
| 378 | TCXState *s = opaque; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 379 | |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 380 | tcx_set_dirty(s); |
| 381 | tcx24_set_dirty(s); |
| 382 | qemu_console_resize(s->ds, s->width, s->height); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 383 | } |
| 384 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 385 | static int vmstate_tcx_post_load(void *opaque, int version_id) |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 386 | { |
| 387 | TCXState *s = opaque; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 388 | |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 389 | update_palette_entries(s, 0, 256); |
Blue Swirl | d3ffcaf | 2009-07-16 13:45:57 +0000 | [diff] [blame] | 390 | if (s->depth == 24) { |
| 391 | tcx24_set_dirty(s); |
| 392 | } else { |
| 393 | tcx_set_dirty(s); |
| 394 | } |
blueswir1 | 5425a21 | 2007-04-13 19:24:07 +0000 | [diff] [blame] | 395 | |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 396 | return 0; |
| 397 | } |
| 398 | |
Blue Swirl | c0c41a4 | 2009-08-28 20:43:01 +0000 | [diff] [blame] | 399 | static const VMStateDescription vmstate_tcx = { |
| 400 | .name ="tcx", |
| 401 | .version_id = 4, |
| 402 | .minimum_version_id = 4, |
| 403 | .minimum_version_id_old = 4, |
Juan Quintela | 752ff2f | 2009-09-10 03:04:30 +0200 | [diff] [blame] | 404 | .post_load = vmstate_tcx_post_load, |
Blue Swirl | c0c41a4 | 2009-08-28 20:43:01 +0000 | [diff] [blame] | 405 | .fields = (VMStateField []) { |
| 406 | VMSTATE_UINT16(height, TCXState), |
| 407 | VMSTATE_UINT16(width, TCXState), |
| 408 | VMSTATE_UINT16(depth, TCXState), |
| 409 | VMSTATE_BUFFER(r, TCXState), |
| 410 | VMSTATE_BUFFER(g, TCXState), |
| 411 | VMSTATE_BUFFER(b, TCXState), |
| 412 | VMSTATE_UINT8(dac_index, TCXState), |
| 413 | VMSTATE_UINT8(dac_state, TCXState), |
| 414 | VMSTATE_END_OF_LIST() |
| 415 | } |
| 416 | }; |
| 417 | |
Michael S. Tsirkin | 7f23f81 | 2009-09-16 13:40:27 +0300 | [diff] [blame] | 418 | static void tcx_reset(DeviceState *d) |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 419 | { |
Michael S. Tsirkin | 7f23f81 | 2009-09-16 13:40:27 +0300 | [diff] [blame] | 420 | TCXState *s = container_of(d, TCXState, busdev.qdev); |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 421 | |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 422 | /* Initialize palette */ |
| 423 | memset(s->r, 0, 256); |
| 424 | memset(s->g, 0, 256); |
| 425 | memset(s->b, 0, 256); |
| 426 | s->r[255] = s->g[255] = s->b[255] = 255; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 427 | update_palette_entries(s, 0, 256); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 428 | memset(s->vram, 0, MAXX*MAXY); |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 429 | memory_region_reset_dirty(&s->vram_mem, 0, MAXX * MAXY * (1 + 4 + 4), |
| 430 | DIRTY_MEMORY_VGA); |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 431 | s->dac_index = 0; |
| 432 | s->dac_state = 0; |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 433 | } |
| 434 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 435 | static uint64_t tcx_dac_readl(void *opaque, target_phys_addr_t addr, |
| 436 | unsigned size) |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 437 | { |
| 438 | return 0; |
| 439 | } |
| 440 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 441 | static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint64_t val, |
| 442 | unsigned size) |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 443 | { |
| 444 | TCXState *s = opaque; |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 445 | |
blueswir1 | e64d7d5 | 2008-12-02 17:47:02 +0000 | [diff] [blame] | 446 | switch (addr) { |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 447 | case 0: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 448 | s->dac_index = val >> 24; |
| 449 | s->dac_state = 0; |
| 450 | break; |
blueswir1 | e64d7d5 | 2008-12-02 17:47:02 +0000 | [diff] [blame] | 451 | case 4: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 452 | switch (s->dac_state) { |
| 453 | case 0: |
| 454 | s->r[s->dac_index] = val >> 24; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 455 | update_palette_entries(s, s->dac_index, s->dac_index + 1); |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 456 | s->dac_state++; |
| 457 | break; |
| 458 | case 1: |
| 459 | s->g[s->dac_index] = val >> 24; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 460 | update_palette_entries(s, s->dac_index, s->dac_index + 1); |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 461 | s->dac_state++; |
| 462 | break; |
| 463 | case 2: |
| 464 | s->b[s->dac_index] = val >> 24; |
bellard | 21206a1 | 2006-09-09 11:31:34 +0000 | [diff] [blame] | 465 | update_palette_entries(s, s->dac_index, s->dac_index + 1); |
blueswir1 | 5c8cdbf | 2007-04-17 19:42:21 +0000 | [diff] [blame] | 466 | s->dac_index = (s->dac_index + 1) & 255; // Index autoincrement |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 467 | default: |
| 468 | s->dac_state = 0; |
| 469 | break; |
| 470 | } |
| 471 | break; |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 472 | default: |
blueswir1 | f930d07 | 2007-10-06 11:28:21 +0000 | [diff] [blame] | 473 | break; |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 474 | } |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 475 | } |
| 476 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 477 | static const MemoryRegionOps tcx_dac_ops = { |
| 478 | .read = tcx_dac_readl, |
| 479 | .write = tcx_dac_writel, |
| 480 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 481 | .valid = { |
| 482 | .min_access_size = 4, |
| 483 | .max_access_size = 4, |
| 484 | }, |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 485 | }; |
| 486 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 487 | static uint64_t dummy_readl(void *opaque, target_phys_addr_t addr, |
| 488 | unsigned size) |
blueswir1 | 8508b89 | 2007-05-06 17:39:55 +0000 | [diff] [blame] | 489 | { |
| 490 | return 0; |
| 491 | } |
| 492 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 493 | static void dummy_writel(void *opaque, target_phys_addr_t addr, |
| 494 | uint64_t val, unsigned size) |
blueswir1 | 8508b89 | 2007-05-06 17:39:55 +0000 | [diff] [blame] | 495 | { |
| 496 | } |
| 497 | |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 498 | static const MemoryRegionOps dummy_ops = { |
| 499 | .read = dummy_readl, |
| 500 | .write = dummy_writel, |
| 501 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 502 | .valid = { |
| 503 | .min_access_size = 4, |
| 504 | .max_access_size = 4, |
| 505 | }, |
blueswir1 | 8508b89 | 2007-05-06 17:39:55 +0000 | [diff] [blame] | 506 | }; |
| 507 | |
Gerd Hoffmann | 81a322d | 2009-08-14 10:36:05 +0200 | [diff] [blame] | 508 | static int tcx_init1(SysBusDevice *dev) |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 509 | { |
| 510 | TCXState *s = FROM_SYSBUS(TCXState, dev); |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 511 | ram_addr_t vram_offset = 0; |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 512 | int size; |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 513 | uint8_t *vram_base; |
| 514 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 515 | memory_region_init_ram(&s->vram_mem, "tcx.vram", |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 516 | s->vram_size * (1 + 4 + 4)); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 517 | vmstate_register_ram_global(&s->vram_mem); |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 518 | vram_base = memory_region_get_ram_ptr(&s->vram_mem); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 519 | |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 520 | /* 8-bit plane */ |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 521 | s->vram = vram_base; |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 522 | size = s->vram_size; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 523 | memory_region_init_alias(&s->vram_8bit, "tcx.vram.8bit", |
| 524 | &s->vram_mem, vram_offset, size); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 525 | sysbus_init_mmio(dev, &s->vram_8bit); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 526 | vram_offset += size; |
| 527 | vram_base += size; |
| 528 | |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 529 | /* DAC */ |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 530 | memory_region_init_io(&s->dac, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 531 | sysbus_init_mmio(dev, &s->dac); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 532 | |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 533 | /* TEC (dummy) */ |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 534 | memory_region_init_io(&s->tec, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 535 | sysbus_init_mmio(dev, &s->tec); |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 536 | /* THC: NetBSD writes here even with 8-bit display: dummy */ |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 537 | memory_region_init_io(&s->thc24, &dummy_ops, s, "tcx.thc24", |
| 538 | TCX_THC_NREGS_24); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 539 | sysbus_init_mmio(dev, &s->thc24); |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 540 | |
| 541 | if (s->depth == 24) { |
| 542 | /* 24-bit plane */ |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 543 | size = s->vram_size * 4; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 544 | s->vram24 = (uint32_t *)vram_base; |
| 545 | s->vram24_offset = vram_offset; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 546 | memory_region_init_alias(&s->vram_24bit, "tcx.vram.24bit", |
| 547 | &s->vram_mem, vram_offset, size); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 548 | sysbus_init_mmio(dev, &s->vram_24bit); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 549 | vram_offset += size; |
| 550 | vram_base += size; |
| 551 | |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 552 | /* Control plane */ |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 553 | size = s->vram_size * 4; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 554 | s->cplane = (uint32_t *)vram_base; |
| 555 | s->cplane_offset = vram_offset; |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 556 | memory_region_init_alias(&s->vram_cplane, "tcx.vram.cplane", |
| 557 | &s->vram_mem, vram_offset, size); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 558 | sysbus_init_mmio(dev, &s->vram_cplane); |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 559 | |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 560 | s->ds = graphic_console_init(tcx24_update_display, |
| 561 | tcx24_invalidate_display, |
| 562 | tcx24_screen_dump, NULL, s); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 563 | } else { |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 564 | /* THC 8 bit (dummy) */ |
Avi Kivity | d08151b | 2011-10-05 18:26:24 +0200 | [diff] [blame] | 565 | memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8", |
| 566 | TCX_THC_NREGS_8); |
Avi Kivity | 750ecd4 | 2011-11-27 11:38:10 +0200 | [diff] [blame] | 567 | sysbus_init_mmio(dev, &s->thc8); |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 568 | |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 569 | s->ds = graphic_console_init(tcx_update_display, |
| 570 | tcx_invalidate_display, |
| 571 | tcx_screen_dump, NULL, s); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 572 | } |
| 573 | |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 574 | qemu_console_resize(s->ds, s->width, s->height); |
Gerd Hoffmann | 81a322d | 2009-08-14 10:36:05 +0200 | [diff] [blame] | 575 | return 0; |
bellard | 420557e | 2004-09-30 22:13:50 +0000 | [diff] [blame] | 576 | } |
| 577 | |
Luiz Capitulino | d709813 | 2012-05-21 16:41:37 -0300 | [diff] [blame] | 578 | static void tcx_screen_dump(void *opaque, const char *filename, bool cswitch, |
| 579 | Error **errp) |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 580 | { |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 581 | TCXState *s = opaque; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 582 | FILE *f; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 583 | uint8_t *d, *d1, v; |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 584 | int ret, y, x; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 585 | |
| 586 | f = fopen(filename, "wb"); |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 587 | if (!f) { |
| 588 | error_setg(errp, "failed to open file '%s': %s", filename, |
| 589 | strerror(errno)); |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 590 | return; |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 591 | } |
| 592 | ret = fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255); |
| 593 | if (ret < 0) { |
| 594 | goto write_err; |
| 595 | } |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 596 | d1 = s->vram; |
| 597 | for(y = 0; y < s->height; y++) { |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 598 | d = d1; |
bellard | 6f7e9ae | 2005-03-13 09:43:36 +0000 | [diff] [blame] | 599 | for(x = 0; x < s->width; x++) { |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 600 | v = *d; |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 601 | ret = fputc(s->r[v], f); |
| 602 | if (ret == EOF) { |
| 603 | goto write_err; |
| 604 | } |
| 605 | ret = fputc(s->g[v], f); |
| 606 | if (ret == EOF) { |
| 607 | goto write_err; |
| 608 | } |
| 609 | ret = fputc(s->b[v], f); |
| 610 | if (ret == EOF) { |
| 611 | goto write_err; |
| 612 | } |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 613 | d++; |
| 614 | } |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 615 | d1 += MAXX; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 616 | } |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 617 | |
| 618 | out: |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 619 | fclose(f); |
| 620 | return; |
Luiz Capitulino | 0ab6b63 | 2012-05-24 11:33:25 -0300 | [diff] [blame] | 621 | |
| 622 | write_err: |
| 623 | error_setg(errp, "failed to write to file '%s': %s", filename, |
| 624 | strerror(errno)); |
| 625 | unlink(filename); |
| 626 | goto out; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 627 | } |
| 628 | |
Luiz Capitulino | d709813 | 2012-05-21 16:41:37 -0300 | [diff] [blame] | 629 | static void tcx24_screen_dump(void *opaque, const char *filename, bool cswitch, |
| 630 | Error **errp) |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 631 | { |
| 632 | TCXState *s = opaque; |
| 633 | FILE *f; |
| 634 | uint8_t *d, *d1, v; |
| 635 | uint32_t *s24, *cptr, dval; |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 636 | int ret, y, x; |
bellard | 8d5f07f | 2004-10-04 21:23:09 +0000 | [diff] [blame] | 637 | |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 638 | f = fopen(filename, "wb"); |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 639 | if (!f) { |
| 640 | error_setg(errp, "failed to open file '%s': %s", filename, |
| 641 | strerror(errno)); |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 642 | return; |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 643 | } |
| 644 | ret = fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255); |
| 645 | if (ret < 0) { |
| 646 | goto write_err; |
| 647 | } |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 648 | d1 = s->vram; |
| 649 | s24 = s->vram24; |
| 650 | cptr = s->cplane; |
| 651 | for(y = 0; y < s->height; y++) { |
| 652 | d = d1; |
| 653 | for(x = 0; x < s->width; x++, d++, s24++) { |
| 654 | if ((*cptr++ & 0xff000000) == 0x03000000) { // 24-bit direct |
| 655 | dval = *s24 & 0x00ffffff; |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 656 | ret = fputc((dval >> 16) & 0xff, f); |
| 657 | if (ret == EOF) { |
| 658 | goto write_err; |
| 659 | } |
| 660 | ret = fputc((dval >> 8) & 0xff, f); |
| 661 | if (ret == EOF) { |
| 662 | goto write_err; |
| 663 | } |
| 664 | ret = fputc(dval & 0xff, f); |
| 665 | if (ret == EOF) { |
| 666 | goto write_err; |
| 667 | } |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 668 | } else { |
| 669 | v = *d; |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 670 | ret = fputc(s->r[v], f); |
| 671 | if (ret == EOF) { |
| 672 | goto write_err; |
| 673 | } |
| 674 | ret = fputc(s->g[v], f); |
| 675 | if (ret == EOF) { |
| 676 | goto write_err; |
| 677 | } |
| 678 | ret = fputc(s->b[v], f); |
| 679 | if (ret == EOF) { |
| 680 | goto write_err; |
| 681 | } |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 682 | } |
| 683 | } |
| 684 | d1 += MAXX; |
| 685 | } |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 686 | |
| 687 | out: |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 688 | fclose(f); |
| 689 | return; |
Luiz Capitulino | 537f2d2 | 2012-05-24 11:30:40 -0300 | [diff] [blame] | 690 | |
| 691 | write_err: |
| 692 | error_setg(errp, "failed to write to file '%s': %s", filename, |
| 693 | strerror(errno)); |
| 694 | unlink(filename); |
| 695 | goto out; |
blueswir1 | eee0b83 | 2007-04-21 19:45:49 +0000 | [diff] [blame] | 696 | } |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 697 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 698 | static Property tcx_properties[] = { |
| 699 | DEFINE_PROP_TADDR("addr", TCXState, addr, -1), |
| 700 | DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1), |
| 701 | DEFINE_PROP_UINT16("width", TCXState, width, -1), |
| 702 | DEFINE_PROP_UINT16("height", TCXState, height, -1), |
| 703 | DEFINE_PROP_UINT16("depth", TCXState, depth, -1), |
| 704 | DEFINE_PROP_END_OF_LIST(), |
| 705 | }; |
| 706 | |
| 707 | static void tcx_class_init(ObjectClass *klass, void *data) |
| 708 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 709 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 710 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
| 711 | |
| 712 | k->init = tcx_init1; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 713 | dc->reset = tcx_reset; |
| 714 | dc->vmsd = &vmstate_tcx; |
| 715 | dc->props = tcx_properties; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 716 | } |
| 717 | |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 718 | static TypeInfo tcx_info = { |
| 719 | .name = "SUNW,tcx", |
| 720 | .parent = TYPE_SYS_BUS_DEVICE, |
| 721 | .instance_size = sizeof(TCXState), |
| 722 | .class_init = tcx_class_init, |
Gerd Hoffmann | ee6847d | 2009-07-15 13:43:31 +0200 | [diff] [blame] | 723 | }; |
| 724 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 725 | static void tcx_register_types(void) |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 726 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 727 | type_register_static(&tcx_info); |
Blue Swirl | f40070c | 2009-07-12 19:21:36 +0000 | [diff] [blame] | 728 | } |
| 729 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 730 | type_init(tcx_register_types) |