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blueswir179383c92008-08-30 09:51:20 +00001#ifndef HW_ISA_H
2#define HW_ISA_H
Gerd Hoffmannf915a112009-07-31 12:30:14 +02003
pbrook87ecb682007-11-17 17:14:51 +00004/* ISA bus */
5
Isaku Yamahata32993972009-07-02 19:32:06 +09006#include "ioport.h"
Avi Kivityaf956ca2011-08-08 16:09:21 +03007#include "memory.h"
Gerd Hoffmannf915a112009-07-31 12:30:14 +02008#include "qdev.h"
9
Jan Kiszkab881fbe2011-10-07 09:19:35 +020010#define ISA_NUM_IRQS 16
11
Gerd Hoffmannf915a112009-07-31 12:30:14 +020012typedef struct ISADevice ISADevice;
Anthony Liguori8f04ee02011-12-04 11:52:49 -060013
14#define TYPE_ISA_DEVICE "isa-device"
15#define ISA_DEVICE(obj) \
16 OBJECT_CHECK(ISADevice, (obj), TYPE_ISA_DEVICE)
17#define ISA_DEVICE_CLASS(klass) \
18 OBJECT_CLASS_CHECK(ISADeviceClass, (klass), TYPE_ISA_DEVICE)
19#define ISA_DEVICE_GET_CLASS(obj) \
20 OBJECT_GET_CLASS(ISADeviceClass, (obj), TYPE_ISA_DEVICE)
21
22typedef struct ISADeviceClass {
23 DeviceClass parent_class;
24 int (*init)(ISADevice *dev);
25} ISADeviceClass;
Gerd Hoffmannf915a112009-07-31 12:30:14 +020026
Hervé Poussineaud1a1be12011-12-15 22:09:52 +010027struct ISABus {
28 BusState qbus;
29 MemoryRegion *address_space_io;
30 qemu_irq *irqs;
31};
32
Gerd Hoffmannf915a112009-07-31 12:30:14 +020033struct ISADevice {
34 DeviceState qdev;
Gerd Hoffmann2091ba22009-08-14 11:36:14 +020035 uint32_t isairq[2];
Richard Henderson78e20592011-08-10 15:28:12 -070036 int nirqs;
Richard Hendersonebf47c22011-08-15 11:59:09 -070037 int ioport_id;
Gerd Hoffmannf915a112009-07-31 12:30:14 +020038};
39
Richard Hendersonc2d0d012011-08-10 15:28:11 -070040ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space_io);
Hervé Poussineau48a18b32011-12-15 22:09:51 +010041void isa_bus_irqs(ISABus *bus, qemu_irq *irqs);
42qemu_irq isa_get_irq(ISADevice *dev, int isairq);
Gerd Hoffmann2e15e232009-09-10 11:43:27 +020043void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
Avi Kivityc839ade2011-08-15 17:17:35 +030044MemoryRegion *isa_address_space(ISADevice *dev);
Hervé Poussineau48a18b32011-12-15 22:09:51 +010045ISADevice *isa_create(ISABus *bus, const char *name);
46ISADevice *isa_try_create(ISABus *bus, const char *name);
47ISADevice *isa_create_simple(ISABus *bus, const char *name);
pbrook87ecb682007-11-17 17:14:51 +000048
Avi Kivityd7500732011-09-26 14:52:44 +030049/**
50 * isa_register_ioport: Install an I/O port region on the ISA bus.
51 *
52 * Register an I/O port region via memory_region_add_subregion
53 * inside the ISA I/O address space.
54 *
55 * @dev: the ISADevice against which these are registered; may be NULL.
56 * @io: the #MemoryRegion being registered.
57 * @start: the base I/O port.
58 */
59void isa_register_ioport(ISADevice *dev, MemoryRegion *io, uint16_t start);
60
61/**
62 * isa_register_portio_list: Initialize a set of ISA io ports
63 *
64 * Several ISA devices have many dis-joint I/O ports. Worse, these I/O
65 * ports can be interleaved with I/O ports from other devices. This
66 * function makes it easy to create multiple MemoryRegions for a single
67 * device and use the legacy portio routines.
68 *
69 * @dev: the ISADevice against which these are registered; may be NULL.
70 * @start: the base I/O port against which the portio->offset is applied.
71 * @portio: the ports, sorted by offset.
72 * @opaque: passed into the old_portio callbacks.
73 * @name: passed into memory_region_init_io.
74 */
75void isa_register_portio_list(ISADevice *dev, uint16_t start,
76 const MemoryRegionPortio *portio,
77 void *opaque, const char *name);
78
Anthony Liguoric227f092009-10-01 16:12:16 -050079extern target_phys_addr_t isa_mem_base;
pbrook87ecb682007-11-17 17:14:51 +000080
Avi Kivityaf956ca2011-08-08 16:09:21 +030081void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size);
Alexander Graf968d6832010-12-08 12:05:49 +010082void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
pbrook87ecb682007-11-17 17:14:51 +000083
84/* dma.c */
85int DMA_get_channel_mode (int nchan);
86int DMA_read_memory (int nchan, void *buf, int pos, int size);
87int DMA_write_memory (int nchan, void *buf, int pos, int size);
88void DMA_hold_DREQ (int nchan);
89void DMA_release_DREQ (int nchan);
90void DMA_schedule(int nchan);
Blue Swirl4556bd82010-05-22 08:00:52 +000091void DMA_init(int high_page_enable, qemu_irq *cpu_request_exit);
pbrook87ecb682007-11-17 17:14:51 +000092void DMA_register_channel (int nchan,
93 DMA_transfer_handler transfer_handler,
94 void *opaque);
blueswir179383c92008-08-30 09:51:20 +000095#endif