cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 1 | /* |
| 2 | * TI OMAP processors GPIO emulation. |
| 3 | * |
| 4 | * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org> |
| 5 | * Copyright (C) 2007-2009 Nokia Corporation |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 or |
| 10 | * (at your option) version 3 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along |
| 18 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | |
Peter Maydell | 17b7f2d | 2016-01-26 18:17:28 +0000 | [diff] [blame] | 21 | #include "qemu/osdep.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 22 | #include "hw/hw.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 23 | #include "hw/arm/omap.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 24 | #include "hw/sysbus.h" |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 25 | #include "qemu/error-report.h" |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 26 | #include "qapi/error.h" |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 27 | |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 28 | struct omap_gpio_s { |
| 29 | qemu_irq irq; |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 30 | qemu_irq handler[16]; |
| 31 | |
| 32 | uint16_t inputs; |
| 33 | uint16_t outputs; |
| 34 | uint16_t dir; |
| 35 | uint16_t edge; |
| 36 | uint16_t mask; |
| 37 | uint16_t ints; |
| 38 | uint16_t pins; |
| 39 | }; |
| 40 | |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 41 | #define TYPE_OMAP1_GPIO "omap-gpio" |
| 42 | #define OMAP1_GPIO(obj) \ |
| 43 | OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) |
| 44 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 45 | struct omap_gpif_s { |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 46 | SysBusDevice parent_obj; |
| 47 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 48 | MemoryRegion iomem; |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 49 | int mpu_model; |
| 50 | void *clk; |
| 51 | struct omap_gpio_s omap1; |
| 52 | }; |
| 53 | |
| 54 | /* General-Purpose I/O of OMAP1 */ |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 55 | static void omap_gpio_set(void *opaque, int line, int level) |
| 56 | { |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 57 | struct omap_gpio_s *s = &((struct omap_gpif_s *) opaque)->omap1; |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 58 | uint16_t prev = s->inputs; |
| 59 | |
| 60 | if (level) |
| 61 | s->inputs |= 1 << line; |
| 62 | else |
| 63 | s->inputs &= ~(1 << line); |
| 64 | |
| 65 | if (((s->edge & s->inputs & ~prev) | (~s->edge & ~s->inputs & prev)) & |
| 66 | (1 << line) & s->dir & ~s->mask) { |
| 67 | s->ints |= 1 << line; |
| 68 | qemu_irq_raise(s->irq); |
| 69 | } |
| 70 | } |
| 71 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 72 | static uint64_t omap_gpio_read(void *opaque, hwaddr addr, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 73 | unsigned size) |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 74 | { |
| 75 | struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; |
| 76 | int offset = addr & OMAP_MPUI_REG_MASK; |
| 77 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 78 | if (size != 2) { |
| 79 | return omap_badwidth_read16(opaque, addr); |
| 80 | } |
| 81 | |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 82 | switch (offset) { |
| 83 | case 0x00: /* DATA_INPUT */ |
| 84 | return s->inputs & s->pins; |
| 85 | |
| 86 | case 0x04: /* DATA_OUTPUT */ |
| 87 | return s->outputs; |
| 88 | |
| 89 | case 0x08: /* DIRECTION_CONTROL */ |
| 90 | return s->dir; |
| 91 | |
| 92 | case 0x0c: /* INTERRUPT_CONTROL */ |
| 93 | return s->edge; |
| 94 | |
| 95 | case 0x10: /* INTERRUPT_MASK */ |
| 96 | return s->mask; |
| 97 | |
| 98 | case 0x14: /* INTERRUPT_STATUS */ |
| 99 | return s->ints; |
| 100 | |
| 101 | case 0x18: /* PIN_CONTROL (not in OMAP310) */ |
| 102 | OMAP_BAD_REG(addr); |
| 103 | return s->pins; |
| 104 | } |
| 105 | |
| 106 | OMAP_BAD_REG(addr); |
| 107 | return 0; |
| 108 | } |
| 109 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 110 | static void omap_gpio_write(void *opaque, hwaddr addr, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 111 | uint64_t value, unsigned size) |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 112 | { |
| 113 | struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; |
| 114 | int offset = addr & OMAP_MPUI_REG_MASK; |
| 115 | uint16_t diff; |
| 116 | int ln; |
| 117 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 118 | if (size != 2) { |
Stefan Weil | 77a8257 | 2015-03-08 19:21:13 +0100 | [diff] [blame] | 119 | omap_badwidth_write16(opaque, addr, value); |
| 120 | return; |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 121 | } |
| 122 | |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 123 | switch (offset) { |
| 124 | case 0x00: /* DATA_INPUT */ |
| 125 | OMAP_RO_REG(addr); |
| 126 | return; |
| 127 | |
| 128 | case 0x04: /* DATA_OUTPUT */ |
| 129 | diff = (s->outputs ^ value) & ~s->dir; |
| 130 | s->outputs = value; |
Stefan Hajnoczi | bd2a888 | 2015-03-23 15:29:27 +0000 | [diff] [blame] | 131 | while ((ln = ctz32(diff)) != 32) { |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 132 | if (s->handler[ln]) |
| 133 | qemu_set_irq(s->handler[ln], (value >> ln) & 1); |
| 134 | diff &= ~(1 << ln); |
| 135 | } |
| 136 | break; |
| 137 | |
| 138 | case 0x08: /* DIRECTION_CONTROL */ |
| 139 | diff = s->outputs & (s->dir ^ value); |
| 140 | s->dir = value; |
| 141 | |
| 142 | value = s->outputs & ~s->dir; |
Stefan Hajnoczi | bd2a888 | 2015-03-23 15:29:27 +0000 | [diff] [blame] | 143 | while ((ln = ctz32(diff)) != 32) { |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 144 | if (s->handler[ln]) |
| 145 | qemu_set_irq(s->handler[ln], (value >> ln) & 1); |
| 146 | diff &= ~(1 << ln); |
| 147 | } |
| 148 | break; |
| 149 | |
| 150 | case 0x0c: /* INTERRUPT_CONTROL */ |
| 151 | s->edge = value; |
| 152 | break; |
| 153 | |
| 154 | case 0x10: /* INTERRUPT_MASK */ |
| 155 | s->mask = value; |
| 156 | break; |
| 157 | |
| 158 | case 0x14: /* INTERRUPT_STATUS */ |
| 159 | s->ints &= ~value; |
| 160 | if (!s->ints) |
| 161 | qemu_irq_lower(s->irq); |
| 162 | break; |
| 163 | |
| 164 | case 0x18: /* PIN_CONTROL (not in OMAP310 TRM) */ |
| 165 | OMAP_BAD_REG(addr); |
| 166 | s->pins = value; |
| 167 | break; |
| 168 | |
| 169 | default: |
| 170 | OMAP_BAD_REG(addr); |
| 171 | return; |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | /* *Some* sources say the memory region is 32-bit. */ |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 176 | static const MemoryRegionOps omap_gpio_ops = { |
| 177 | .read = omap_gpio_read, |
| 178 | .write = omap_gpio_write, |
| 179 | .endianness = DEVICE_NATIVE_ENDIAN, |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 180 | }; |
| 181 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 182 | static void omap_gpio_reset(struct omap_gpio_s *s) |
cmchao | e5c6b25 | 2010-05-31 23:54:13 +0800 | [diff] [blame] | 183 | { |
| 184 | s->inputs = 0; |
| 185 | s->outputs = ~0; |
| 186 | s->dir = ~0; |
| 187 | s->edge = ~0; |
| 188 | s->mask = ~0; |
| 189 | s->ints = 0; |
| 190 | s->pins = ~0; |
| 191 | } |
| 192 | |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 193 | struct omap2_gpio_s { |
| 194 | qemu_irq irq[2]; |
| 195 | qemu_irq wkup; |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 196 | qemu_irq *handler; |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 197 | MemoryRegion iomem; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 198 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 199 | uint8_t revision; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 200 | uint8_t config[2]; |
| 201 | uint32_t inputs; |
| 202 | uint32_t outputs; |
| 203 | uint32_t dir; |
| 204 | uint32_t level[2]; |
| 205 | uint32_t edge[2]; |
| 206 | uint32_t mask[2]; |
| 207 | uint32_t wumask; |
| 208 | uint32_t ints[2]; |
| 209 | uint32_t debounce; |
| 210 | uint8_t delay; |
| 211 | }; |
| 212 | |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 213 | #define TYPE_OMAP2_GPIO "omap2-gpio" |
| 214 | #define OMAP2_GPIO(obj) \ |
| 215 | OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) |
| 216 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 217 | struct omap2_gpif_s { |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 218 | SysBusDevice parent_obj; |
| 219 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 220 | MemoryRegion iomem; |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 221 | int mpu_model; |
| 222 | void *iclk; |
| 223 | void *fclk[6]; |
| 224 | int modulecount; |
| 225 | struct omap2_gpio_s *modules; |
| 226 | qemu_irq *handler; |
| 227 | int autoidle; |
| 228 | int gpo; |
| 229 | }; |
| 230 | |
| 231 | /* General-Purpose Interface of OMAP2/3 */ |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 232 | static inline void omap2_gpio_module_int_update(struct omap2_gpio_s *s, |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 233 | int line) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 234 | { |
| 235 | qemu_set_irq(s->irq[line], s->ints[line] & s->mask[line]); |
| 236 | } |
| 237 | |
| 238 | static void omap2_gpio_module_wake(struct omap2_gpio_s *s, int line) |
| 239 | { |
| 240 | if (!(s->config[0] & (1 << 2))) /* ENAWAKEUP */ |
| 241 | return; |
| 242 | if (!(s->config[0] & (3 << 3))) /* Force Idle */ |
| 243 | return; |
| 244 | if (!(s->wumask & (1 << line))) |
| 245 | return; |
| 246 | |
| 247 | qemu_irq_raise(s->wkup); |
| 248 | } |
| 249 | |
| 250 | static inline void omap2_gpio_module_out_update(struct omap2_gpio_s *s, |
| 251 | uint32_t diff) |
| 252 | { |
| 253 | int ln; |
| 254 | |
| 255 | s->outputs ^= diff; |
| 256 | diff &= ~s->dir; |
Stefan Hajnoczi | bd2a888 | 2015-03-23 15:29:27 +0000 | [diff] [blame] | 257 | while ((ln = ctz32(diff)) != 32) { |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 258 | qemu_set_irq(s->handler[ln], (s->outputs >> ln) & 1); |
| 259 | diff &= ~(1 << ln); |
| 260 | } |
| 261 | } |
| 262 | |
| 263 | static void omap2_gpio_module_level_update(struct omap2_gpio_s *s, int line) |
| 264 | { |
| 265 | s->ints[line] |= s->dir & |
| 266 | ((s->inputs & s->level[1]) | (~s->inputs & s->level[0])); |
| 267 | omap2_gpio_module_int_update(s, line); |
| 268 | } |
| 269 | |
| 270 | static inline void omap2_gpio_module_int(struct omap2_gpio_s *s, int line) |
| 271 | { |
| 272 | s->ints[0] |= 1 << line; |
| 273 | omap2_gpio_module_int_update(s, 0); |
| 274 | s->ints[1] |= 1 << line; |
| 275 | omap2_gpio_module_int_update(s, 1); |
| 276 | omap2_gpio_module_wake(s, line); |
| 277 | } |
| 278 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 279 | static void omap2_gpio_set(void *opaque, int line, int level) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 280 | { |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 281 | struct omap2_gpif_s *p = opaque; |
| 282 | struct omap2_gpio_s *s = &p->modules[line >> 5]; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 283 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 284 | line &= 31; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 285 | if (level) { |
| 286 | if (s->dir & (1 << line) & ((~s->inputs & s->edge[0]) | s->level[1])) |
| 287 | omap2_gpio_module_int(s, line); |
| 288 | s->inputs |= 1 << line; |
| 289 | } else { |
| 290 | if (s->dir & (1 << line) & ((s->inputs & s->edge[1]) | s->level[0])) |
| 291 | omap2_gpio_module_int(s, line); |
| 292 | s->inputs &= ~(1 << line); |
| 293 | } |
| 294 | } |
| 295 | |
| 296 | static void omap2_gpio_module_reset(struct omap2_gpio_s *s) |
| 297 | { |
| 298 | s->config[0] = 0; |
| 299 | s->config[1] = 2; |
| 300 | s->ints[0] = 0; |
| 301 | s->ints[1] = 0; |
| 302 | s->mask[0] = 0; |
| 303 | s->mask[1] = 0; |
| 304 | s->wumask = 0; |
| 305 | s->dir = ~0; |
| 306 | s->level[0] = 0; |
| 307 | s->level[1] = 0; |
| 308 | s->edge[0] = 0; |
| 309 | s->edge[1] = 0; |
| 310 | s->debounce = 0; |
| 311 | s->delay = 0; |
| 312 | } |
| 313 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 314 | static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 315 | { |
| 316 | struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; |
| 317 | |
| 318 | switch (addr) { |
| 319 | case 0x00: /* GPIO_REVISION */ |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 320 | return s->revision; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 321 | |
| 322 | case 0x10: /* GPIO_SYSCONFIG */ |
| 323 | return s->config[0]; |
| 324 | |
| 325 | case 0x14: /* GPIO_SYSSTATUS */ |
| 326 | return 0x01; |
| 327 | |
| 328 | case 0x18: /* GPIO_IRQSTATUS1 */ |
| 329 | return s->ints[0]; |
| 330 | |
| 331 | case 0x1c: /* GPIO_IRQENABLE1 */ |
| 332 | case 0x60: /* GPIO_CLEARIRQENABLE1 */ |
| 333 | case 0x64: /* GPIO_SETIRQENABLE1 */ |
| 334 | return s->mask[0]; |
| 335 | |
| 336 | case 0x20: /* GPIO_WAKEUPENABLE */ |
| 337 | case 0x80: /* GPIO_CLEARWKUENA */ |
| 338 | case 0x84: /* GPIO_SETWKUENA */ |
| 339 | return s->wumask; |
| 340 | |
| 341 | case 0x28: /* GPIO_IRQSTATUS2 */ |
| 342 | return s->ints[1]; |
| 343 | |
| 344 | case 0x2c: /* GPIO_IRQENABLE2 */ |
| 345 | case 0x70: /* GPIO_CLEARIRQENABLE2 */ |
| 346 | case 0x74: /* GPIO_SETIREQNEABLE2 */ |
| 347 | return s->mask[1]; |
| 348 | |
| 349 | case 0x30: /* GPIO_CTRL */ |
| 350 | return s->config[1]; |
| 351 | |
| 352 | case 0x34: /* GPIO_OE */ |
| 353 | return s->dir; |
| 354 | |
| 355 | case 0x38: /* GPIO_DATAIN */ |
| 356 | return s->inputs; |
| 357 | |
| 358 | case 0x3c: /* GPIO_DATAOUT */ |
| 359 | case 0x90: /* GPIO_CLEARDATAOUT */ |
| 360 | case 0x94: /* GPIO_SETDATAOUT */ |
| 361 | return s->outputs; |
| 362 | |
| 363 | case 0x40: /* GPIO_LEVELDETECT0 */ |
| 364 | return s->level[0]; |
| 365 | |
| 366 | case 0x44: /* GPIO_LEVELDETECT1 */ |
| 367 | return s->level[1]; |
| 368 | |
| 369 | case 0x48: /* GPIO_RISINGDETECT */ |
| 370 | return s->edge[0]; |
| 371 | |
| 372 | case 0x4c: /* GPIO_FALLINGDETECT */ |
| 373 | return s->edge[1]; |
| 374 | |
| 375 | case 0x50: /* GPIO_DEBOUNCENABLE */ |
| 376 | return s->debounce; |
| 377 | |
| 378 | case 0x54: /* GPIO_DEBOUNCINGTIME */ |
| 379 | return s->delay; |
| 380 | } |
| 381 | |
| 382 | OMAP_BAD_REG(addr); |
| 383 | return 0; |
| 384 | } |
| 385 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 386 | static void omap2_gpio_module_write(void *opaque, hwaddr addr, |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 387 | uint32_t value) |
| 388 | { |
| 389 | struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; |
| 390 | uint32_t diff; |
| 391 | int ln; |
| 392 | |
| 393 | switch (addr) { |
| 394 | case 0x00: /* GPIO_REVISION */ |
| 395 | case 0x14: /* GPIO_SYSSTATUS */ |
| 396 | case 0x38: /* GPIO_DATAIN */ |
| 397 | OMAP_RO_REG(addr); |
| 398 | break; |
| 399 | |
| 400 | case 0x10: /* GPIO_SYSCONFIG */ |
| 401 | if (((value >> 3) & 3) == 3) |
| 402 | fprintf(stderr, "%s: bad IDLEMODE value\n", __FUNCTION__); |
| 403 | if (value & 2) |
| 404 | omap2_gpio_module_reset(s); |
| 405 | s->config[0] = value & 0x1d; |
| 406 | break; |
| 407 | |
| 408 | case 0x18: /* GPIO_IRQSTATUS1 */ |
| 409 | if (s->ints[0] & value) { |
| 410 | s->ints[0] &= ~value; |
| 411 | omap2_gpio_module_level_update(s, 0); |
| 412 | } |
| 413 | break; |
| 414 | |
| 415 | case 0x1c: /* GPIO_IRQENABLE1 */ |
| 416 | s->mask[0] = value; |
| 417 | omap2_gpio_module_int_update(s, 0); |
| 418 | break; |
| 419 | |
| 420 | case 0x20: /* GPIO_WAKEUPENABLE */ |
| 421 | s->wumask = value; |
| 422 | break; |
| 423 | |
| 424 | case 0x28: /* GPIO_IRQSTATUS2 */ |
| 425 | if (s->ints[1] & value) { |
| 426 | s->ints[1] &= ~value; |
| 427 | omap2_gpio_module_level_update(s, 1); |
| 428 | } |
| 429 | break; |
| 430 | |
| 431 | case 0x2c: /* GPIO_IRQENABLE2 */ |
| 432 | s->mask[1] = value; |
| 433 | omap2_gpio_module_int_update(s, 1); |
| 434 | break; |
| 435 | |
| 436 | case 0x30: /* GPIO_CTRL */ |
| 437 | s->config[1] = value & 7; |
| 438 | break; |
| 439 | |
| 440 | case 0x34: /* GPIO_OE */ |
| 441 | diff = s->outputs & (s->dir ^ value); |
| 442 | s->dir = value; |
| 443 | |
| 444 | value = s->outputs & ~s->dir; |
Stefan Hajnoczi | bd2a888 | 2015-03-23 15:29:27 +0000 | [diff] [blame] | 445 | while ((ln = ctz32(diff)) != 32) { |
| 446 | diff &= ~(1 << ln); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 447 | qemu_set_irq(s->handler[ln], (value >> ln) & 1); |
| 448 | } |
| 449 | |
| 450 | omap2_gpio_module_level_update(s, 0); |
| 451 | omap2_gpio_module_level_update(s, 1); |
| 452 | break; |
| 453 | |
| 454 | case 0x3c: /* GPIO_DATAOUT */ |
| 455 | omap2_gpio_module_out_update(s, s->outputs ^ value); |
| 456 | break; |
| 457 | |
| 458 | case 0x40: /* GPIO_LEVELDETECT0 */ |
| 459 | s->level[0] = value; |
| 460 | omap2_gpio_module_level_update(s, 0); |
| 461 | omap2_gpio_module_level_update(s, 1); |
| 462 | break; |
| 463 | |
| 464 | case 0x44: /* GPIO_LEVELDETECT1 */ |
| 465 | s->level[1] = value; |
| 466 | omap2_gpio_module_level_update(s, 0); |
| 467 | omap2_gpio_module_level_update(s, 1); |
| 468 | break; |
| 469 | |
| 470 | case 0x48: /* GPIO_RISINGDETECT */ |
| 471 | s->edge[0] = value; |
| 472 | break; |
| 473 | |
| 474 | case 0x4c: /* GPIO_FALLINGDETECT */ |
| 475 | s->edge[1] = value; |
| 476 | break; |
| 477 | |
| 478 | case 0x50: /* GPIO_DEBOUNCENABLE */ |
| 479 | s->debounce = value; |
| 480 | break; |
| 481 | |
| 482 | case 0x54: /* GPIO_DEBOUNCINGTIME */ |
| 483 | s->delay = value; |
| 484 | break; |
| 485 | |
| 486 | case 0x60: /* GPIO_CLEARIRQENABLE1 */ |
| 487 | s->mask[0] &= ~value; |
| 488 | omap2_gpio_module_int_update(s, 0); |
| 489 | break; |
| 490 | |
| 491 | case 0x64: /* GPIO_SETIRQENABLE1 */ |
| 492 | s->mask[0] |= value; |
| 493 | omap2_gpio_module_int_update(s, 0); |
| 494 | break; |
| 495 | |
| 496 | case 0x70: /* GPIO_CLEARIRQENABLE2 */ |
| 497 | s->mask[1] &= ~value; |
| 498 | omap2_gpio_module_int_update(s, 1); |
| 499 | break; |
| 500 | |
| 501 | case 0x74: /* GPIO_SETIREQNEABLE2 */ |
| 502 | s->mask[1] |= value; |
| 503 | omap2_gpio_module_int_update(s, 1); |
| 504 | break; |
| 505 | |
| 506 | case 0x80: /* GPIO_CLEARWKUENA */ |
| 507 | s->wumask &= ~value; |
| 508 | break; |
| 509 | |
| 510 | case 0x84: /* GPIO_SETWKUENA */ |
| 511 | s->wumask |= value; |
| 512 | break; |
| 513 | |
| 514 | case 0x90: /* GPIO_CLEARDATAOUT */ |
| 515 | omap2_gpio_module_out_update(s, s->outputs & value); |
| 516 | break; |
| 517 | |
| 518 | case 0x94: /* GPIO_SETDATAOUT */ |
| 519 | omap2_gpio_module_out_update(s, ~s->outputs & value); |
| 520 | break; |
| 521 | |
| 522 | default: |
| 523 | OMAP_BAD_REG(addr); |
| 524 | return; |
| 525 | } |
| 526 | } |
| 527 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 528 | static uint32_t omap2_gpio_module_readp(void *opaque, hwaddr addr) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 529 | { |
Peter Maydell | e1556ad | 2011-11-07 13:25:45 +0000 | [diff] [blame] | 530 | return omap2_gpio_module_read(opaque, addr & ~3) >> ((addr & 3) << 3); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 531 | } |
| 532 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 533 | static void omap2_gpio_module_writep(void *opaque, hwaddr addr, |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 534 | uint32_t value) |
| 535 | { |
| 536 | uint32_t cur = 0; |
| 537 | uint32_t mask = 0xffff; |
| 538 | |
| 539 | switch (addr & ~3) { |
| 540 | case 0x00: /* GPIO_REVISION */ |
| 541 | case 0x14: /* GPIO_SYSSTATUS */ |
| 542 | case 0x38: /* GPIO_DATAIN */ |
| 543 | OMAP_RO_REG(addr); |
| 544 | break; |
| 545 | |
| 546 | case 0x10: /* GPIO_SYSCONFIG */ |
| 547 | case 0x1c: /* GPIO_IRQENABLE1 */ |
| 548 | case 0x20: /* GPIO_WAKEUPENABLE */ |
| 549 | case 0x2c: /* GPIO_IRQENABLE2 */ |
| 550 | case 0x30: /* GPIO_CTRL */ |
| 551 | case 0x34: /* GPIO_OE */ |
| 552 | case 0x3c: /* GPIO_DATAOUT */ |
| 553 | case 0x40: /* GPIO_LEVELDETECT0 */ |
| 554 | case 0x44: /* GPIO_LEVELDETECT1 */ |
| 555 | case 0x48: /* GPIO_RISINGDETECT */ |
| 556 | case 0x4c: /* GPIO_FALLINGDETECT */ |
| 557 | case 0x50: /* GPIO_DEBOUNCENABLE */ |
| 558 | case 0x54: /* GPIO_DEBOUNCINGTIME */ |
| 559 | cur = omap2_gpio_module_read(opaque, addr & ~3) & |
| 560 | ~(mask << ((addr & 3) << 3)); |
| 561 | |
| 562 | /* Fall through. */ |
| 563 | case 0x18: /* GPIO_IRQSTATUS1 */ |
| 564 | case 0x28: /* GPIO_IRQSTATUS2 */ |
| 565 | case 0x60: /* GPIO_CLEARIRQENABLE1 */ |
| 566 | case 0x64: /* GPIO_SETIRQENABLE1 */ |
| 567 | case 0x70: /* GPIO_CLEARIRQENABLE2 */ |
| 568 | case 0x74: /* GPIO_SETIREQNEABLE2 */ |
| 569 | case 0x80: /* GPIO_CLEARWKUENA */ |
| 570 | case 0x84: /* GPIO_SETWKUENA */ |
| 571 | case 0x90: /* GPIO_CLEARDATAOUT */ |
| 572 | case 0x94: /* GPIO_SETDATAOUT */ |
| 573 | value <<= (addr & 3) << 3; |
| 574 | omap2_gpio_module_write(opaque, addr, cur | value); |
| 575 | break; |
| 576 | |
| 577 | default: |
| 578 | OMAP_BAD_REG(addr); |
| 579 | return; |
| 580 | } |
| 581 | } |
| 582 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 583 | static const MemoryRegionOps omap2_gpio_module_ops = { |
| 584 | .old_mmio = { |
| 585 | .read = { |
| 586 | omap2_gpio_module_readp, |
| 587 | omap2_gpio_module_readp, |
| 588 | omap2_gpio_module_read, |
| 589 | }, |
| 590 | .write = { |
| 591 | omap2_gpio_module_writep, |
| 592 | omap2_gpio_module_writep, |
| 593 | omap2_gpio_module_write, |
| 594 | }, |
| 595 | }, |
| 596 | .endianness = DEVICE_NATIVE_ENDIAN, |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 597 | }; |
| 598 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 599 | static void omap_gpif_reset(DeviceState *dev) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 600 | { |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 601 | struct omap_gpif_s *s = OMAP1_GPIO(dev); |
| 602 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 603 | omap_gpio_reset(&s->omap1); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 604 | } |
| 605 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 606 | static void omap2_gpif_reset(DeviceState *dev) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 607 | { |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 608 | struct omap2_gpif_s *s = OMAP2_GPIO(dev); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 609 | int i; |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 610 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 611 | for (i = 0; i < s->modulecount; i++) { |
| 612 | omap2_gpio_module_reset(&s->modules[i]); |
| 613 | } |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 614 | s->autoidle = 0; |
| 615 | s->gpo = 0; |
| 616 | } |
| 617 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 618 | static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 619 | unsigned size) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 620 | { |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 621 | struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 622 | |
| 623 | switch (addr) { |
| 624 | case 0x00: /* IPGENERICOCPSPL_REVISION */ |
| 625 | return 0x18; |
| 626 | |
| 627 | case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ |
| 628 | return s->autoidle; |
| 629 | |
| 630 | case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ |
| 631 | return 0x01; |
| 632 | |
| 633 | case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ |
| 634 | return 0x00; |
| 635 | |
| 636 | case 0x40: /* IPGENERICOCPSPL_GPO */ |
| 637 | return s->gpo; |
| 638 | |
| 639 | case 0x50: /* IPGENERICOCPSPL_GPI */ |
| 640 | return 0x00; |
| 641 | } |
| 642 | |
| 643 | OMAP_BAD_REG(addr); |
| 644 | return 0; |
| 645 | } |
| 646 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 647 | static void omap2_gpif_top_write(void *opaque, hwaddr addr, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 648 | uint64_t value, unsigned size) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 649 | { |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 650 | struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 651 | |
| 652 | switch (addr) { |
| 653 | case 0x00: /* IPGENERICOCPSPL_REVISION */ |
| 654 | case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ |
| 655 | case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ |
| 656 | case 0x50: /* IPGENERICOCPSPL_GPI */ |
| 657 | OMAP_RO_REG(addr); |
| 658 | break; |
| 659 | |
| 660 | case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ |
| 661 | if (value & (1 << 1)) /* SOFTRESET */ |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 662 | omap2_gpif_reset(DEVICE(s)); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 663 | s->autoidle = value & 1; |
| 664 | break; |
| 665 | |
| 666 | case 0x40: /* IPGENERICOCPSPL_GPO */ |
| 667 | s->gpo = value & 1; |
| 668 | break; |
| 669 | |
| 670 | default: |
| 671 | OMAP_BAD_REG(addr); |
| 672 | return; |
| 673 | } |
| 674 | } |
| 675 | |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 676 | static const MemoryRegionOps omap2_gpif_top_ops = { |
| 677 | .read = omap2_gpif_top_read, |
| 678 | .write = omap2_gpif_top_write, |
| 679 | .endianness = DEVICE_NATIVE_ENDIAN, |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 680 | }; |
| 681 | |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 682 | static void omap_gpio_init(Object *obj) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 683 | { |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 684 | DeviceState *dev = DEVICE(obj); |
| 685 | struct omap_gpif_s *s = OMAP1_GPIO(obj); |
| 686 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 687 | |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 688 | qdev_init_gpio_in(dev, omap_gpio_set, 16); |
| 689 | qdev_init_gpio_out(dev, s->omap1.handler, 16); |
| 690 | sysbus_init_irq(sbd, &s->omap1.irq); |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 691 | memory_region_init_io(&s->iomem, obj, &omap_gpio_ops, &s->omap1, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 692 | "omap.gpio", 0x1000); |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 693 | sysbus_init_mmio(sbd, &s->iomem); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 694 | } |
| 695 | |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 696 | static void omap_gpio_realize(DeviceState *dev, Error **errp) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 697 | { |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 698 | struct omap_gpif_s *s = OMAP1_GPIO(dev); |
| 699 | |
| 700 | if (!s->clk) { |
| 701 | error_setg(errp, "omap-gpio: clk not connected"); |
| 702 | } |
| 703 | } |
| 704 | |
| 705 | static void omap2_gpio_realize(DeviceState *dev, Error **errp) |
| 706 | { |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 707 | struct omap2_gpif_s *s = OMAP2_GPIO(dev); |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 708 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 709 | int i; |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 710 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 711 | if (!s->iclk) { |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 712 | error_setg(errp, "omap2-gpio: iclk not connected"); |
| 713 | return; |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 714 | } |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 715 | |
| 716 | s->modulecount = s->mpu_model < omap2430 ? 4 |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 717 | : s->mpu_model < omap3430 ? 5 |
| 718 | : 6; |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 719 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 720 | if (s->mpu_model < omap3430) { |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 721 | memory_region_init_io(&s->iomem, OBJECT(dev), &omap2_gpif_top_ops, s, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 722 | "omap2.gpio", 0x1000); |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 723 | sysbus_init_mmio(sbd, &s->iomem); |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 724 | } |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 725 | |
Markus Armbruster | b45c03f | 2015-09-07 10:39:27 +0100 | [diff] [blame] | 726 | s->modules = g_new0(struct omap2_gpio_s, s->modulecount); |
| 727 | s->handler = g_new0(qemu_irq, s->modulecount * 32); |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 728 | qdev_init_gpio_in(dev, omap2_gpio_set, s->modulecount * 32); |
| 729 | qdev_init_gpio_out(dev, s->handler, s->modulecount * 32); |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 730 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 731 | for (i = 0; i < s->modulecount; i++) { |
| 732 | struct omap2_gpio_s *m = &s->modules[i]; |
Markus Armbruster | 84a3a53 | 2015-12-17 17:35:10 +0100 | [diff] [blame] | 733 | |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 734 | if (!s->fclk[i]) { |
| 735 | error_setg(errp, "omap2-gpio: fclk%d not connected", i); |
| 736 | return; |
| 737 | } |
| 738 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 739 | m->revision = (s->mpu_model < omap3430) ? 0x18 : 0x25; |
| 740 | m->handler = &s->handler[i * 32]; |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 741 | sysbus_init_irq(sbd, &m->irq[0]); /* mpu irq */ |
| 742 | sysbus_init_irq(sbd, &m->irq[1]); /* dsp irq */ |
| 743 | sysbus_init_irq(sbd, &m->wkup); |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 744 | memory_region_init_io(&m->iomem, OBJECT(dev), &omap2_gpio_module_ops, m, |
Avi Kivity | 9244b42 | 2011-11-24 14:32:34 +0200 | [diff] [blame] | 745 | "omap.gpio-module", 0x1000); |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 746 | sysbus_init_mmio(sbd, &m->iomem); |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 747 | } |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 748 | } |
| 749 | |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 750 | /* Using qdev pointer properties for the clocks is not ideal. |
| 751 | * qdev should support a generic means of defining a 'port' with |
| 752 | * an arbitrary interface for connecting two devices. Then we |
| 753 | * could reframe the omap clock API in terms of clock ports, |
| 754 | * and get some type safety. For now the best qdev provides is |
| 755 | * passing an arbitrary pointer. |
| 756 | * (It's not possible to pass in the string which is the clock |
| 757 | * name, because this device does not have the necessary information |
| 758 | * (ie the struct omap_mpu_state_s*) to do the clockname to pointer |
| 759 | * translation.) |
| 760 | */ |
| 761 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 762 | static Property omap_gpio_properties[] = { |
| 763 | DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), |
| 764 | DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), |
| 765 | DEFINE_PROP_END_OF_LIST(), |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 766 | }; |
| 767 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 768 | static void omap_gpio_class_init(ObjectClass *klass, void *data) |
| 769 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 770 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 771 | |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 772 | dc->realize = omap_gpio_realize; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 773 | dc->reset = omap_gpif_reset; |
| 774 | dc->props = omap_gpio_properties; |
Markus Armbruster | 1b111dc | 2013-11-29 10:43:44 +0100 | [diff] [blame] | 775 | /* Reason: pointer property "clk" */ |
| 776 | dc->cannot_instantiate_with_device_add_yet = true; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 777 | } |
| 778 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 779 | static const TypeInfo omap_gpio_info = { |
Andreas Färber | 1d300b5 | 2013-07-26 17:14:40 +0200 | [diff] [blame] | 780 | .name = TYPE_OMAP1_GPIO, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 781 | .parent = TYPE_SYS_BUS_DEVICE, |
| 782 | .instance_size = sizeof(struct omap_gpif_s), |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 783 | .instance_init = omap_gpio_init, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 784 | .class_init = omap_gpio_class_init, |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 785 | }; |
| 786 | |
| 787 | static Property omap2_gpio_properties[] = { |
| 788 | DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), |
| 789 | DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), |
| 790 | DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), |
| 791 | DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), |
| 792 | DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), |
| 793 | DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), |
| 794 | DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), |
| 795 | DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), |
| 796 | DEFINE_PROP_END_OF_LIST(), |
| 797 | }; |
| 798 | |
| 799 | static void omap2_gpio_class_init(ObjectClass *klass, void *data) |
| 800 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 801 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 802 | |
xiaoqiang zhao | ebc116f | 2016-06-14 15:59:13 +0100 | [diff] [blame^] | 803 | dc->realize = omap2_gpio_realize; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 804 | dc->reset = omap2_gpif_reset; |
| 805 | dc->props = omap2_gpio_properties; |
Markus Armbruster | 1b111dc | 2013-11-29 10:43:44 +0100 | [diff] [blame] | 806 | /* Reason: pointer properties "iclk", "fclk0", ..., "fclk5" */ |
| 807 | dc->cannot_instantiate_with_device_add_yet = true; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 808 | } |
| 809 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 810 | static const TypeInfo omap2_gpio_info = { |
Andreas Färber | 74d1e35 | 2013-07-26 17:19:36 +0200 | [diff] [blame] | 811 | .name = TYPE_OMAP2_GPIO, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 812 | .parent = TYPE_SYS_BUS_DEVICE, |
| 813 | .instance_size = sizeof(struct omap2_gpif_s), |
| 814 | .class_init = omap2_gpio_class_init, |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 815 | }; |
| 816 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 817 | static void omap_gpio_register_types(void) |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 818 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 819 | type_register_static(&omap_gpio_info); |
| 820 | type_register_static(&omap2_gpio_info); |
cmchao | d82310f | 2010-05-31 23:54:14 +0800 | [diff] [blame] | 821 | } |
Juha Riihimäki | 77831c2 | 2011-07-29 16:35:17 +0100 | [diff] [blame] | 822 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 823 | type_init(omap_gpio_register_types) |