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Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +01001/*
2 * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net>
3 *
4 * MCIMX6UL_EVK Board System emulation.
5 *
6 * This code is licensed under the GPL, version 2 or later.
7 * See the file `COPYING' in the top level directory.
8 *
9 * It (partially) emulates a mcimx6ul_evk board, with a Freescale
10 * i.MX6ul SoC
11 */
12
13#include "qemu/osdep.h"
14#include "qapi/error.h"
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010015#include "hw/arm/fsl-imx6ul.h"
16#include "hw/boards.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020017#include "hw/qdev-properties.h"
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010018#include "sysemu/sysemu.h"
19#include "qemu/error-report.h"
20#include "sysemu/qtest.h"
21
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010022static void mcimx6ul_evk_init(MachineState *machine)
23{
24 static struct arm_boot_info boot_info;
Igor Mammedov14dbfa52020-02-19 11:08:54 -050025 FslIMX6ULState *s;
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010026 int i;
27
28 if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) {
29 error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
30 machine->ram_size, FSL_IMX6UL_MMDC_SIZE);
31 exit(1);
32 }
33
34 boot_info = (struct arm_boot_info) {
35 .loader_start = FSL_IMX6UL_MMDC_ADDR,
36 .board_id = -1,
37 .ram_size = machine->ram_size,
Like Xucc7d44c2019-05-19 04:54:26 +080038 .nb_cpus = machine->smp.cpus,
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010039 };
40
Igor Mammedov14dbfa52020-02-19 11:08:54 -050041 s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL));
42 object_property_add_child(OBJECT(machine), "soc", OBJECT(s), &error_fatal);
43 object_property_set_bool(OBJECT(s), true, "realized", &error_fatal);
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010044
Igor Mammedov14dbfa52020-02-19 11:08:54 -050045 memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,
46 machine->ram);
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010047
48 for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) {
49 BusState *bus;
50 DeviceState *carddev;
51 DriveInfo *di;
52 BlockBackend *blk;
53
54 di = drive_get_next(IF_SD);
55 blk = di ? blk_by_legacy_dinfo(di) : NULL;
Igor Mammedov14dbfa52020-02-19 11:08:54 -050056 bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010057 carddev = qdev_create(bus, TYPE_SD_CARD);
58 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
59 object_property_set_bool(OBJECT(carddev), true,
60 "realized", &error_fatal);
61 }
62
63 if (!qtest_enabled()) {
Igor Mammedov14dbfa52020-02-19 11:08:54 -050064 arm_load_kernel(&s->cpu, machine, &boot_info);
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010065 }
66}
67
68static void mcimx6ul_evk_machine_init(MachineClass *mc)
69{
70 mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex A7)";
71 mc->init = mcimx6ul_evk_init;
72 mc->max_cpus = FSL_IMX6UL_NUM_CPUS;
Igor Mammedov14dbfa52020-02-19 11:08:54 -050073 mc->default_ram_id = "mcimx6ul-evk.ram";
Jean-Christophe Dubois0550e3b2018-08-16 14:05:28 +010074}
75DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)