Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 1 | /* |
| 2 | * x86 gdb server stub |
| 3 | * |
| 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
| 5 | * Copyright (c) 2013 SUSE LINUX Products GmbH |
| 6 | * |
| 7 | * This library is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU Lesser General Public |
| 9 | * License as published by the Free Software Foundation; either |
Chetan Pant | d9ff33a | 2020-10-23 12:28:01 +0000 | [diff] [blame] | 10 | * version 2.1 of the License, or (at your option) any later version. |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 11 | * |
| 12 | * This library is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * Lesser General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU Lesser General Public |
| 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
Peter Maydell | b6a0aa0 | 2016-01-26 18:17:03 +0000 | [diff] [blame] | 20 | #include "qemu/osdep.h" |
Paolo Bonzini | 33c1187 | 2016-03-15 16:58:45 +0100 | [diff] [blame] | 21 | #include "cpu.h" |
Philippe Mathieu-Daudé | 8b4d80b | 2024-05-07 16:05:48 +0200 | [diff] [blame] | 22 | #include "gdbstub/helpers.h" |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 23 | |
| 24 | #ifdef TARGET_X86_64 |
| 25 | static const int gpr_map[16] = { |
| 26 | R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, |
| 27 | 8, 9, 10, 11, 12, 13, 14, 15 |
| 28 | }; |
| 29 | #else |
| 30 | #define gpr_map gpr_map32 |
| 31 | #endif |
| 32 | static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; |
| 33 | |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 34 | /* |
| 35 | * Keep these in sync with assignment to |
| 36 | * gdb_num_core_regs in target/i386/cpu.c |
| 37 | * and with the machine description |
| 38 | */ |
| 39 | |
| 40 | /* |
| 41 | * SEG: 6 segments, plus fs_base, gs_base, kernel_gs_base |
| 42 | */ |
| 43 | |
| 44 | /* |
| 45 | * general regs -----> 8 or 16 |
| 46 | */ |
| 47 | #define IDX_NB_IP 1 |
| 48 | #define IDX_NB_FLAGS 1 |
| 49 | #define IDX_NB_SEG (6 + 3) |
| 50 | #define IDX_NB_CTL 6 |
| 51 | #define IDX_NB_FP 16 |
| 52 | /* |
| 53 | * fpu regs ----------> 8 or 16 |
| 54 | */ |
| 55 | #define IDX_NB_MXCSR 1 |
| 56 | /* |
| 57 | * total ----> 8+1+1+9+6+16+8+1=50 or 16+1+1+9+6+16+16+1=66 |
| 58 | */ |
| 59 | |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 60 | #define IDX_IP_REG CPU_NB_REGS |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 61 | #define IDX_FLAGS_REG (IDX_IP_REG + IDX_NB_IP) |
| 62 | #define IDX_SEG_REGS (IDX_FLAGS_REG + IDX_NB_FLAGS) |
| 63 | #define IDX_CTL_REGS (IDX_SEG_REGS + IDX_NB_SEG) |
| 64 | #define IDX_FP_REGS (IDX_CTL_REGS + IDX_NB_CTL) |
| 65 | #define IDX_XMM_REGS (IDX_FP_REGS + IDX_NB_FP) |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 66 | #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS) |
| 67 | |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 68 | #define IDX_CTL_CR0_REG (IDX_CTL_REGS + 0) |
| 69 | #define IDX_CTL_CR2_REG (IDX_CTL_REGS + 1) |
| 70 | #define IDX_CTL_CR3_REG (IDX_CTL_REGS + 2) |
| 71 | #define IDX_CTL_CR4_REG (IDX_CTL_REGS + 3) |
| 72 | #define IDX_CTL_CR8_REG (IDX_CTL_REGS + 4) |
| 73 | #define IDX_CTL_EFER_REG (IDX_CTL_REGS + 5) |
| 74 | |
| 75 | #ifdef TARGET_X86_64 |
| 76 | #define GDB_FORCE_64 1 |
| 77 | #else |
| 78 | #define GDB_FORCE_64 0 |
| 79 | #endif |
| 80 | |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 81 | static int gdb_read_reg_cs64(uint32_t hflags, GByteArray *buf, target_ulong val) |
| 82 | { |
| 83 | if ((hflags & HF_CS64_MASK) || GDB_FORCE_64) { |
| 84 | return gdb_get_reg64(buf, val); |
| 85 | } |
| 86 | return gdb_get_reg32(buf, val); |
| 87 | } |
| 88 | |
| 89 | static int gdb_write_reg_cs64(uint32_t hflags, uint8_t *buf, target_ulong *val) |
| 90 | { |
| 91 | if (hflags & HF_CS64_MASK) { |
| 92 | *val = ldq_p(buf); |
| 93 | return 8; |
| 94 | } |
| 95 | *val = ldl_p(buf); |
| 96 | return 4; |
| 97 | } |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 98 | |
Ilya Leoshkevich | e7a4427 | 2024-09-12 11:28:22 +0200 | [diff] [blame^] | 99 | static int gdb_get_reg(CPUX86State *env, GByteArray *mem_buf, target_ulong val) |
| 100 | { |
| 101 | if (TARGET_LONG_BITS == 64) { |
| 102 | if (env->hflags & HF_CS64_MASK) { |
| 103 | return gdb_get_reg64(mem_buf, val); |
| 104 | } else { |
| 105 | return gdb_get_reg64(mem_buf, val & 0xffffffffUL); |
| 106 | } |
| 107 | } else { |
| 108 | return gdb_get_reg32(mem_buf, val); |
| 109 | } |
| 110 | } |
| 111 | |
Alex Bennée | a010bdb | 2020-03-16 17:21:41 +0000 | [diff] [blame] | 112 | int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 113 | { |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 114 | X86CPU *cpu = X86_CPU(cs); |
| 115 | CPUX86State *env = &cpu->env; |
| 116 | |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 117 | uint64_t tpr; |
| 118 | |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 119 | /* N.B. GDB can't deal with changes in registers or sizes in the middle |
| 120 | of a session. So if we're in 32-bit mode on a 64-bit cpu, still act |
| 121 | as if we're on a 64-bit cpu. */ |
| 122 | |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 123 | if (n < CPU_NB_REGS) { |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 124 | if (TARGET_LONG_BITS == 64) { |
| 125 | if (env->hflags & HF_CS64_MASK) { |
| 126 | return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); |
| 127 | } else if (n < CPU_NB_REGS32) { |
| 128 | return gdb_get_reg64(mem_buf, |
| 129 | env->regs[gpr_map[n]] & 0xffffffffUL); |
| 130 | } else { |
Alex Bennée | b7b8756 | 2020-03-16 17:21:40 +0000 | [diff] [blame] | 131 | return gdb_get_regl(mem_buf, 0); |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 132 | } |
| 133 | } else { |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 134 | return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 135 | } |
| 136 | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
TaiseiIto | 49be78c | 2022-12-19 13:04:12 +0900 | [diff] [blame] | 137 | int st_index = n - IDX_FP_REGS; |
| 138 | int r_index = (st_index + env->fpstt) % 8; |
| 139 | floatx80 *fp = &env->fpregs[r_index].d; |
Alex Bennée | b7b8756 | 2020-03-16 17:21:40 +0000 | [diff] [blame] | 140 | int len = gdb_get_reg64(mem_buf, cpu_to_le64(fp->low)); |
Peter Xu | bbc40fe | 2020-04-14 21:06:25 +0100 | [diff] [blame] | 141 | len += gdb_get_reg16(mem_buf, cpu_to_le16(fp->high)); |
Alex Bennée | b7b8756 | 2020-03-16 17:21:40 +0000 | [diff] [blame] | 142 | return len; |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 143 | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
| 144 | n -= IDX_XMM_REGS; |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 145 | if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) { |
Alex Bennée | b7b8756 | 2020-03-16 17:21:40 +0000 | [diff] [blame] | 146 | return gdb_get_reg128(mem_buf, |
Alex Bennée | e618e1f | 2022-04-19 10:10:19 +0100 | [diff] [blame] | 147 | env->xmm_regs[n].ZMM_Q(1), |
| 148 | env->xmm_regs[n].ZMM_Q(0)); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 149 | } |
| 150 | } else { |
| 151 | switch (n) { |
| 152 | case IDX_IP_REG: |
Ilya Leoshkevich | e7a4427 | 2024-09-12 11:28:22 +0200 | [diff] [blame^] | 153 | return gdb_get_reg(env, mem_buf, env->eip); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 154 | case IDX_FLAGS_REG: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 155 | return gdb_get_reg32(mem_buf, env->eflags); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 156 | |
| 157 | case IDX_SEG_REGS: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 158 | return gdb_get_reg32(mem_buf, env->segs[R_CS].selector); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 159 | case IDX_SEG_REGS + 1: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 160 | return gdb_get_reg32(mem_buf, env->segs[R_SS].selector); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 161 | case IDX_SEG_REGS + 2: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 162 | return gdb_get_reg32(mem_buf, env->segs[R_DS].selector); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 163 | case IDX_SEG_REGS + 3: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 164 | return gdb_get_reg32(mem_buf, env->segs[R_ES].selector); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 165 | case IDX_SEG_REGS + 4: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 166 | return gdb_get_reg32(mem_buf, env->segs[R_FS].selector); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 167 | case IDX_SEG_REGS + 5: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 168 | return gdb_get_reg32(mem_buf, env->segs[R_GS].selector); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 169 | case IDX_SEG_REGS + 6: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 170 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->segs[R_FS].base); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 171 | case IDX_SEG_REGS + 7: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 172 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->segs[R_GS].base); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 173 | |
| 174 | case IDX_SEG_REGS + 8: |
| 175 | #ifdef TARGET_X86_64 |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 176 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->kernelgsbase); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 177 | #else |
| 178 | return gdb_get_reg32(mem_buf, 0); |
| 179 | #endif |
| 180 | |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 181 | case IDX_FP_REGS + 8: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 182 | return gdb_get_reg32(mem_buf, env->fpuc); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 183 | case IDX_FP_REGS + 9: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 184 | return gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) | |
| 185 | (env->fpstt & 0x7) << 11); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 186 | case IDX_FP_REGS + 10: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 187 | return gdb_get_reg32(mem_buf, 0); /* ftag */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 188 | case IDX_FP_REGS + 11: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 189 | return gdb_get_reg32(mem_buf, 0); /* fiseg */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 190 | case IDX_FP_REGS + 12: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 191 | return gdb_get_reg32(mem_buf, 0); /* fioff */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 192 | case IDX_FP_REGS + 13: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 193 | return gdb_get_reg32(mem_buf, 0); /* foseg */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 194 | case IDX_FP_REGS + 14: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 195 | return gdb_get_reg32(mem_buf, 0); /* fooff */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 196 | case IDX_FP_REGS + 15: |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 197 | return gdb_get_reg32(mem_buf, 0); /* fop */ |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 198 | |
| 199 | case IDX_MXCSR_REG: |
Joseph Myers | 418b0f9 | 2020-06-25 23:58:31 +0000 | [diff] [blame] | 200 | update_mxcsr_from_sse_status(env); |
Andreas Färber | 986a299 | 2013-07-07 13:05:05 +0200 | [diff] [blame] | 201 | return gdb_get_reg32(mem_buf, env->mxcsr); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 202 | |
| 203 | case IDX_CTL_CR0_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 204 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->cr[0]); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 205 | case IDX_CTL_CR2_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 206 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->cr[2]); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 207 | case IDX_CTL_CR3_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 208 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->cr[3]); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 209 | case IDX_CTL_CR4_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 210 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->cr[4]); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 211 | case IDX_CTL_CR8_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 212 | #ifndef CONFIG_USER_ONLY |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 213 | tpr = cpu_get_apic_tpr(cpu->apic_state); |
| 214 | #else |
| 215 | tpr = 0; |
| 216 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 217 | return gdb_read_reg_cs64(env->hflags, mem_buf, tpr); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 218 | |
| 219 | case IDX_CTL_EFER_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 220 | return gdb_read_reg_cs64(env->hflags, mem_buf, env->efer); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 221 | } |
| 222 | } |
| 223 | return 0; |
| 224 | } |
| 225 | |
Philippe Mathieu-Daudé | c117e5b | 2021-01-10 00:34:27 +0100 | [diff] [blame] | 226 | static int x86_cpu_gdb_load_seg(X86CPU *cpu, X86Seg sreg, uint8_t *mem_buf) |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 227 | { |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 228 | CPUX86State *env = &cpu->env; |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 229 | uint16_t selector = ldl_p(mem_buf); |
| 230 | |
| 231 | if (selector != env->segs[sreg].selector) { |
| 232 | #if defined(CONFIG_USER_ONLY) |
| 233 | cpu_x86_load_seg(env, sreg, selector); |
| 234 | #else |
| 235 | unsigned int limit, flags; |
| 236 | target_ulong base; |
| 237 | |
| 238 | if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) { |
Paolo Bonzini | b98dbc9 | 2014-05-15 16:07:04 +0200 | [diff] [blame] | 239 | int dpl = (env->eflags & VM_MASK) ? 3 : 0; |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 240 | base = selector << 4; |
| 241 | limit = 0xffff; |
Paolo Bonzini | b98dbc9 | 2014-05-15 16:07:04 +0200 | [diff] [blame] | 242 | flags = DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | |
| 243 | DESC_A_MASK | (dpl << DESC_DPL_SHIFT); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 244 | } else { |
| 245 | if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, |
| 246 | &flags)) { |
| 247 | return 4; |
| 248 | } |
| 249 | } |
| 250 | cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags); |
| 251 | #endif |
| 252 | } |
| 253 | return 4; |
| 254 | } |
| 255 | |
Ilya Leoshkevich | e7a4427 | 2024-09-12 11:28:22 +0200 | [diff] [blame^] | 256 | static int gdb_write_reg(CPUX86State *env, uint8_t *mem_buf, target_ulong *val) |
| 257 | { |
| 258 | if (TARGET_LONG_BITS == 64) { |
| 259 | if (env->hflags & HF_CS64_MASK) { |
| 260 | *val = ldq_p(mem_buf); |
| 261 | } else { |
| 262 | *val = ldq_p(mem_buf) & 0xffffffffUL; |
| 263 | } |
| 264 | return 8; |
| 265 | } else { |
| 266 | *val = (uint32_t)ldl_p(mem_buf); |
| 267 | return 4; |
| 268 | } |
| 269 | } |
| 270 | |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 271 | int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 272 | { |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 273 | X86CPU *cpu = X86_CPU(cs); |
| 274 | CPUX86State *env = &cpu->env; |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 275 | target_ulong tmp; |
| 276 | int len; |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 277 | |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 278 | /* N.B. GDB can't deal with changes in registers or sizes in the middle |
| 279 | of a session. So if we're in 32-bit mode on a 64-bit cpu, still act |
| 280 | as if we're on a 64-bit cpu. */ |
| 281 | |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 282 | if (n < CPU_NB_REGS) { |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 283 | if (TARGET_LONG_BITS == 64) { |
| 284 | if (env->hflags & HF_CS64_MASK) { |
| 285 | env->regs[gpr_map[n]] = ldtul_p(mem_buf); |
| 286 | } else if (n < CPU_NB_REGS32) { |
| 287 | env->regs[gpr_map[n]] = ldtul_p(mem_buf) & 0xffffffffUL; |
| 288 | } |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 289 | return sizeof(target_ulong); |
| 290 | } else if (n < CPU_NB_REGS32) { |
| 291 | n = gpr_map32[n]; |
| 292 | env->regs[n] &= ~0xffffffffUL; |
| 293 | env->regs[n] |= (uint32_t)ldl_p(mem_buf); |
| 294 | return 4; |
| 295 | } |
| 296 | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
Alex Bennée | b7b8756 | 2020-03-16 17:21:40 +0000 | [diff] [blame] | 297 | floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS]; |
| 298 | fp->low = le64_to_cpu(* (uint64_t *) mem_buf); |
| 299 | fp->high = le16_to_cpu(* (uint16_t *) (mem_buf + 8)); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 300 | return 10; |
| 301 | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
| 302 | n -= IDX_XMM_REGS; |
Doug Evans | e3592bc | 2016-11-03 23:35:32 +0000 | [diff] [blame] | 303 | if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) { |
Eduardo Habkost | 19cbd87 | 2015-11-26 17:14:32 -0200 | [diff] [blame] | 304 | env->xmm_regs[n].ZMM_Q(0) = ldq_p(mem_buf); |
| 305 | env->xmm_regs[n].ZMM_Q(1) = ldq_p(mem_buf + 8); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 306 | return 16; |
| 307 | } |
| 308 | } else { |
| 309 | switch (n) { |
| 310 | case IDX_IP_REG: |
Ilya Leoshkevich | e7a4427 | 2024-09-12 11:28:22 +0200 | [diff] [blame^] | 311 | return gdb_write_reg(env, mem_buf, &env->eip); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 312 | case IDX_FLAGS_REG: |
| 313 | env->eflags = ldl_p(mem_buf); |
| 314 | return 4; |
| 315 | |
| 316 | case IDX_SEG_REGS: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 317 | return x86_cpu_gdb_load_seg(cpu, R_CS, mem_buf); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 318 | case IDX_SEG_REGS + 1: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 319 | return x86_cpu_gdb_load_seg(cpu, R_SS, mem_buf); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 320 | case IDX_SEG_REGS + 2: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 321 | return x86_cpu_gdb_load_seg(cpu, R_DS, mem_buf); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 322 | case IDX_SEG_REGS + 3: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 323 | return x86_cpu_gdb_load_seg(cpu, R_ES, mem_buf); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 324 | case IDX_SEG_REGS + 4: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 325 | return x86_cpu_gdb_load_seg(cpu, R_FS, mem_buf); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 326 | case IDX_SEG_REGS + 5: |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 327 | return x86_cpu_gdb_load_seg(cpu, R_GS, mem_buf); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 328 | case IDX_SEG_REGS + 6: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 329 | return gdb_write_reg_cs64(env->hflags, mem_buf, &env->segs[R_FS].base); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 330 | case IDX_SEG_REGS + 7: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 331 | return gdb_write_reg_cs64(env->hflags, mem_buf, &env->segs[R_GS].base); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 332 | case IDX_SEG_REGS + 8: |
mkdolata@us.ibm.com | 5a07192 | 2020-01-07 14:26:07 +0100 | [diff] [blame] | 333 | #ifdef TARGET_X86_64 |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 334 | return gdb_write_reg_cs64(env->hflags, mem_buf, &env->kernelgsbase); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 335 | #endif |
mkdolata@us.ibm.com | 5a07192 | 2020-01-07 14:26:07 +0100 | [diff] [blame] | 336 | return 4; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 337 | |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 338 | case IDX_FP_REGS + 8: |
Pavel Dovgalyuk | 5bde140 | 2014-09-17 12:05:19 +0400 | [diff] [blame] | 339 | cpu_set_fpuc(env, ldl_p(mem_buf)); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 340 | return 4; |
| 341 | case IDX_FP_REGS + 9: |
| 342 | tmp = ldl_p(mem_buf); |
| 343 | env->fpstt = (tmp >> 11) & 7; |
| 344 | env->fpus = tmp & ~0x3800; |
| 345 | return 4; |
| 346 | case IDX_FP_REGS + 10: /* ftag */ |
| 347 | return 4; |
| 348 | case IDX_FP_REGS + 11: /* fiseg */ |
| 349 | return 4; |
| 350 | case IDX_FP_REGS + 12: /* fioff */ |
| 351 | return 4; |
| 352 | case IDX_FP_REGS + 13: /* foseg */ |
| 353 | return 4; |
| 354 | case IDX_FP_REGS + 14: /* fooff */ |
| 355 | return 4; |
| 356 | case IDX_FP_REGS + 15: /* fop */ |
| 357 | return 4; |
| 358 | |
| 359 | case IDX_MXCSR_REG: |
Richard Henderson | 4e47e39 | 2014-02-24 14:59:54 -0800 | [diff] [blame] | 360 | cpu_set_mxcsr(env, ldl_p(mem_buf)); |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 361 | return 4; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 362 | |
| 363 | case IDX_CTL_CR0_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 364 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 365 | #ifndef CONFIG_USER_ONLY |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 366 | cpu_x86_update_cr0(env, tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 367 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 368 | return len; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 369 | |
| 370 | case IDX_CTL_CR2_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 371 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 372 | #ifndef CONFIG_USER_ONLY |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 373 | env->cr[2] = tmp; |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 374 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 375 | return len; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 376 | |
| 377 | case IDX_CTL_CR3_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 378 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 379 | #ifndef CONFIG_USER_ONLY |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 380 | cpu_x86_update_cr3(env, tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 381 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 382 | return len; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 383 | |
| 384 | case IDX_CTL_CR4_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 385 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 386 | #ifndef CONFIG_USER_ONLY |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 387 | cpu_x86_update_cr4(env, tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 388 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 389 | return len; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 390 | |
| 391 | case IDX_CTL_CR8_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 392 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
| 393 | #ifndef CONFIG_USER_ONLY |
| 394 | cpu_set_apic_tpr(cpu->apic_state, tmp); |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 395 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 396 | return len; |
Doug Gale | 7b0f97b | 2019-01-24 00:34:57 -0330 | [diff] [blame] | 397 | |
| 398 | case IDX_CTL_EFER_REG: |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 399 | len = gdb_write_reg_cs64(env->hflags, mem_buf, &tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 400 | #ifndef CONFIG_USER_ONLY |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 401 | cpu_load_efer(env, tmp); |
Claudio Fontana | 1852f09 | 2021-03-22 14:27:56 +0100 | [diff] [blame] | 402 | #endif |
Claudio Fontana | 4d81e28 | 2021-03-22 14:27:55 +0100 | [diff] [blame] | 403 | return len; |
Andreas Färber | f20f9df | 2013-07-07 12:07:54 +0200 | [diff] [blame] | 404 | } |
| 405 | } |
| 406 | /* Unrecognised register. */ |
| 407 | return 0; |
| 408 | } |