Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 1 | #ifndef CPU_COMMON_H |
| 2 | #define CPU_COMMON_H 1 |
| 3 | |
| 4 | /* CPU interfaces that are target indpendent. */ |
| 5 | |
Paolo Bonzini | 37b76cf | 2010-04-01 19:57:10 +0200 | [diff] [blame] | 6 | #ifdef TARGET_PHYS_ADDR_BITS |
| 7 | #include "targphys.h" |
| 8 | #endif |
| 9 | |
| 10 | #ifndef NEED_CPU_H |
| 11 | #include "poison.h" |
| 12 | #endif |
| 13 | |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 14 | #include "bswap.h" |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 15 | #include "qemu-queue.h" |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 16 | |
Paul Brook | b3755a9 | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 17 | #if !defined(CONFIG_USER_ONLY) |
| 18 | |
Alexander Graf | dd31053 | 2010-12-08 12:05:36 +0100 | [diff] [blame] | 19 | enum device_endian { |
| 20 | DEVICE_NATIVE_ENDIAN, |
| 21 | DEVICE_BIG_ENDIAN, |
| 22 | DEVICE_LITTLE_ENDIAN, |
| 23 | }; |
| 24 | |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 25 | /* address in the RAM (different from a physical address) */ |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 26 | #if defined(CONFIG_XEN_BACKEND) && TARGET_PHYS_ADDR_BITS == 64 |
| 27 | typedef uint64_t ram_addr_t; |
| 28 | # define RAM_ADDR_MAX UINT64_MAX |
| 29 | # define RAM_ADDR_FMT "%" PRIx64 |
| 30 | #else |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 31 | typedef unsigned long ram_addr_t; |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 32 | # define RAM_ADDR_MAX ULONG_MAX |
| 33 | # define RAM_ADDR_FMT "%lx" |
| 34 | #endif |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 35 | |
| 36 | /* memory API */ |
| 37 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 38 | typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); |
| 39 | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 40 | |
Michael S. Tsirkin | 0fd542f | 2011-04-06 22:25:38 +0300 | [diff] [blame] | 41 | void cpu_register_physical_memory_log(target_phys_addr_t start_addr, |
| 42 | ram_addr_t size, |
| 43 | ram_addr_t phys_offset, |
| 44 | ram_addr_t region_offset, |
| 45 | bool log_dirty); |
| 46 | |
| 47 | static inline void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, |
| 48 | ram_addr_t size, |
| 49 | ram_addr_t phys_offset, |
| 50 | ram_addr_t region_offset) |
| 51 | { |
| 52 | cpu_register_physical_memory_log(start_addr, size, phys_offset, |
| 53 | region_offset, false); |
| 54 | } |
| 55 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 56 | static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, |
| 57 | ram_addr_t size, |
| 58 | ram_addr_t phys_offset) |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 59 | { |
| 60 | cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0); |
| 61 | } |
| 62 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 63 | ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 64 | ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name, |
| 65 | ram_addr_t size, void *host); |
Alex Williamson | 1724f04 | 2010-06-25 11:09:35 -0600 | [diff] [blame] | 66 | ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 67 | void qemu_ram_free(ram_addr_t addr); |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 68 | void qemu_ram_free_from_ptr(ram_addr_t addr); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 69 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 70 | /* This should only be used for ram local to a device. */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 71 | void *qemu_get_ram_ptr(ram_addr_t addr); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 72 | void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size); |
Michael S. Tsirkin | b2e0a13 | 2010-11-22 19:52:34 +0200 | [diff] [blame] | 73 | /* Same but slower, to use for migration, where the order of |
| 74 | * RAMBlocks must not change. */ |
| 75 | void *qemu_safe_ram_ptr(ram_addr_t addr); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 76 | void qemu_put_ram_ptr(void *addr); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 77 | /* This should not be used by devices. */ |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 78 | int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr); |
| 79 | ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 80 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 81 | int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read, |
| 82 | CPUWriteMemoryFunc * const *mem_write, |
Alexander Graf | dd31053 | 2010-12-08 12:05:36 +0100 | [diff] [blame] | 83 | void *opaque, enum device_endian endian); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 84 | void cpu_unregister_io_memory(int table_address); |
| 85 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 86 | void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 87 | int len, int is_write); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 88 | static inline void cpu_physical_memory_read(target_phys_addr_t addr, |
Stefan Weil | 3bad981 | 2011-04-10 17:28:56 +0200 | [diff] [blame] | 89 | void *buf, int len) |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 90 | { |
| 91 | cpu_physical_memory_rw(addr, buf, len, 0); |
| 92 | } |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 93 | static inline void cpu_physical_memory_write(target_phys_addr_t addr, |
Stefan Weil | 3bad981 | 2011-04-10 17:28:56 +0200 | [diff] [blame] | 94 | const void *buf, int len) |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 95 | { |
Stefan Weil | 3bad981 | 2011-04-10 17:28:56 +0200 | [diff] [blame] | 96 | cpu_physical_memory_rw(addr, (void *)buf, len, 1); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 97 | } |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 98 | void *cpu_physical_memory_map(target_phys_addr_t addr, |
| 99 | target_phys_addr_t *plen, |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 100 | int is_write); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 101 | void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, |
| 102 | int is_write, target_phys_addr_t access_len); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 103 | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); |
| 104 | void cpu_unregister_map_client(void *cookie); |
| 105 | |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 106 | struct CPUPhysMemoryClient; |
| 107 | typedef struct CPUPhysMemoryClient CPUPhysMemoryClient; |
| 108 | struct CPUPhysMemoryClient { |
| 109 | void (*set_memory)(struct CPUPhysMemoryClient *client, |
| 110 | target_phys_addr_t start_addr, |
| 111 | ram_addr_t size, |
Michael S. Tsirkin | 0fd542f | 2011-04-06 22:25:38 +0300 | [diff] [blame] | 112 | ram_addr_t phys_offset, |
| 113 | bool log_dirty); |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 114 | int (*sync_dirty_bitmap)(struct CPUPhysMemoryClient *client, |
| 115 | target_phys_addr_t start_addr, |
| 116 | target_phys_addr_t end_addr); |
| 117 | int (*migration_log)(struct CPUPhysMemoryClient *client, |
| 118 | int enable); |
Anthony PERARD | e5896b1 | 2011-02-07 12:19:23 +0100 | [diff] [blame] | 119 | int (*log_start)(struct CPUPhysMemoryClient *client, |
| 120 | target_phys_addr_t phys_addr, ram_addr_t size); |
| 121 | int (*log_stop)(struct CPUPhysMemoryClient *client, |
| 122 | target_phys_addr_t phys_addr, ram_addr_t size); |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 123 | QLIST_ENTRY(CPUPhysMemoryClient) list; |
| 124 | }; |
| 125 | |
| 126 | void cpu_register_phys_memory_client(CPUPhysMemoryClient *); |
| 127 | void cpu_unregister_phys_memory_client(CPUPhysMemoryClient *); |
| 128 | |
Blue Swirl | 6842a08 | 2010-03-21 19:47:13 +0000 | [diff] [blame] | 129 | /* Coalesced MMIO regions are areas where write operations can be reordered. |
| 130 | * This usually implies that write operations are side-effect free. This allows |
| 131 | * batching which can make a major impact on performance when using |
| 132 | * virtualization. |
| 133 | */ |
| 134 | void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size); |
| 135 | |
| 136 | void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size); |
| 137 | |
| 138 | void qemu_flush_coalesced_mmio_buffer(void); |
| 139 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 140 | uint32_t ldub_phys(target_phys_addr_t addr); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 141 | uint32_t lduw_le_phys(target_phys_addr_t addr); |
| 142 | uint32_t lduw_be_phys(target_phys_addr_t addr); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 143 | uint32_t ldl_le_phys(target_phys_addr_t addr); |
| 144 | uint32_t ldl_be_phys(target_phys_addr_t addr); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 145 | uint64_t ldq_le_phys(target_phys_addr_t addr); |
| 146 | uint64_t ldq_be_phys(target_phys_addr_t addr); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 147 | void stb_phys(target_phys_addr_t addr, uint32_t val); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 148 | void stw_le_phys(target_phys_addr_t addr, uint32_t val); |
| 149 | void stw_be_phys(target_phys_addr_t addr, uint32_t val); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 150 | void stl_le_phys(target_phys_addr_t addr, uint32_t val); |
| 151 | void stl_be_phys(target_phys_addr_t addr, uint32_t val); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 152 | void stq_le_phys(target_phys_addr_t addr, uint64_t val); |
| 153 | void stq_be_phys(target_phys_addr_t addr, uint64_t val); |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 154 | |
Blue Swirl | 21673cd | 2011-07-14 15:22:20 +0000 | [diff] [blame] | 155 | #ifdef NEED_CPU_H |
| 156 | uint32_t lduw_phys(target_phys_addr_t addr); |
| 157 | uint32_t ldl_phys(target_phys_addr_t addr); |
| 158 | uint64_t ldq_phys(target_phys_addr_t addr); |
| 159 | void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); |
| 160 | void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val); |
| 161 | void stw_phys(target_phys_addr_t addr, uint32_t val); |
| 162 | void stl_phys(target_phys_addr_t addr, uint32_t val); |
| 163 | void stq_phys(target_phys_addr_t addr, uint64_t val); |
| 164 | #endif |
| 165 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 166 | void cpu_physical_memory_write_rom(target_phys_addr_t addr, |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 167 | const uint8_t *buf, int len); |
| 168 | |
| 169 | #define IO_MEM_SHIFT 3 |
| 170 | |
| 171 | #define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ |
| 172 | #define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ |
| 173 | #define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) |
| 174 | #define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) |
| 175 | |
| 176 | /* Acts like a ROM when read and like a device when written. */ |
| 177 | #define IO_MEM_ROMD (1) |
| 178 | #define IO_MEM_SUBPAGE (2) |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 179 | |
Paul Brook | b3755a9 | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 180 | #endif |
| 181 | |
Paul Brook | 1ad2134 | 2009-05-19 16:17:58 +0100 | [diff] [blame] | 182 | #endif /* !CPU_COMMON_H */ |