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Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +02001/*
2 * QEMU IDE Emulation: mmio support (for embedded).
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
Markus Armbruster0b8fa322019-05-23 16:35:07 +020025
Peter Maydell53239262016-01-26 18:17:09 +000026#include "qemu/osdep.h"
Andreas Färber6b2578d2013-02-01 00:13:41 +010027#include "hw/sysbus.h"
Markus Armbrusterd6454272019-08-12 07:23:45 +020028#include "migration/vmstate.h"
Markus Armbruster0b8fa322019-05-23 16:35:07 +020029#include "qemu/module.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010030#include "sysemu/dma.h"
Gerd Hoffmann59f2a782009-08-20 15:22:26 +020031
Markus Armbrustera9c94272016-06-22 19:11:19 +020032#include "hw/ide/internal.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020033#include "hw/qdev-properties.h"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040034#include "qom/object.h"
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020035
36/***********************************************************/
37/* MMIO based ide port
38 * This emulates IDE device connected directly to the CPU bus without
39 * dedicated ide controller, which is often seen on embedded boards.
40 */
41
Andreas Färber6b2578d2013-02-01 00:13:41 +010042#define TYPE_MMIO_IDE "mmio-ide"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040043typedef struct MMIOIDEState MMIOState;
Eduardo Habkost8110fa12020-08-31 17:07:33 -040044DECLARE_INSTANCE_CHECKER(MMIOState, MMIO_IDE,
45 TYPE_MMIO_IDE)
Andreas Färber6b2578d2013-02-01 00:13:41 +010046
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040047struct MMIOIDEState {
Andreas Färber6b2578d2013-02-01 00:13:41 +010048 /*< private >*/
49 SysBusDevice parent_obj;
50 /*< public >*/
51
Juan Quintela0ce51e92009-10-07 18:55:36 +020052 IDEBus bus;
Andreas Färber6b2578d2013-02-01 00:13:41 +010053
54 uint32_t shift;
55 qemu_irq irq;
Avi Kivity9d7f1b92011-11-09 16:10:07 +020056 MemoryRegion iomem1, iomem2;
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040057};
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020058
Andreas Färber6b2578d2013-02-01 00:13:41 +010059static void mmio_ide_reset(DeviceState *dev)
Blue Swirl4a643562009-11-07 14:13:05 +000060{
Andreas Färber6b2578d2013-02-01 00:13:41 +010061 MMIOState *s = MMIO_IDE(dev);
Blue Swirl4a643562009-11-07 14:13:05 +000062
63 ide_bus_reset(&s->bus);
64}
65
Avi Kivitya8170e52012-10-23 12:30:10 +020066static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
Avi Kivity9d7f1b92011-11-09 16:10:07 +020067 unsigned size)
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020068{
Juan Quintela18c0fb32009-10-07 16:56:21 +020069 MMIOState *s = opaque;
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020070 addr >>= s->shift;
71 if (addr & 7)
Juan Quintela0ce51e92009-10-07 18:55:36 +020072 return ide_ioport_read(&s->bus, addr);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020073 else
Juan Quintela0ce51e92009-10-07 18:55:36 +020074 return ide_data_readw(&s->bus, 0);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020075}
76
Avi Kivitya8170e52012-10-23 12:30:10 +020077static void mmio_ide_write(void *opaque, hwaddr addr,
Avi Kivity9d7f1b92011-11-09 16:10:07 +020078 uint64_t val, unsigned size)
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020079{
Juan Quintela18c0fb32009-10-07 16:56:21 +020080 MMIOState *s = opaque;
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020081 addr >>= s->shift;
82 if (addr & 7)
Juan Quintela0ce51e92009-10-07 18:55:36 +020083 ide_ioport_write(&s->bus, addr, val);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020084 else
Juan Quintela0ce51e92009-10-07 18:55:36 +020085 ide_data_writew(&s->bus, 0, val);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020086}
87
Avi Kivity9d7f1b92011-11-09 16:10:07 +020088static const MemoryRegionOps mmio_ide_ops = {
89 .read = mmio_ide_read,
90 .write = mmio_ide_write,
Valentin Manea1a7044b2014-08-31 11:32:08 +030091 .endianness = DEVICE_LITTLE_ENDIAN,
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020092};
93
Avi Kivitya8170e52012-10-23 12:30:10 +020094static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
Avi Kivity9d7f1b92011-11-09 16:10:07 +020095 unsigned size)
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020096{
Juan Quintela18c0fb32009-10-07 16:56:21 +020097 MMIOState *s= opaque;
Juan Quintela0ce51e92009-10-07 18:55:36 +020098 return ide_status_read(&s->bus, 0);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +020099}
100
John Snow98d98912020-07-24 01:22:54 -0400101static void mmio_ide_ctrl_write(void *opaque, hwaddr addr,
102 uint64_t val, unsigned size)
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200103{
Juan Quintela18c0fb32009-10-07 16:56:21 +0200104 MMIOState *s = opaque;
John Snow98d98912020-07-24 01:22:54 -0400105 ide_ctrl_write(&s->bus, 0, val);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200106}
107
Avi Kivity9d7f1b92011-11-09 16:10:07 +0200108static const MemoryRegionOps mmio_ide_cs_ops = {
109 .read = mmio_ide_status_read,
John Snow98d98912020-07-24 01:22:54 -0400110 .write = mmio_ide_ctrl_write,
Valentin Manea1a7044b2014-08-31 11:32:08 +0300111 .endianness = DEVICE_LITTLE_ENDIAN,
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200112};
113
Juan Quintela24daf352009-10-07 18:58:25 +0200114static const VMStateDescription vmstate_ide_mmio = {
115 .name = "mmio-ide",
116 .version_id = 3,
117 .minimum_version_id = 0,
Juan Quintela35d08452014-04-16 16:01:33 +0200118 .fields = (VMStateField[]) {
Juan Quintela24daf352009-10-07 18:58:25 +0200119 VMSTATE_IDE_BUS(bus, MMIOState),
120 VMSTATE_IDE_DRIVES(bus.ifs, MMIOState),
121 VMSTATE_END_OF_LIST()
122 }
123};
Gerd Hoffmann2bcbf7e2009-08-20 15:22:25 +0200124
Andreas Färber6b2578d2013-02-01 00:13:41 +0100125static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200126{
Andreas Färber6b2578d2013-02-01 00:13:41 +0100127 SysBusDevice *d = SYS_BUS_DEVICE(dev);
128 MMIOState *s = MMIO_IDE(dev);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200129
Andreas Färber6b2578d2013-02-01 00:13:41 +0100130 ide_init2(&s->bus, s->irq);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200131
Paolo Bonzini1437c942013-06-06 21:25:08 -0400132 memory_region_init_io(&s->iomem1, OBJECT(s), &mmio_ide_ops, s,
Andreas Färber6b2578d2013-02-01 00:13:41 +0100133 "ide-mmio.1", 16 << s->shift);
Paolo Bonzini1437c942013-06-06 21:25:08 -0400134 memory_region_init_io(&s->iomem2, OBJECT(s), &mmio_ide_cs_ops, s,
Andreas Färber6b2578d2013-02-01 00:13:41 +0100135 "ide-mmio.2", 2 << s->shift);
136 sysbus_init_mmio(d, &s->iomem1);
137 sysbus_init_mmio(d, &s->iomem2);
Gerd Hoffmann3d2bf4a2009-08-20 15:22:22 +0200138}
139
Andreas Färber6b2578d2013-02-01 00:13:41 +0100140static void mmio_ide_initfn(Object *obj)
141{
142 SysBusDevice *d = SYS_BUS_DEVICE(obj);
143 MMIOState *s = MMIO_IDE(obj);
144
Andreas Färberc6baf942013-08-23 20:18:50 +0200145 ide_bus_new(&s->bus, sizeof(s->bus), DEVICE(obj), 0, 2);
Andreas Färber6b2578d2013-02-01 00:13:41 +0100146 sysbus_init_irq(d, &s->irq);
147}
148
149static Property mmio_ide_properties[] = {
150 DEFINE_PROP_UINT32("shift", MMIOState, shift, 0),
151 DEFINE_PROP_END_OF_LIST()
152};
153
154static void mmio_ide_class_init(ObjectClass *oc, void *data)
155{
156 DeviceClass *dc = DEVICE_CLASS(oc);
157
158 dc->realize = mmio_ide_realizefn;
159 dc->reset = mmio_ide_reset;
Marc-André Lureau4f67d302020-01-10 19:30:32 +0400160 device_class_set_props(dc, mmio_ide_properties);
Andreas Färber6b2578d2013-02-01 00:13:41 +0100161 dc->vmsd = &vmstate_ide_mmio;
162}
163
164static const TypeInfo mmio_ide_type_info = {
165 .name = TYPE_MMIO_IDE,
166 .parent = TYPE_SYS_BUS_DEVICE,
167 .instance_size = sizeof(MMIOState),
168 .instance_init = mmio_ide_initfn,
169 .class_init = mmio_ide_class_init,
170};
171
172static void mmio_ide_register_types(void)
173{
174 type_register_static(&mmio_ide_type_info);
175}
176
177void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1)
178{
179 MMIOState *s = MMIO_IDE(dev);
180
181 if (hd0 != NULL) {
182 ide_create_drive(&s->bus, 0, hd0);
183 }
184 if (hd1 != NULL) {
185 ide_create_drive(&s->bus, 1, hd1);
186 }
187}
188
189type_init(mmio_ide_register_types)