blob: 1a0776d2cf795802a573610b4631c7c232bd44fe [file] [log] [blame]
Edgar E. Iglesias4acb54b2009-05-20 19:37:39 +02001/*
2 * Microblaze helper routines.
3 *
4 * Copyright (c) 2009 Edgar E. Iglesias <edgar.iglesias@gmail.com>.
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
19 */
20
21#include <assert.h>
22#include "exec.h"
23#include "helper.h"
24#include "host-utils.h"
25
26#define D(x)
27
28#if !defined(CONFIG_USER_ONLY)
29#define MMUSUFFIX _mmu
30#define SHIFT 0
31#include "softmmu_template.h"
32#define SHIFT 1
33#include "softmmu_template.h"
34#define SHIFT 2
35#include "softmmu_template.h"
36#define SHIFT 3
37#include "softmmu_template.h"
38
39/* Try to fill the TLB and return an exception if error. If retaddr is
40 NULL, it means that the function was called in C code (i.e. not
41 from generated code or from helper.c) */
42/* XXX: fix it to restore all registers */
43void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
44{
45 TranslationBlock *tb;
46 CPUState *saved_env;
47 unsigned long pc;
48 int ret;
49
50 /* XXX: hack to restore env in all cases, even if not called from
51 generated code */
52 saved_env = env;
53 env = cpu_single_env;
54
55 ret = cpu_mb_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
56 if (unlikely(ret)) {
57 if (retaddr) {
58 /* now we have a real cpu fault */
59 pc = (unsigned long)retaddr;
60 tb = tb_find_pc(pc);
61 if (tb) {
62 /* the PC is inside the translated code. It means that we have
63 a virtual CPU fault */
64 cpu_restore_state(tb, env, pc, NULL);
65 }
66 }
67 cpu_loop_exit();
68 }
69 env = saved_env;
70}
71#endif
72
73void helper_raise_exception(uint32_t index)
74{
75 env->exception_index = index;
76 cpu_loop_exit();
77}
78
79void helper_debug(void)
80{
81 int i;
82
83 qemu_log("PC=%8.8x\n", env->sregs[SR_PC]);
84 for (i = 0; i < 32; i++) {
85 qemu_log("r%2.2d=%8.8x ", i, env->regs[i]);
86 if ((i + 1) % 4 == 0)
87 qemu_log("\n");
88 }
89 qemu_log("\n\n");
90}
91
92static inline uint32_t compute_carry(uint32_t a, uint32_t b, uint32_t cin)
93{
94 uint32_t cout = 0;
95
96 if ((b == ~0) && cin)
97 cout = 1;
98 else if ((~0 - a) < (b + cin))
99 cout = 1;
100 return cout;
101}
102
103uint32_t helper_cmp(uint32_t a, uint32_t b)
104{
105 uint32_t t;
106
107 t = b + ~a + 1;
108 if ((b & 0x80000000) ^ (a & 0x80000000))
109 t = (t & 0x7fffffff) | (b & 0x80000000);
110 return t;
111}
112
113uint32_t helper_cmpu(uint32_t a, uint32_t b)
114{
115 uint32_t t;
116
117 t = b + ~a + 1;
118 if ((b & 0x80000000) ^ (a & 0x80000000))
119 t = (t & 0x7fffffff) | (a & 0x80000000);
120 return t;
121}
122
123uint32_t helper_addkc(uint32_t a, uint32_t b, uint32_t k, uint32_t c)
124{
125 uint32_t d, cf = 0, ncf;
126
127 if (c)
128 cf = env->sregs[SR_MSR] >> 31;
129 assert(cf == 0 || cf == 1);
130 d = a + b + cf;
131
132 if (!k) {
133 ncf = compute_carry(a, b, cf);
134 assert(ncf == 0 || ncf == 1);
135 if (ncf)
136 env->sregs[SR_MSR] |= MSR_C | MSR_CC;
137 else
138 env->sregs[SR_MSR] &= ~(MSR_C | MSR_CC);
139 }
140 D(qemu_log("%x = %x + %x cf=%d ncf=%d k=%d c=%d\n",
141 d, a, b, cf, ncf, k, c));
142 return d;
143}
144
145uint32_t helper_subkc(uint32_t a, uint32_t b, uint32_t k, uint32_t c)
146{
147 uint32_t d, cf = 1, ncf;
148
149 if (c)
150 cf = env->sregs[SR_MSR] >> 31;
151 assert(cf == 0 || cf == 1);
152 d = b + ~a + cf;
153
154 if (!k) {
155 ncf = compute_carry(b, ~a, cf);
156 assert(ncf == 0 || ncf == 1);
157 if (ncf)
158 env->sregs[SR_MSR] |= MSR_C | MSR_CC;
159 else
160 env->sregs[SR_MSR] &= ~(MSR_C | MSR_CC);
161 }
162 D(qemu_log("%x = %x + %x cf=%d ncf=%d k=%d c=%d\n",
163 d, a, b, cf, ncf, k, c));
164 return d;
165}
166
167static inline int div_prepare(uint32_t a, uint32_t b)
168{
169 if (b == 0) {
170 env->sregs[SR_MSR] |= MSR_DZ;
171 /* FIXME: Raise the div by zero exception. */
172 return 0;
173 }
174 env->sregs[SR_MSR] &= ~MSR_DZ;
175 return 1;
176}
177
178uint32_t helper_divs(uint32_t a, uint32_t b)
179{
180 if (!div_prepare(a, b))
181 return 0;
182 return (int32_t)a / (int32_t)b;
183}
184
185uint32_t helper_divu(uint32_t a, uint32_t b)
186{
187 if (!div_prepare(a, b))
188 return 0;
189 return a / b;
190}
191
192uint32_t helper_pcmpbf(uint32_t a, uint32_t b)
193{
194 unsigned int i;
195 uint32_t mask = 0xff000000;
196
197 for (i = 0; i < 4; i++) {
198 if ((a & mask) == (b & mask))
199 return i + 1;
200 mask >>= 8;
201 }
202 return 0;
203}
204
205#if !defined(CONFIG_USER_ONLY)
206/* Writes/reads to the MMU's special regs end up here. */
207uint32_t helper_mmu_read(uint32_t rn)
208{
209 return mmu_read(env, rn);
210}
211
212void helper_mmu_write(uint32_t rn, uint32_t v)
213{
214 mmu_write(env, rn, v);
215}
216#endif