Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Helpers for CWP and PSTATE handling |
| 3 | * |
| 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Peter Maydell | db5ebe5 | 2016-01-26 18:16:59 +0000 | [diff] [blame] | 20 | #include "qemu/osdep.h" |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 21 | #include "cpu.h" |
Richard Henderson | 2ef6175 | 2014-04-07 22:31:41 -0700 | [diff] [blame] | 22 | #include "exec/helper-proto.h" |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 23 | #include "trace.h" |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 24 | |
| 25 | static inline void memcpy32(target_ulong *dst, const target_ulong *src) |
| 26 | { |
| 27 | dst[0] = src[0]; |
| 28 | dst[1] = src[1]; |
| 29 | dst[2] = src[2]; |
| 30 | dst[3] = src[3]; |
| 31 | dst[4] = src[4]; |
| 32 | dst[5] = src[5]; |
| 33 | dst[6] = src[6]; |
| 34 | dst[7] = src[7]; |
| 35 | } |
| 36 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 37 | void cpu_set_cwp(CPUSPARCState *env, int new_cwp) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 38 | { |
| 39 | /* put the modified wrap registers at their proper location */ |
| 40 | if (env->cwp == env->nwindows - 1) { |
| 41 | memcpy32(env->regbase, env->regbase + env->nwindows * 16); |
| 42 | } |
| 43 | env->cwp = new_cwp; |
| 44 | |
| 45 | /* put the wrap registers at their temporary location */ |
| 46 | if (new_cwp == env->nwindows - 1) { |
| 47 | memcpy32(env->regbase + env->nwindows * 16, env->regbase); |
| 48 | } |
| 49 | env->regwptr = env->regbase + (new_cwp * 16); |
| 50 | } |
| 51 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 52 | target_ulong cpu_get_psr(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 53 | { |
| 54 | helper_compute_psr(env); |
| 55 | |
| 56 | #if !defined(TARGET_SPARC64) |
| 57 | return env->version | (env->psr & PSR_ICC) | |
| 58 | (env->psref ? PSR_EF : 0) | |
| 59 | (env->psrpil << 8) | |
| 60 | (env->psrs ? PSR_S : 0) | |
| 61 | (env->psrps ? PSR_PS : 0) | |
| 62 | (env->psret ? PSR_ET : 0) | env->cwp; |
| 63 | #else |
| 64 | return env->psr & PSR_ICC; |
| 65 | #endif |
| 66 | } |
| 67 | |
Peter Maydell | 4552a09 | 2016-01-11 12:40:24 +0000 | [diff] [blame] | 68 | void cpu_put_psr_raw(CPUSPARCState *env, target_ulong val) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 69 | { |
| 70 | env->psr = val & PSR_ICC; |
| 71 | #if !defined(TARGET_SPARC64) |
| 72 | env->psref = (val & PSR_EF) ? 1 : 0; |
| 73 | env->psrpil = (val & PSR_PIL) >> 8; |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 74 | env->psrs = (val & PSR_S) ? 1 : 0; |
| 75 | env->psrps = (val & PSR_PS) ? 1 : 0; |
| 76 | env->psret = (val & PSR_ET) ? 1 : 0; |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 77 | #endif |
| 78 | env->cc_op = CC_OP_FLAGS; |
Peter Maydell | 4552a09 | 2016-01-11 12:40:24 +0000 | [diff] [blame] | 79 | #if !defined(TARGET_SPARC64) |
| 80 | cpu_set_cwp(env, val & PSR_CWP); |
| 81 | #endif |
| 82 | } |
| 83 | |
| 84 | void cpu_put_psr(CPUSPARCState *env, target_ulong val) |
| 85 | { |
| 86 | cpu_put_psr_raw(env, val); |
| 87 | #if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) |
| 88 | cpu_check_irqs(env); |
| 89 | #endif |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 90 | } |
| 91 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 92 | int cpu_cwp_inc(CPUSPARCState *env, int cwp) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 93 | { |
| 94 | if (unlikely(cwp >= env->nwindows)) { |
| 95 | cwp -= env->nwindows; |
| 96 | } |
| 97 | return cwp; |
| 98 | } |
| 99 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 100 | int cpu_cwp_dec(CPUSPARCState *env, int cwp) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 101 | { |
| 102 | if (unlikely(cwp < 0)) { |
| 103 | cwp += env->nwindows; |
| 104 | } |
| 105 | return cwp; |
| 106 | } |
| 107 | |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 108 | #ifndef TARGET_SPARC64 |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 109 | void helper_rett(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 110 | { |
| 111 | unsigned int cwp; |
| 112 | |
| 113 | if (env->psret == 1) { |
| 114 | helper_raise_exception(env, TT_ILL_INSN); |
| 115 | } |
| 116 | |
| 117 | env->psret = 1; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 118 | cwp = cpu_cwp_inc(env, env->cwp + 1) ; |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 119 | if (env->wim & (1 << cwp)) { |
| 120 | helper_raise_exception(env, TT_WIN_UNF); |
| 121 | } |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 122 | cpu_set_cwp(env, cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 123 | env->psrs = env->psrps; |
| 124 | } |
| 125 | |
| 126 | /* XXX: use another pointer for %iN registers to avoid slow wrapping |
| 127 | handling ? */ |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 128 | void helper_save(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 129 | { |
| 130 | uint32_t cwp; |
| 131 | |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 132 | cwp = cpu_cwp_dec(env, env->cwp - 1); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 133 | if (env->wim & (1 << cwp)) { |
| 134 | helper_raise_exception(env, TT_WIN_OVF); |
| 135 | } |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 136 | cpu_set_cwp(env, cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 137 | } |
| 138 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 139 | void helper_restore(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 140 | { |
| 141 | uint32_t cwp; |
| 142 | |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 143 | cwp = cpu_cwp_inc(env, env->cwp + 1); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 144 | if (env->wim & (1 << cwp)) { |
| 145 | helper_raise_exception(env, TT_WIN_UNF); |
| 146 | } |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 147 | cpu_set_cwp(env, cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 148 | } |
| 149 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 150 | void helper_wrpsr(CPUSPARCState *env, target_ulong new_psr) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 151 | { |
| 152 | if ((new_psr & PSR_CWP) >= env->nwindows) { |
| 153 | helper_raise_exception(env, TT_ILL_INSN); |
| 154 | } else { |
| 155 | cpu_put_psr(env, new_psr); |
| 156 | } |
| 157 | } |
| 158 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 159 | target_ulong helper_rdpsr(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 160 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 161 | return cpu_get_psr(env); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | #else |
| 165 | /* XXX: use another pointer for %iN registers to avoid slow wrapping |
| 166 | handling ? */ |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 167 | void helper_save(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 168 | { |
| 169 | uint32_t cwp; |
| 170 | |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 171 | cwp = cpu_cwp_dec(env, env->cwp - 1); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 172 | if (env->cansave == 0) { |
| 173 | helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? |
| 174 | (TT_WOTHER | |
| 175 | ((env->wstate & 0x38) >> 1)) : |
| 176 | ((env->wstate & 0x7) << 2))); |
| 177 | } else { |
| 178 | if (env->cleanwin - env->canrestore == 0) { |
| 179 | /* XXX Clean windows without trap */ |
| 180 | helper_raise_exception(env, TT_CLRWIN); |
| 181 | } else { |
| 182 | env->cansave--; |
| 183 | env->canrestore++; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 184 | cpu_set_cwp(env, cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 185 | } |
| 186 | } |
| 187 | } |
| 188 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 189 | void helper_restore(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 190 | { |
| 191 | uint32_t cwp; |
| 192 | |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 193 | cwp = cpu_cwp_inc(env, env->cwp + 1); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 194 | if (env->canrestore == 0) { |
| 195 | helper_raise_exception(env, TT_FILL | (env->otherwin != 0 ? |
| 196 | (TT_WOTHER | |
| 197 | ((env->wstate & 0x38) >> 1)) : |
| 198 | ((env->wstate & 0x7) << 2))); |
| 199 | } else { |
| 200 | env->cansave++; |
| 201 | env->canrestore--; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 202 | cpu_set_cwp(env, cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 203 | } |
| 204 | } |
| 205 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 206 | void helper_flushw(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 207 | { |
| 208 | if (env->cansave != env->nwindows - 2) { |
| 209 | helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? |
| 210 | (TT_WOTHER | |
| 211 | ((env->wstate & 0x38) >> 1)) : |
| 212 | ((env->wstate & 0x7) << 2))); |
| 213 | } |
| 214 | } |
| 215 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 216 | void helper_saved(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 217 | { |
| 218 | env->cansave++; |
| 219 | if (env->otherwin == 0) { |
| 220 | env->canrestore--; |
| 221 | } else { |
| 222 | env->otherwin--; |
| 223 | } |
| 224 | } |
| 225 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 226 | void helper_restored(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 227 | { |
| 228 | env->canrestore++; |
| 229 | if (env->cleanwin < env->nwindows - 1) { |
| 230 | env->cleanwin++; |
| 231 | } |
| 232 | if (env->otherwin == 0) { |
| 233 | env->cansave--; |
| 234 | } else { |
| 235 | env->otherwin--; |
| 236 | } |
| 237 | } |
| 238 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 239 | target_ulong cpu_get_ccr(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 240 | { |
| 241 | target_ulong psr; |
| 242 | |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 243 | psr = cpu_get_psr(env); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 244 | |
| 245 | return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20); |
| 246 | } |
| 247 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 248 | void cpu_put_ccr(CPUSPARCState *env, target_ulong val) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 249 | { |
| 250 | env->xcc = (val >> 4) << 20; |
| 251 | env->psr = (val & 0xf) << 20; |
| 252 | CC_OP = CC_OP_FLAGS; |
| 253 | } |
| 254 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 255 | target_ulong cpu_get_cwp64(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 256 | { |
| 257 | return env->nwindows - 1 - env->cwp; |
| 258 | } |
| 259 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 260 | void cpu_put_cwp64(CPUSPARCState *env, int cwp) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 261 | { |
| 262 | if (unlikely(cwp >= env->nwindows || cwp < 0)) { |
| 263 | cwp %= env->nwindows; |
| 264 | } |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 265 | cpu_set_cwp(env, env->nwindows - 1 - cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 266 | } |
| 267 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 268 | target_ulong helper_rdccr(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 269 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 270 | return cpu_get_ccr(env); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 273 | void helper_wrccr(CPUSPARCState *env, target_ulong new_ccr) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 274 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 275 | cpu_put_ccr(env, new_ccr); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | /* CWP handling is reversed in V9, but we still use the V8 register |
| 279 | order. */ |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 280 | target_ulong helper_rdcwp(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 281 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 282 | return cpu_get_cwp64(env); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 283 | } |
| 284 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 285 | void helper_wrcwp(CPUSPARCState *env, target_ulong new_cwp) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 286 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 287 | cpu_put_cwp64(env, new_cwp); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 288 | } |
| 289 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 290 | static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 291 | { |
| 292 | switch (pstate) { |
| 293 | default: |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 294 | trace_win_helper_gregset_error(pstate); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 295 | /* pass through to normal set of global registers */ |
| 296 | case 0: |
| 297 | return env->bgregs; |
| 298 | case PS_AG: |
| 299 | return env->agregs; |
| 300 | case PS_MG: |
| 301 | return env->mgregs; |
| 302 | case PS_IG: |
| 303 | return env->igregs; |
| 304 | } |
| 305 | } |
| 306 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 307 | void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 308 | { |
| 309 | uint32_t pstate_regs, new_pstate_regs; |
| 310 | uint64_t *src, *dst; |
| 311 | |
| 312 | if (env->def->features & CPU_FEATURE_GL) { |
| 313 | /* PS_AG is not implemented in this case */ |
| 314 | new_pstate &= ~PS_AG; |
| 315 | } |
| 316 | |
| 317 | pstate_regs = env->pstate & 0xc01; |
| 318 | new_pstate_regs = new_pstate & 0xc01; |
| 319 | |
| 320 | if (new_pstate_regs != pstate_regs) { |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 321 | trace_win_helper_switch_pstate(pstate_regs, new_pstate_regs); |
| 322 | |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 323 | /* Switch global register bank */ |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 324 | src = get_gregset(env, new_pstate_regs); |
| 325 | dst = get_gregset(env, pstate_regs); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 326 | memcpy32(dst, env->gregs); |
| 327 | memcpy32(env->gregs, src); |
| 328 | } else { |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 329 | trace_win_helper_no_switch_pstate(new_pstate_regs); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 330 | } |
| 331 | env->pstate = new_pstate; |
| 332 | } |
| 333 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 334 | void helper_wrpstate(CPUSPARCState *env, target_ulong new_state) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 335 | { |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 336 | cpu_change_pstate(env, new_state & 0xf3f); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 337 | |
| 338 | #if !defined(CONFIG_USER_ONLY) |
| 339 | if (cpu_interrupts_enabled(env)) { |
| 340 | cpu_check_irqs(env); |
| 341 | } |
| 342 | #endif |
| 343 | } |
| 344 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 345 | void helper_wrpil(CPUSPARCState *env, target_ulong new_pil) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 346 | { |
| 347 | #if !defined(CONFIG_USER_ONLY) |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 348 | trace_win_helper_wrpil(env->psrpil, (uint32_t)new_pil); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 349 | |
| 350 | env->psrpil = new_pil; |
| 351 | |
| 352 | if (cpu_interrupts_enabled(env)) { |
| 353 | cpu_check_irqs(env); |
| 354 | } |
| 355 | #endif |
| 356 | } |
| 357 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 358 | void helper_done(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 359 | { |
| 360 | trap_state *tsptr = cpu_tsptr(env); |
| 361 | |
| 362 | env->pc = tsptr->tnpc; |
| 363 | env->npc = tsptr->tnpc + 4; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 364 | cpu_put_ccr(env, tsptr->tstate >> 32); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 365 | env->asi = (tsptr->tstate >> 24) & 0xff; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 366 | cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f); |
| 367 | cpu_put_cwp64(env, tsptr->tstate & 0xff); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 368 | env->tl--; |
| 369 | |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 370 | trace_win_helper_done(env->tl); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 371 | |
| 372 | #if !defined(CONFIG_USER_ONLY) |
| 373 | if (cpu_interrupts_enabled(env)) { |
| 374 | cpu_check_irqs(env); |
| 375 | } |
| 376 | #endif |
| 377 | } |
| 378 | |
Andreas Färber | c5f9864 | 2012-03-14 01:38:22 +0100 | [diff] [blame] | 379 | void helper_retry(CPUSPARCState *env) |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 380 | { |
| 381 | trap_state *tsptr = cpu_tsptr(env); |
| 382 | |
| 383 | env->pc = tsptr->tpc; |
| 384 | env->npc = tsptr->tnpc; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 385 | cpu_put_ccr(env, tsptr->tstate >> 32); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 386 | env->asi = (tsptr->tstate >> 24) & 0xff; |
Blue Swirl | 063c367 | 2011-07-03 21:01:59 +0000 | [diff] [blame] | 387 | cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f); |
| 388 | cpu_put_cwp64(env, tsptr->tstate & 0xff); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 389 | env->tl--; |
| 390 | |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 391 | trace_win_helper_retry(env->tl); |
Blue Swirl | 070af38 | 2011-08-01 09:03:20 +0000 | [diff] [blame] | 392 | |
| 393 | #if !defined(CONFIG_USER_ONLY) |
| 394 | if (cpu_interrupts_enabled(env)) { |
| 395 | cpu_check_irqs(env); |
| 396 | } |
| 397 | #endif |
| 398 | } |
| 399 | #endif |