blob: 46232788c8fb35d28fe3645f76e9d342798acde8 [file] [log] [blame]
bellarde8af50a2004-09-30 21:55:55 +00001/*
Blue Swirl163fa5c2011-09-11 11:30:01 +00002 * Misc Sparc helpers
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard83469012005-07-23 14:27:54 +00004 * Copyright (c) 2003-2005 Fabrice Bellard
bellarde8af50a2004-09-30 21:55:55 +00005 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellarde8af50a2004-09-30 21:55:55 +000018 */
bellardee5bbe32005-07-04 22:18:23 +000019
Peter Maydelldb5ebe52016-01-26 18:16:59 +000020#include "qemu/osdep.h"
bellardee5bbe32005-07-04 22:18:23 +000021#include "cpu.h"
Paolo Bonzini63c91552016-03-15 13:18:37 +010022#include "exec/exec-all.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010023#include "qemu/host-utils.h"
Richard Henderson2ef61752014-04-07 22:31:41 -070024#include "exec/helper-proto.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010025#include "sysemu/sysemu.h"
bellarde8af50a2004-09-30 21:55:55 +000026
Richard Henderson2f9d35f2016-07-12 13:12:50 -070027void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra)
28{
29 CPUState *cs = CPU(sparc_env_get_cpu(env));
30
31 cs->exception_index = tt;
32 cpu_loop_exit_restore(cs, ra);
33}
34
Andreas Färberc5f98642012-03-14 01:38:22 +010035void helper_raise_exception(CPUSPARCState *env, int tt)
Blue Swirlbc265312011-07-03 08:19:42 +000036{
Andreas Färber27103422013-08-26 08:31:06 +020037 CPUState *cs = CPU(sparc_env_get_cpu(env));
38
39 cs->exception_index = tt;
Andreas Färber5638d182013-08-27 17:52:12 +020040 cpu_loop_exit(cs);
Blue Swirlbc265312011-07-03 08:19:42 +000041}
42
Andreas Färberc5f98642012-03-14 01:38:22 +010043void helper_debug(CPUSPARCState *env)
Blue Swirlbc265312011-07-03 08:19:42 +000044{
Andreas Färber27103422013-08-26 08:31:06 +020045 CPUState *cs = CPU(sparc_env_get_cpu(env));
46
47 cs->exception_index = EXCP_DEBUG;
Andreas Färber5638d182013-08-27 17:52:12 +020048 cpu_loop_exit(cs);
Blue Swirlbc265312011-07-03 08:19:42 +000049}
50
Blue Swirl2336c1f2011-07-03 07:05:50 +000051#ifdef TARGET_SPARC64
Blue Swirl2336c1f2011-07-03 07:05:50 +000052void helper_tick_set_count(void *opaque, uint64_t count)
53{
54#if !defined(CONFIG_USER_ONLY)
55 cpu_tick_set_count(opaque, count);
56#endif
57}
58
Mark Cave-Aylandc9a46442015-11-08 17:11:59 +000059uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
Blue Swirl2336c1f2011-07-03 07:05:50 +000060{
61#if !defined(CONFIG_USER_ONLY)
Mark Cave-Aylandc9a46442015-11-08 17:11:59 +000062 CPUTimer *timer = opaque;
63
64 if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
Richard Henderson2f9d35f2016-07-12 13:12:50 -070065 cpu_raise_exception_ra(env, TT_PRIV_INSN, GETPC());
Mark Cave-Aylandc9a46442015-11-08 17:11:59 +000066 }
67
68 return cpu_tick_get_count(timer);
Blue Swirl2336c1f2011-07-03 07:05:50 +000069#else
Laurent Vivierb8e13ba2018-05-28 21:48:12 +020070 /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
71 Just pass through the host cpu clock ticks. */
72 return cpu_get_host_ticks();
Blue Swirl2336c1f2011-07-03 07:05:50 +000073#endif
74}
75
76void helper_tick_set_limit(void *opaque, uint64_t limit)
77{
78#if !defined(CONFIG_USER_ONLY)
79 cpu_tick_set_limit(opaque, limit);
80#endif
81}
82#endif
Blue Swirl7a5e4482011-07-04 18:15:42 +000083
Richard Henderson2f9d35f2016-07-12 13:12:50 -070084static target_ulong do_udiv(CPUSPARCState *env, target_ulong a,
85 target_ulong b, int cc, uintptr_t ra)
Blue Swirl7a5e4482011-07-04 18:15:42 +000086{
Blue Swirl7a5e4482011-07-04 18:15:42 +000087 int overflow = 0;
88 uint64_t x0;
89 uint32_t x1;
90
91 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
92 x1 = (b & 0xffffffff);
93
94 if (x1 == 0) {
Richard Henderson2f9d35f2016-07-12 13:12:50 -070095 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
Blue Swirl7a5e4482011-07-04 18:15:42 +000096 }
97
98 x0 = x0 / x1;
Olivier Danet6a5b69a2014-03-21 02:25:19 +010099 if (x0 > UINT32_MAX) {
100 x0 = UINT32_MAX;
Blue Swirl7a5e4482011-07-04 18:15:42 +0000101 overflow = 1;
102 }
103
104 if (cc) {
105 env->cc_dst = x0;
106 env->cc_src2 = overflow;
107 env->cc_op = CC_OP_DIV;
108 }
109 return x0;
110}
111
Andreas Färberc5f98642012-03-14 01:38:22 +0100112target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
Blue Swirl7a5e4482011-07-04 18:15:42 +0000113{
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700114 return do_udiv(env, a, b, 0, GETPC());
Blue Swirl7a5e4482011-07-04 18:15:42 +0000115}
116
Andreas Färberc5f98642012-03-14 01:38:22 +0100117target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
Blue Swirl7a5e4482011-07-04 18:15:42 +0000118{
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700119 return do_udiv(env, a, b, 1, GETPC());
Blue Swirl7a5e4482011-07-04 18:15:42 +0000120}
121
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700122static target_ulong do_sdiv(CPUSPARCState *env, target_ulong a,
123 target_ulong b, int cc, uintptr_t ra)
Blue Swirl7a5e4482011-07-04 18:15:42 +0000124{
Blue Swirl7a5e4482011-07-04 18:15:42 +0000125 int overflow = 0;
126 int64_t x0;
127 int32_t x1;
128
129 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
130 x1 = (b & 0xffffffff);
131
132 if (x1 == 0) {
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700133 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
Olivier Danet6a5b69a2014-03-21 02:25:19 +0100134 } else if (x1 == -1 && x0 == INT64_MIN) {
135 x0 = INT32_MAX;
Blue Swirl7a5e4482011-07-04 18:15:42 +0000136 overflow = 1;
Olivier Danet6a5b69a2014-03-21 02:25:19 +0100137 } else {
138 x0 = x0 / x1;
139 if ((int32_t) x0 != x0) {
140 x0 = x0 < 0 ? INT32_MIN : INT32_MAX;
141 overflow = 1;
142 }
Blue Swirl7a5e4482011-07-04 18:15:42 +0000143 }
144
145 if (cc) {
146 env->cc_dst = x0;
147 env->cc_src2 = overflow;
148 env->cc_op = CC_OP_DIV;
149 }
150 return x0;
151}
152
Andreas Färberc5f98642012-03-14 01:38:22 +0100153target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
Blue Swirl7a5e4482011-07-04 18:15:42 +0000154{
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700155 return do_sdiv(env, a, b, 0, GETPC());
Blue Swirl7a5e4482011-07-04 18:15:42 +0000156}
157
Andreas Färberc5f98642012-03-14 01:38:22 +0100158target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
Blue Swirl7a5e4482011-07-04 18:15:42 +0000159{
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700160 return do_sdiv(env, a, b, 1, GETPC());
Blue Swirl7a5e4482011-07-04 18:15:42 +0000161}
Richard Hendersonc28ae412012-10-05 16:55:03 -0700162
163#ifdef TARGET_SPARC64
164int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
165{
166 if (b == 0) {
167 /* Raise divide by zero trap. */
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700168 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
Richard Hendersonc28ae412012-10-05 16:55:03 -0700169 } else if (b == -1) {
170 /* Avoid overflow trap with i386 divide insn. */
171 return -a;
172 } else {
173 return a / b;
174 }
175}
176
177uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
178{
179 if (b == 0) {
180 /* Raise divide by zero trap. */
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700181 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
Richard Hendersonc28ae412012-10-05 16:55:03 -0700182 }
183 return a / b;
184}
185#endif
Richard Hendersona2ea4aa2012-10-05 16:55:05 -0700186
187target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
188 target_ulong src2)
189{
Richard Hendersona2ea4aa2012-10-05 16:55:05 -0700190 target_ulong dst;
191
192 /* Tag overflow occurs if either input has bits 0 or 1 set. */
193 if ((src1 | src2) & 3) {
194 goto tag_overflow;
195 }
196
197 dst = src1 + src2;
198
199 /* Tag overflow occurs if the addition overflows. */
200 if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
201 goto tag_overflow;
202 }
203
204 /* Only modify the CC after any exceptions have been generated. */
205 env->cc_op = CC_OP_TADDTV;
206 env->cc_src = src1;
207 env->cc_src2 = src2;
208 env->cc_dst = dst;
209 return dst;
210
211 tag_overflow:
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700212 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
Richard Hendersona2ea4aa2012-10-05 16:55:05 -0700213}
214
215target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
216 target_ulong src2)
217{
Richard Hendersona2ea4aa2012-10-05 16:55:05 -0700218 target_ulong dst;
219
220 /* Tag overflow occurs if either input has bits 0 or 1 set. */
221 if ((src1 | src2) & 3) {
222 goto tag_overflow;
223 }
224
225 dst = src1 - src2;
226
227 /* Tag overflow occurs if the subtraction overflows. */
228 if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
229 goto tag_overflow;
230 }
231
232 /* Only modify the CC after any exceptions have been generated. */
233 env->cc_op = CC_OP_TSUBTV;
234 env->cc_src = src1;
235 env->cc_src2 = src2;
236 env->cc_dst = dst;
237 return dst;
238
239 tag_overflow:
Richard Henderson2f9d35f2016-07-12 13:12:50 -0700240 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
Richard Hendersona2ea4aa2012-10-05 16:55:05 -0700241}
Ronald Hechtd1c36ba2013-02-19 12:45:07 +0100242
243#ifndef TARGET_SPARC64
244void helper_power_down(CPUSPARCState *env)
245{
Andreas Färber259186a2013-01-17 18:51:17 +0100246 CPUState *cs = CPU(sparc_env_get_cpu(env));
247
248 cs->halted = 1;
Andreas Färber27103422013-08-26 08:31:06 +0200249 cs->exception_index = EXCP_HLT;
Ronald Hechtd1c36ba2013-02-19 12:45:07 +0100250 env->pc = env->npc;
251 env->npc = env->pc + 4;
Andreas Färber5638d182013-08-27 17:52:12 +0200252 cpu_loop_exit(cs);
Ronald Hechtd1c36ba2013-02-19 12:45:07 +0100253}
254#endif