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Markus Armbruster121d0712016-06-29 10:12:57 +02001#ifndef QEMU_HW_MILKYMIST_HW_H
2#define QEMU_HW_MILKYMIST_HW_H
Michael Walle38d33392011-03-07 23:32:43 +01003
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +01004#include "hw/qdev.h"
Paolo Bonzini1422e322012-10-24 08:43:34 +02005#include "net/net.h"
Michael Walle57aa2652011-04-13 00:29:36 +02006
Avi Kivitya8170e52012-10-23 12:30:10 +02007static inline DeviceState *milkymist_uart_create(hwaddr base,
xiaoqiang zhaoe269fbe2016-05-25 14:39:04 +08008 qemu_irq irq,
Marc-André Lureau0ec7b3e2016-12-07 16:20:22 +03009 Chardev *chr)
Michael Walle38d33392011-03-07 23:32:43 +010010{
11 DeviceState *dev;
12
13 dev = qdev_create(NULL, "milkymist-uart");
xiaoqiang zhaoe269fbe2016-05-25 14:39:04 +080014 qdev_prop_set_chr(dev, "chardev", chr);
Michael Walle38d33392011-03-07 23:32:43 +010015 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010016 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
17 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
Michael Walle38d33392011-03-07 23:32:43 +010018
19 return dev;
20}
21
Avi Kivitya8170e52012-10-23 12:30:10 +020022static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
Michael Walle38d33392011-03-07 23:32:43 +010023{
24 DeviceState *dev;
25
26 dev = qdev_create(NULL, "milkymist-hpdmc");
27 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010028 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Michael Walle38d33392011-03-07 23:32:43 +010029
30 return dev;
31}
32
Avi Kivitya8170e52012-10-23 12:30:10 +020033static inline DeviceState *milkymist_memcard_create(hwaddr base)
Michael Walle38d33392011-03-07 23:32:43 +010034{
35 DeviceState *dev;
36
37 dev = qdev_create(NULL, "milkymist-memcard");
38 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010039 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Michael Walle38d33392011-03-07 23:32:43 +010040
41 return dev;
42}
43
Avi Kivitya8170e52012-10-23 12:30:10 +020044static inline DeviceState *milkymist_vgafb_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +010045 uint32_t fb_offset, uint32_t fb_mask)
46{
47 DeviceState *dev;
48
49 dev = qdev_create(NULL, "milkymist-vgafb");
50 qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
51 qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
52 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010053 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Michael Walle38d33392011-03-07 23:32:43 +010054
55 return dev;
56}
57
Avi Kivitya8170e52012-10-23 12:30:10 +020058static inline DeviceState *milkymist_sysctl_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +010059 qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
60 uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
61 uint32_t gpio_strappings)
62{
63 DeviceState *dev;
64
65 dev = qdev_create(NULL, "milkymist-sysctl");
66 qdev_prop_set_uint32(dev, "frequency", freq_hz);
67 qdev_prop_set_uint32(dev, "systemid", system_id);
68 qdev_prop_set_uint32(dev, "capabilities", capabilities);
69 qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
70 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010071 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
72 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
73 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
74 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
Michael Walle38d33392011-03-07 23:32:43 +010075
76 return dev;
77}
78
Avi Kivitya8170e52012-10-23 12:30:10 +020079static inline DeviceState *milkymist_pfpu_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +010080 qemu_irq irq)
81{
82 DeviceState *dev;
83
84 dev = qdev_create(NULL, "milkymist-pfpu");
85 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +010086 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
87 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
Michael Walle38d33392011-03-07 23:32:43 +010088 return dev;
89}
90
Gerd Hoffmannda076ff2014-11-20 09:49:44 +010091#ifdef CONFIG_OPENGL
Michael Walle38d33392011-03-07 23:32:43 +010092#include <X11/Xlib.h>
OGAWA Hirofumifb719562015-10-27 02:45:48 +090093#include <epoxy/gl.h>
94#include <epoxy/glx.h>
Michael Walle38d33392011-03-07 23:32:43 +010095static const int glx_fbconfig_attr[] = {
96 GLX_GREEN_SIZE, 5,
97 GLX_GREEN_SIZE, 6,
98 GLX_BLUE_SIZE, 5,
99 None
100};
101#endif
102
Avi Kivitya8170e52012-10-23 12:30:10 +0200103static inline DeviceState *milkymist_tmu2_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +0100104 qemu_irq irq)
105{
Gerd Hoffmannda076ff2014-11-20 09:49:44 +0100106#ifdef CONFIG_OPENGL
Michael Walle38d33392011-03-07 23:32:43 +0100107 DeviceState *dev;
108 Display *d;
109 GLXFBConfig *configs;
110 int nelements;
111 int ver_major, ver_minor;
112
Michael Walle38d33392011-03-07 23:32:43 +0100113 /* check that GLX will work */
114 d = XOpenDisplay(NULL);
115 if (d == NULL) {
116 return NULL;
117 }
118
119 if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
120 /* Yeah, sometimes getting the GLX version can fail.
121 * Isn't X beautiful? */
122 XCloseDisplay(d);
123 return NULL;
124 }
125
126 if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
127 printf("Your GLX version is %d.%d,"
128 "but TMU emulation needs at least 1.3. TMU disabled.\n",
129 ver_major, ver_minor);
130 XCloseDisplay(d);
131 return NULL;
132 }
133
134 configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
135 if (configs == NULL) {
136 XCloseDisplay(d);
137 return NULL;
138 }
139
140 XFree(configs);
141 XCloseDisplay(d);
142
143 dev = qdev_create(NULL, "milkymist-tmu2");
144 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +0100145 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
146 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
Michael Walle38d33392011-03-07 23:32:43 +0100147
148 return dev;
149#else
150 return NULL;
151#endif
152}
153
Avi Kivitya8170e52012-10-23 12:30:10 +0200154static inline DeviceState *milkymist_ac97_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +0100155 qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
156 qemu_irq dmaw_irq)
157{
158 DeviceState *dev;
159
160 dev = qdev_create(NULL, "milkymist-ac97");
161 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +0100162 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
163 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
164 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
165 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
166 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
Michael Walle38d33392011-03-07 23:32:43 +0100167
168 return dev;
169}
170
Avi Kivitya8170e52012-10-23 12:30:10 +0200171static inline DeviceState *milkymist_minimac2_create(hwaddr base,
172 hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
Michael Walle57aa2652011-04-13 00:29:36 +0200173{
174 DeviceState *dev;
175
176 qemu_check_nic_model(&nd_table[0], "minimac2");
177 dev = qdev_create(NULL, "milkymist-minimac2");
Michael Walle57aa2652011-04-13 00:29:36 +0200178 qdev_set_nic_properties(dev, &nd_table[0]);
179 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +0100180 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Peter Maydell20cf8502013-03-15 14:34:21 +0000181 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
Andreas Färber1356b982013-01-20 02:47:33 +0100182 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
183 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
Michael Walle57aa2652011-04-13 00:29:36 +0200184
185 return dev;
186}
187
Avi Kivitya8170e52012-10-23 12:30:10 +0200188static inline DeviceState *milkymist_softusb_create(hwaddr base,
Michael Walle38d33392011-03-07 23:32:43 +0100189 qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
190 uint32_t dmem_base, uint32_t dmem_size)
191{
192 DeviceState *dev;
193
194 dev = qdev_create(NULL, "milkymist-softusb");
Michael Walle38d33392011-03-07 23:32:43 +0100195 qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
Michael Walle38d33392011-03-07 23:32:43 +0100196 qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
197 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +0100198 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Peter Maydellc34e1202013-03-15 14:34:22 +0000199 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
200 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
Andreas Färber1356b982013-01-20 02:47:33 +0100201 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
Michael Walle38d33392011-03-07 23:32:43 +0100202
203 return dev;
204}
205
Markus Armbruster121d0712016-06-29 10:12:57 +0200206#endif /* QEMU_HW_MILKYMIST_HW_H */