| Peter Maydell | 6a66942 | 2013-12-17 19:42:32 +0000 | [diff] [blame] | 1 | <?xml version="1.0"?> |
| 2 | <!-- Copyright (C) 2009-2012 Free Software Foundation, Inc. |
| 3 | Contributed by ARM Ltd. |
| 4 | |
| 5 | Copying and distribution of this file, with or without modification, |
| 6 | are permitted in any medium without royalty provided the copyright |
| 7 | notice and this notice are preserved. --> |
| 8 | |
| 9 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> |
| 10 | <feature name="org.gnu.gdb.aarch64.fpu"> |
| 11 | <vector id="v2d" type="ieee_double" count="2"/> |
| 12 | <vector id="v2u" type="uint64" count="2"/> |
| 13 | <vector id="v2i" type="int64" count="2"/> |
| 14 | <vector id="v4f" type="ieee_single" count="4"/> |
| 15 | <vector id="v4u" type="uint32" count="4"/> |
| 16 | <vector id="v4i" type="int32" count="4"/> |
| 17 | <vector id="v8u" type="uint16" count="8"/> |
| 18 | <vector id="v8i" type="int16" count="8"/> |
| 19 | <vector id="v16u" type="uint8" count="16"/> |
| 20 | <vector id="v16i" type="int8" count="16"/> |
| 21 | <vector id="v1u" type="uint128" count="1"/> |
| 22 | <vector id="v1i" type="int128" count="1"/> |
| 23 | <union id="vnd"> |
| 24 | <field name="f" type="v2d"/> |
| 25 | <field name="u" type="v2u"/> |
| 26 | <field name="s" type="v2i"/> |
| 27 | </union> |
| 28 | <union id="vns"> |
| 29 | <field name="f" type="v4f"/> |
| 30 | <field name="u" type="v4u"/> |
| 31 | <field name="s" type="v4i"/> |
| 32 | </union> |
| 33 | <union id="vnh"> |
| 34 | <field name="u" type="v8u"/> |
| 35 | <field name="s" type="v8i"/> |
| 36 | </union> |
| 37 | <union id="vnb"> |
| 38 | <field name="u" type="v16u"/> |
| 39 | <field name="s" type="v16i"/> |
| 40 | </union> |
| 41 | <union id="vnq"> |
| 42 | <field name="u" type="v1u"/> |
| 43 | <field name="s" type="v1i"/> |
| 44 | </union> |
| 45 | <union id="aarch64v"> |
| 46 | <field name="d" type="vnd"/> |
| 47 | <field name="s" type="vns"/> |
| 48 | <field name="h" type="vnh"/> |
| 49 | <field name="b" type="vnb"/> |
| 50 | <field name="q" type="vnq"/> |
| 51 | </union> |
| 52 | <reg name="v0" bitsize="128" type="aarch64v" regnum="34"/> |
| 53 | <reg name="v1" bitsize="128" type="aarch64v" /> |
| 54 | <reg name="v2" bitsize="128" type="aarch64v" /> |
| 55 | <reg name="v3" bitsize="128" type="aarch64v" /> |
| 56 | <reg name="v4" bitsize="128" type="aarch64v" /> |
| 57 | <reg name="v5" bitsize="128" type="aarch64v" /> |
| 58 | <reg name="v6" bitsize="128" type="aarch64v" /> |
| 59 | <reg name="v7" bitsize="128" type="aarch64v" /> |
| 60 | <reg name="v8" bitsize="128" type="aarch64v" /> |
| 61 | <reg name="v9" bitsize="128" type="aarch64v" /> |
| 62 | <reg name="v10" bitsize="128" type="aarch64v"/> |
| 63 | <reg name="v11" bitsize="128" type="aarch64v"/> |
| 64 | <reg name="v12" bitsize="128" type="aarch64v"/> |
| 65 | <reg name="v13" bitsize="128" type="aarch64v"/> |
| 66 | <reg name="v14" bitsize="128" type="aarch64v"/> |
| 67 | <reg name="v15" bitsize="128" type="aarch64v"/> |
| 68 | <reg name="v16" bitsize="128" type="aarch64v"/> |
| 69 | <reg name="v17" bitsize="128" type="aarch64v"/> |
| 70 | <reg name="v18" bitsize="128" type="aarch64v"/> |
| 71 | <reg name="v19" bitsize="128" type="aarch64v"/> |
| 72 | <reg name="v20" bitsize="128" type="aarch64v"/> |
| 73 | <reg name="v21" bitsize="128" type="aarch64v"/> |
| 74 | <reg name="v22" bitsize="128" type="aarch64v"/> |
| 75 | <reg name="v23" bitsize="128" type="aarch64v"/> |
| 76 | <reg name="v24" bitsize="128" type="aarch64v"/> |
| 77 | <reg name="v25" bitsize="128" type="aarch64v"/> |
| 78 | <reg name="v26" bitsize="128" type="aarch64v"/> |
| 79 | <reg name="v27" bitsize="128" type="aarch64v"/> |
| 80 | <reg name="v28" bitsize="128" type="aarch64v"/> |
| 81 | <reg name="v29" bitsize="128" type="aarch64v"/> |
| 82 | <reg name="v30" bitsize="128" type="aarch64v"/> |
| 83 | <reg name="v31" bitsize="128" type="aarch64v"/> |
| 84 | <reg name="fpsr" bitsize="32"/> |
| 85 | <reg name="fpcr" bitsize="32"/> |
| 86 | </feature> |
