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bellardb92e5a22003-08-08 23:58:05 +00001/*
2 * Software MMU support
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardb92e5a22003-08-08 23:58:05 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellardb92e5a22003-08-08 23:58:05 +000018 */
19#if DATA_SIZE == 8
20#define SUFFIX q
bellard61382a52003-10-27 21:22:23 +000021#define USUFFIX q
bellardb92e5a22003-08-08 23:58:05 +000022#define DATA_TYPE uint64_t
23#elif DATA_SIZE == 4
24#define SUFFIX l
bellard61382a52003-10-27 21:22:23 +000025#define USUFFIX l
bellardb92e5a22003-08-08 23:58:05 +000026#define DATA_TYPE uint32_t
27#elif DATA_SIZE == 2
28#define SUFFIX w
bellard61382a52003-10-27 21:22:23 +000029#define USUFFIX uw
bellardb92e5a22003-08-08 23:58:05 +000030#define DATA_TYPE uint16_t
31#define DATA_STYPE int16_t
32#elif DATA_SIZE == 1
33#define SUFFIX b
bellard61382a52003-10-27 21:22:23 +000034#define USUFFIX ub
bellardb92e5a22003-08-08 23:58:05 +000035#define DATA_TYPE uint8_t
36#define DATA_STYPE int8_t
37#else
38#error unsupported data size
39#endif
40
j_mayer6ebbf392007-10-14 07:07:08 +000041#if ACCESS_TYPE < (NB_MMU_MODES)
bellard61382a52003-10-27 21:22:23 +000042
j_mayer6ebbf392007-10-14 07:07:08 +000043#define CPU_MMU_INDEX ACCESS_TYPE
bellard61382a52003-10-27 21:22:23 +000044#define MMUSUFFIX _mmu
45
j_mayer6ebbf392007-10-14 07:07:08 +000046#elif ACCESS_TYPE == (NB_MMU_MODES)
bellard61382a52003-10-27 21:22:23 +000047
j_mayer6ebbf392007-10-14 07:07:08 +000048#define CPU_MMU_INDEX (cpu_mmu_index(env))
bellard61382a52003-10-27 21:22:23 +000049#define MMUSUFFIX _mmu
50
j_mayer6ebbf392007-10-14 07:07:08 +000051#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
bellard61382a52003-10-27 21:22:23 +000052
j_mayer6ebbf392007-10-14 07:07:08 +000053#define CPU_MMU_INDEX (cpu_mmu_index(env))
bellard61382a52003-10-27 21:22:23 +000054#define MMUSUFFIX _cmmu
55
bellardb92e5a22003-08-08 23:58:05 +000056#else
bellard61382a52003-10-27 21:22:23 +000057#error invalid ACCESS_TYPE
bellardb92e5a22003-08-08 23:58:05 +000058#endif
59
60#if DATA_SIZE == 8
61#define RES_TYPE uint64_t
62#else
Igor V. Kovalenkoc086b782010-06-02 00:12:32 +040063#define RES_TYPE uint32_t
bellardb92e5a22003-08-08 23:58:05 +000064#endif
65
j_mayer6ebbf392007-10-14 07:07:08 +000066#if ACCESS_TYPE == (NB_MMU_MODES + 1)
bellard84b7b8e2005-11-28 21:19:04 +000067#define ADDR_READ addr_code
68#else
69#define ADDR_READ addr_read
70#endif
bellardb92e5a22003-08-08 23:58:05 +000071
bellarde16c53f2004-01-04 18:15:29 +000072/* generic load/store macros */
73
bellardc27004e2005-01-03 23:35:10 +000074static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
bellardb92e5a22003-08-08 23:58:05 +000075{
blueswir14d7a0882008-05-10 10:14:22 +000076 int page_index;
bellardb92e5a22003-08-08 23:58:05 +000077 RES_TYPE res;
bellardc27004e2005-01-03 23:35:10 +000078 target_ulong addr;
79 unsigned long physaddr;
j_mayer6ebbf392007-10-14 07:07:08 +000080 int mmu_idx;
bellard61382a52003-10-27 21:22:23 +000081
bellardc27004e2005-01-03 23:35:10 +000082 addr = ptr;
blueswir14d7a0882008-05-10 10:14:22 +000083 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
j_mayer6ebbf392007-10-14 07:07:08 +000084 mmu_idx = CPU_MMU_INDEX;
ths551bd272008-07-03 17:57:36 +000085 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
86 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
j_mayer6ebbf392007-10-14 07:07:08 +000087 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
bellardb92e5a22003-08-08 23:58:05 +000088 } else {
blueswir14d7a0882008-05-10 10:14:22 +000089 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
bellard61382a52003-10-27 21:22:23 +000090 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
bellardb92e5a22003-08-08 23:58:05 +000091 }
92 return res;
93}
94
95#if DATA_SIZE <= 2
bellardc27004e2005-01-03 23:35:10 +000096static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
bellardb92e5a22003-08-08 23:58:05 +000097{
blueswir14d7a0882008-05-10 10:14:22 +000098 int res, page_index;
bellardc27004e2005-01-03 23:35:10 +000099 target_ulong addr;
100 unsigned long physaddr;
j_mayer6ebbf392007-10-14 07:07:08 +0000101 int mmu_idx;
bellard61382a52003-10-27 21:22:23 +0000102
bellardc27004e2005-01-03 23:35:10 +0000103 addr = ptr;
blueswir14d7a0882008-05-10 10:14:22 +0000104 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
j_mayer6ebbf392007-10-14 07:07:08 +0000105 mmu_idx = CPU_MMU_INDEX;
ths551bd272008-07-03 17:57:36 +0000106 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
107 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
j_mayer6ebbf392007-10-14 07:07:08 +0000108 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
bellardb92e5a22003-08-08 23:58:05 +0000109 } else {
blueswir14d7a0882008-05-10 10:14:22 +0000110 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
bellardb92e5a22003-08-08 23:58:05 +0000111 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
112 }
113 return res;
114}
115#endif
116
j_mayer6ebbf392007-10-14 07:07:08 +0000117#if ACCESS_TYPE != (NB_MMU_MODES + 1)
bellard84b7b8e2005-11-28 21:19:04 +0000118
bellarde16c53f2004-01-04 18:15:29 +0000119/* generic store macro */
120
bellardc27004e2005-01-03 23:35:10 +0000121static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
bellardb92e5a22003-08-08 23:58:05 +0000122{
blueswir14d7a0882008-05-10 10:14:22 +0000123 int page_index;
bellardc27004e2005-01-03 23:35:10 +0000124 target_ulong addr;
125 unsigned long physaddr;
j_mayer6ebbf392007-10-14 07:07:08 +0000126 int mmu_idx;
bellard61382a52003-10-27 21:22:23 +0000127
bellardc27004e2005-01-03 23:35:10 +0000128 addr = ptr;
blueswir14d7a0882008-05-10 10:14:22 +0000129 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
j_mayer6ebbf392007-10-14 07:07:08 +0000130 mmu_idx = CPU_MMU_INDEX;
ths551bd272008-07-03 17:57:36 +0000131 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
132 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
j_mayer6ebbf392007-10-14 07:07:08 +0000133 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
bellardb92e5a22003-08-08 23:58:05 +0000134 } else {
blueswir14d7a0882008-05-10 10:14:22 +0000135 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
bellardb92e5a22003-08-08 23:58:05 +0000136 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
137 }
138}
139
j_mayer6ebbf392007-10-14 07:07:08 +0000140#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
bellard84b7b8e2005-11-28 21:19:04 +0000141
j_mayer6ebbf392007-10-14 07:07:08 +0000142#if ACCESS_TYPE != (NB_MMU_MODES + 1)
bellarde16c53f2004-01-04 18:15:29 +0000143
bellard2d603d22004-01-04 23:56:24 +0000144#if DATA_SIZE == 8
bellard3f87bf62005-11-06 19:56:23 +0000145static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
bellard2d603d22004-01-04 23:56:24 +0000146{
147 union {
bellard3f87bf62005-11-06 19:56:23 +0000148 float64 d;
bellard2d603d22004-01-04 23:56:24 +0000149 uint64_t i;
150 } u;
151 u.i = glue(ldq, MEMSUFFIX)(ptr);
152 return u.d;
153}
154
bellard3f87bf62005-11-06 19:56:23 +0000155static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
bellard2d603d22004-01-04 23:56:24 +0000156{
157 union {
bellard3f87bf62005-11-06 19:56:23 +0000158 float64 d;
bellard2d603d22004-01-04 23:56:24 +0000159 uint64_t i;
160 } u;
161 u.d = v;
162 glue(stq, MEMSUFFIX)(ptr, u.i);
163}
164#endif /* DATA_SIZE == 8 */
165
166#if DATA_SIZE == 4
bellard3f87bf62005-11-06 19:56:23 +0000167static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
bellard2d603d22004-01-04 23:56:24 +0000168{
169 union {
bellard3f87bf62005-11-06 19:56:23 +0000170 float32 f;
bellard2d603d22004-01-04 23:56:24 +0000171 uint32_t i;
172 } u;
173 u.i = glue(ldl, MEMSUFFIX)(ptr);
174 return u.f;
175}
176
bellard3f87bf62005-11-06 19:56:23 +0000177static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
bellard2d603d22004-01-04 23:56:24 +0000178{
179 union {
bellard3f87bf62005-11-06 19:56:23 +0000180 float32 f;
bellard2d603d22004-01-04 23:56:24 +0000181 uint32_t i;
182 } u;
183 u.f = v;
184 glue(stl, MEMSUFFIX)(ptr, u.i);
185}
186#endif /* DATA_SIZE == 4 */
187
j_mayer6ebbf392007-10-14 07:07:08 +0000188#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
bellard84b7b8e2005-11-28 21:19:04 +0000189
bellardb92e5a22003-08-08 23:58:05 +0000190#undef RES_TYPE
191#undef DATA_TYPE
192#undef DATA_STYPE
193#undef SUFFIX
bellard61382a52003-10-27 21:22:23 +0000194#undef USUFFIX
bellardb92e5a22003-08-08 23:58:05 +0000195#undef DATA_SIZE
j_mayer6ebbf392007-10-14 07:07:08 +0000196#undef CPU_MMU_INDEX
bellard61382a52003-10-27 21:22:23 +0000197#undef MMUSUFFIX
bellard84b7b8e2005-11-28 21:19:04 +0000198#undef ADDR_READ