aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU NVRAM emulation for DS1225Y chip |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 3 | * |
Stefan Weil | bcc4e41 | 2011-12-02 10:30:41 +0100 | [diff] [blame] | 4 | * Copyright (c) 2007-2008 Hervé Poussineau |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 5 | * |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
Peter Maydell | 0430891 | 2016-01-26 18:17:30 +0000 | [diff] [blame] | 25 | #include "qemu/osdep.h" |
Markus Armbruster | a27bd6c | 2019-08-12 07:23:51 +0200 | [diff] [blame] | 26 | #include "hw/qdev-properties.h" |
Paolo Bonzini | 83c9f4c | 2013-02-04 15:40:22 +0100 | [diff] [blame] | 27 | #include "hw/sysbus.h" |
Markus Armbruster | d645427 | 2019-08-12 07:23:45 +0200 | [diff] [blame] | 28 | #include "migration/vmstate.h" |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 29 | #include "trace.h" |
Mao Zhongyi | 296097f | 2018-12-13 13:48:00 +0000 | [diff] [blame] | 30 | #include "qemu/error-report.h" |
Markus Armbruster | 0b8fa32 | 2019-05-23 16:35:07 +0200 | [diff] [blame] | 31 | #include "qemu/module.h" |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 32 | #include "qom/object.h" |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 33 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 34 | typedef struct { |
Avi Kivity | 871321a | 2011-11-10 11:24:24 +0200 | [diff] [blame] | 35 | MemoryRegion iomem; |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 36 | uint32_t chip_size; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 37 | char *filename; |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 38 | FILE *file; |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 39 | uint8_t *contents; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 40 | } NvRamState; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 41 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 42 | static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size) |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 43 | { |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 44 | NvRamState *s = opaque; |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 45 | uint32_t val; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 46 | |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 47 | val = s->contents[addr]; |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 48 | trace_nvram_read(addr, val); |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 49 | return val; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 52 | static void nvram_write(void *opaque, hwaddr addr, uint64_t val, |
Avi Kivity | 871321a | 2011-11-10 11:24:24 +0200 | [diff] [blame] | 53 | unsigned size) |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 54 | { |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 55 | NvRamState *s = opaque; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 56 | |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 57 | val &= 0xff; |
| 58 | trace_nvram_write(addr, s->contents[addr], val); |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 59 | |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 60 | s->contents[addr] = val; |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 61 | if (s->file) { |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 62 | fseek(s->file, addr, SEEK_SET); |
| 63 | fputc(val, s->file); |
| 64 | fflush(s->file); |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 65 | } |
| 66 | } |
| 67 | |
Avi Kivity | 871321a | 2011-11-10 11:24:24 +0200 | [diff] [blame] | 68 | static const MemoryRegionOps nvram_ops = { |
| 69 | .read = nvram_read, |
| 70 | .write = nvram_write, |
| 71 | .impl = { |
| 72 | .min_access_size = 1, |
| 73 | .max_access_size = 1, |
| 74 | }, |
| 75 | .endianness = DEVICE_LITTLE_ENDIAN, |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 76 | }; |
| 77 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 78 | static int nvram_post_load(void *opaque, int version_id) |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 79 | { |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 80 | NvRamState *s = opaque; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 81 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 82 | /* Close file, as filename may has changed in load/store process */ |
| 83 | if (s->file) { |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 84 | fclose(s->file); |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 85 | } |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 86 | |
| 87 | /* Write back nvram contents */ |
Marc-André Lureau | b743845 | 2018-01-04 17:05:22 +0100 | [diff] [blame] | 88 | s->file = s->filename ? fopen(s->filename, "wb") : NULL; |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 89 | if (s->file) { |
| 90 | /* Write back contents, as 'wb' mode cleaned the file */ |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 91 | if (fwrite(s->contents, s->chip_size, 1, s->file) != 1) { |
| 92 | printf("nvram_post_load: short write\n"); |
| 93 | } |
| 94 | fflush(s->file); |
aurel32 | 02cb158 | 2008-03-13 19:23:00 +0000 | [diff] [blame] | 95 | } |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 96 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 97 | return 0; |
aurel32 | 30aa5c0 | 2008-03-13 01:19:15 +0000 | [diff] [blame] | 98 | } |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 99 | |
| 100 | static const VMStateDescription vmstate_nvram = { |
| 101 | .name = "nvram", |
| 102 | .version_id = 0, |
| 103 | .minimum_version_id = 0, |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 104 | .post_load = nvram_post_load, |
| 105 | .fields = (VMStateField[]) { |
| 106 | VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0, |
| 107 | vmstate_info_uint8, uint8_t), |
| 108 | VMSTATE_END_OF_LIST() |
| 109 | } |
| 110 | }; |
| 111 | |
Andreas Färber | 8c1892c | 2013-07-27 12:50:29 +0200 | [diff] [blame] | 112 | #define TYPE_DS1225Y "ds1225y" |
Eduardo Habkost | 8063396 | 2020-09-16 14:25:19 -0400 | [diff] [blame] | 113 | OBJECT_DECLARE_SIMPLE_TYPE(SysBusNvRamState, DS1225Y) |
Andreas Färber | 8c1892c | 2013-07-27 12:50:29 +0200 | [diff] [blame] | 114 | |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 115 | struct SysBusNvRamState { |
Andreas Färber | 8c1892c | 2013-07-27 12:50:29 +0200 | [diff] [blame] | 116 | SysBusDevice parent_obj; |
| 117 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 118 | NvRamState nvram; |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 119 | }; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 120 | |
Mao Zhongyi | 296097f | 2018-12-13 13:48:00 +0000 | [diff] [blame] | 121 | static void nvram_sysbus_realize(DeviceState *dev, Error **errp) |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 122 | { |
Andreas Färber | 8c1892c | 2013-07-27 12:50:29 +0200 | [diff] [blame] | 123 | SysBusNvRamState *sys = DS1225Y(dev); |
| 124 | NvRamState *s = &sys->nvram; |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 125 | FILE *file; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 126 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 127 | s->contents = g_malloc0(s->chip_size); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 128 | |
Paolo Bonzini | eedfac6 | 2013-06-06 21:25:08 -0400 | [diff] [blame] | 129 | memory_region_init_io(&s->iomem, OBJECT(s), &nvram_ops, s, |
| 130 | "nvram", s->chip_size); |
Mao Zhongyi | 296097f | 2018-12-13 13:48:00 +0000 | [diff] [blame] | 131 | sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 132 | |
| 133 | /* Read current file */ |
Marc-André Lureau | b743845 | 2018-01-04 17:05:22 +0100 | [diff] [blame] | 134 | file = s->filename ? fopen(s->filename, "rb") : NULL; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 135 | if (file) { |
| 136 | /* Read nvram contents */ |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 137 | if (fread(s->contents, s->chip_size, 1, file) != 1) { |
Mao Zhongyi | 296097f | 2018-12-13 13:48:00 +0000 | [diff] [blame] | 138 | error_report("nvram_sysbus_realize: short read"); |
Juan Quintela | 3a23025 | 2011-09-13 14:41:18 +0200 | [diff] [blame] | 139 | } |
| 140 | fclose(file); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 141 | } |
| 142 | nvram_post_load(s, 0); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 143 | } |
| 144 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 145 | static Property nvram_sysbus_properties[] = { |
| 146 | DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000), |
| 147 | DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename), |
| 148 | DEFINE_PROP_END_OF_LIST(), |
| 149 | }; |
| 150 | |
| 151 | static void nvram_sysbus_class_init(ObjectClass *klass, void *data) |
| 152 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 153 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 154 | |
Mao Zhongyi | 296097f | 2018-12-13 13:48:00 +0000 | [diff] [blame] | 155 | dc->realize = nvram_sysbus_realize; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 156 | dc->vmsd = &vmstate_nvram; |
Marc-André Lureau | 4f67d30 | 2020-01-10 19:30:32 +0400 | [diff] [blame] | 157 | device_class_set_props(dc, nvram_sysbus_properties); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 158 | } |
| 159 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 160 | static const TypeInfo nvram_sysbus_info = { |
Andreas Färber | 8c1892c | 2013-07-27 12:50:29 +0200 | [diff] [blame] | 161 | .name = TYPE_DS1225Y, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 162 | .parent = TYPE_SYS_BUS_DEVICE, |
| 163 | .instance_size = sizeof(SysBusNvRamState), |
| 164 | .class_init = nvram_sysbus_class_init, |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 165 | }; |
| 166 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 167 | static void nvram_register_types(void) |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 168 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 169 | type_register_static(&nvram_sysbus_info); |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 170 | } |
| 171 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 172 | type_init(nvram_register_types) |