blob: b671e24b4ed174cbf08c7ea4997ea578b017bbba [file] [log] [blame]
bellard044ef8e2008-05-13 18:27:16 +00001Correctness issues:
2
bellardbd7a7b32008-05-21 17:07:20 +00003- some eflags manipulation incorrectly reset the bit 0x2.
bellard872929a2008-05-28 16:16:54 +00004- SVM: test, cpu save/restore, SMM save/restore.
bellard044ef8e2008-05-13 18:27:16 +00005- x86_64: lcall/ljmp intel/amd differences ?
bellard044ef8e2008-05-13 18:27:16 +00006- better code fetch (different exception handling + CS.limit support)
7- user/kernel PUSHL/POPL in helper.c
8- add missing cpuid tests
9- return UD exception if LOCK prefix incorrectly used
10- test ldt limit < 7 ?
11- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
12- full support of segment limit/rights
13- full x87 exception support
14- improve x87 bit exactness (use bochs code ?)
bellardb8b6a502008-05-15 16:46:30 +000015- DRx register support
16- CR0.AC emulation
17- SSE alignment checks
18- fix SSE min/max with nans
bellard044ef8e2008-05-13 18:27:16 +000019
20Optimizations/Features:
21
bellardb8b6a502008-05-15 16:46:30 +000022- add SVM nested paging support
23- add VMX support
24- add AVX support
25- add SSE5 support
bellard12e26b72008-05-22 10:13:38 +000026- fxsave/fxrstor AMD extensions
27- improve monitor/mwait support
bellard3bd7da92008-05-21 16:34:06 +000028- faster EFLAGS update: consider SZAP, C, O can be updated separately
29 with a bit field in CC_OP and more state variables.
bellard044ef8e2008-05-13 18:27:16 +000030- evaluate x87 stack pointer statically
31- find a way to avoid translating several time the same TB if CR0.TS
32 is set or not.
33- move kqemu support outside target-i386.