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Anthony Liguoric7f0f3b2012-03-28 15:42:02 +02001/*
2 * Test Server
3 *
4 * Copyright IBM, Corp. 2011
5 *
6 * Authors:
7 * Anthony Liguori <aliguori@us.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 *
12 */
13
Peter Maydelld38ea872016-01-29 17:50:05 +000014#include "qemu/osdep.h"
Markus Armbrusterda34e652016-03-14 09:01:28 +010015#include "qapi/error.h"
Paolo Bonzini33c11872016-03-15 16:58:45 +010016#include "qemu-common.h"
17#include "cpu.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010018#include "sysemu/qtest.h"
Paolo Bonzini20288342012-03-28 15:42:03 +020019#include "hw/qdev.h"
Marc-André Lureau4d43a602017-01-26 18:26:44 +040020#include "chardev/char-fe.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010021#include "exec/ioport.h"
22#include "exec/memory.h"
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020023#include "hw/irq.h"
Eduardo Habkost3a6ce512014-09-26 17:45:26 -030024#include "sysemu/accel.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010025#include "sysemu/sysemu.h"
26#include "sysemu/cpus.h"
Sebastian Tanase1ad95802014-07-25 11:56:28 +020027#include "qemu/config-file.h"
28#include "qemu/option.h"
29#include "qemu/error-report.h"
Laurent Vivieraa15f492016-09-13 14:52:43 +020030#include "qemu/cutils.h"
Laurent Viviereeddd592016-09-13 14:52:45 +020031#ifdef TARGET_PPC64
32#include "hw/ppc/spapr_rtas.h"
33#endif
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020034
35#define MAX_IRQ 256
36
liguangd5286af2013-01-24 13:03:27 +080037bool qtest_allowed;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020038
Paolo Bonzini20288342012-03-28 15:42:03 +020039static DeviceState *irq_intercept_dev;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020040static FILE *qtest_log_fp;
Marc-André Lureau32a6ebe2016-10-22 12:52:52 +030041static CharBackend qtest_chr;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020042static GString *inbuf;
43static int irq_levels[MAX_IRQ];
Anthony Liguori6e924662012-03-30 14:04:04 -050044static qemu_timeval start_time;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020045static bool qtest_opened;
46
Anthony Liguori6b7cff72012-03-30 12:53:54 -050047#define FMT_timeval "%ld.%06ld"
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020048
49/**
50 * QTest Protocol
51 *
52 * Line based protocol, request/response based. Server can send async messages
53 * so clients should always handle many async messages before the response
54 * comes in.
55 *
56 * Valid requests
57 *
Paolo Bonzini8156be52012-03-28 15:42:04 +020058 * Clock management:
59 *
Alex Blighbc72ad62013-08-21 16:03:08 +010060 * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
Paolo Bonzini8156be52012-03-28 15:42:04 +020061 * let you adjust the value of the clock (monotonically). All the commands
62 * return the current value of the clock in nanoseconds.
63 *
64 * > clock_step
65 * < OK VALUE
66 *
67 * Advance the clock to the next deadline. Useful when waiting for
68 * asynchronous events.
69 *
70 * > clock_step NS
71 * < OK VALUE
72 *
73 * Advance the clock by NS nanoseconds.
74 *
75 * > clock_set NS
76 * < OK VALUE
77 *
78 * Advance the clock to NS nanoseconds (do nothing if it's already past).
79 *
80 * PIO and memory access:
81 *
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +020082 * > outb ADDR VALUE
83 * < OK
84 *
85 * > outw ADDR VALUE
86 * < OK
87 *
88 * > outl ADDR VALUE
89 * < OK
90 *
91 * > inb ADDR
92 * < OK VALUE
93 *
94 * > inw ADDR
95 * < OK VALUE
96 *
97 * > inl ADDR
98 * < OK VALUE
99 *
Andreas Färber872536b2013-02-16 22:44:03 +0100100 * > writeb ADDR VALUE
101 * < OK
102 *
103 * > writew ADDR VALUE
104 * < OK
105 *
106 * > writel ADDR VALUE
107 * < OK
108 *
109 * > writeq ADDR VALUE
110 * < OK
111 *
112 * > readb ADDR
113 * < OK VALUE
114 *
115 * > readw ADDR
116 * < OK VALUE
117 *
118 * > readl ADDR
119 * < OK VALUE
120 *
121 * > readq ADDR
122 * < OK VALUE
123 *
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200124 * > read ADDR SIZE
125 * < OK DATA
126 *
127 * > write ADDR SIZE DATA
128 * < OK
129 *
John Snow7a6a7402015-05-22 14:13:44 -0400130 * > b64read ADDR SIZE
131 * < OK B64_DATA
132 *
133 * > b64write ADDR SIZE B64_DATA
134 * < OK
135 *
John Snow4d007962015-05-22 14:13:44 -0400136 * > memset ADDR SIZE VALUE
137 * < OK
138 *
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200139 * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
Peter Maydell5f31bbf2016-08-05 11:43:20 +0100140 * For 'memset' a zero size is permitted and does nothing.
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200141 *
142 * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
143 * than the expected size, the value will be zero filled at the end of the data
144 * sequence.
145 *
John Snow7a6a7402015-05-22 14:13:44 -0400146 * B64_DATA is an arbitrarily long base64 encoded string.
147 * If the sizes do not match, the data will be truncated.
148 *
Paolo Bonzini20288342012-03-28 15:42:03 +0200149 * IRQ management:
150 *
151 * > irq_intercept_in QOM-PATH
152 * < OK
153 *
154 * > irq_intercept_out QOM-PATH
155 * < OK
156 *
157 * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
158 * QOM-PATH. When the pin is triggered, one of the following async messages
159 * will be printed to the qtest stream:
160 *
161 * IRQ raise NUM
162 * IRQ lower NUM
163 *
164 * where NUM is an IRQ number. For the PC, interrupts can be intercepted
165 * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
166 * NUM=0 even though it is remapped to GSI 2).
Steffen Görtz9813dc62019-01-07 15:23:47 +0000167 *
168 * Setting interrupt level:
169 *
170 * > set_irq_in QOM-PATH NAME NUM LEVEL
171 * < OK
172 *
173 * where NAME is the name of the irq/gpio list, NUM is an IRQ number and
174 * LEVEL is an signed integer IRQ level.
175 *
176 * Forcibly set the given interrupt pin to the given level.
177 *
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200178 */
179
180static int hex2nib(char ch)
181{
182 if (ch >= '0' && ch <= '9') {
183 return ch - '0';
184 } else if (ch >= 'a' && ch <= 'f') {
185 return 10 + (ch - 'a');
186 } else if (ch >= 'A' && ch <= 'F') {
Sergey Fedorov2a802aa2014-05-27 16:15:20 +0400187 return 10 + (ch - 'A');
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200188 } else {
189 return -1;
190 }
191}
192
Anthony Liguori6e924662012-03-30 14:04:04 -0500193static void qtest_get_time(qemu_timeval *tv)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200194{
Anthony Liguori6e924662012-03-30 14:04:04 -0500195 qemu_gettimeofday(tv);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200196 tv->tv_sec -= start_time.tv_sec;
197 tv->tv_usec -= start_time.tv_usec;
198 if (tv->tv_usec < 0) {
199 tv->tv_usec += 1000000;
200 tv->tv_sec -= 1;
201 }
202}
203
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300204static void qtest_send_prefix(CharBackend *chr)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200205{
Anthony Liguori6e924662012-03-30 14:04:04 -0500206 qemu_timeval tv;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200207
208 if (!qtest_log_fp || !qtest_opened) {
209 return;
210 }
211
212 qtest_get_time(&tv);
213 fprintf(qtest_log_fp, "[S +" FMT_timeval "] ",
Richard Henderson35aa3fb2013-08-20 13:53:25 -0700214 (long) tv.tv_sec, (long) tv.tv_usec);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200215}
216
John Snow7a6a7402015-05-22 14:13:44 -0400217static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt, ...)
218{
219 va_list ap;
220
221 if (!qtest_log_fp || !qtest_opened) {
222 return;
223 }
224
225 qtest_send_prefix(NULL);
226
227 va_start(ap, fmt);
228 vfprintf(qtest_log_fp, fmt, ap);
229 va_end(ap);
230}
231
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300232static void do_qtest_send(CharBackend *chr, const char *str, size_t len)
John Snow332cc7e2015-05-22 14:13:43 -0400233{
234 qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
235 if (qtest_log_fp && qtest_opened) {
236 fprintf(qtest_log_fp, "%s", str);
237 }
238}
239
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300240static void qtest_send(CharBackend *chr, const char *str)
John Snow332cc7e2015-05-22 14:13:43 -0400241{
242 do_qtest_send(chr, str, strlen(str));
243}
244
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300245static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharBackend *chr,
John Snow332cc7e2015-05-22 14:13:43 -0400246 const char *fmt, ...)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200247{
248 va_list ap;
John Snow332cc7e2015-05-22 14:13:43 -0400249 gchar *buffer;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200250
251 va_start(ap, fmt);
John Snow332cc7e2015-05-22 14:13:43 -0400252 buffer = g_strdup_vprintf(fmt, ap);
253 qtest_send(chr, buffer);
Marc-André Lureaufc340592016-11-10 12:25:00 +0400254 g_free(buffer);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200255 va_end(ap);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200256}
257
Paolo Bonzini20288342012-03-28 15:42:03 +0200258static void qtest_irq_handler(void *opaque, int n, int level)
259{
Peter Crosthwaite60a79012014-09-25 22:21:31 -0700260 qemu_irq old_irq = *(qemu_irq *)opaque;
261 qemu_set_irq(old_irq, level);
Paolo Bonzini20288342012-03-28 15:42:03 +0200262
263 if (irq_levels[n] != level) {
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300264 CharBackend *chr = &qtest_chr;
Paolo Bonzini20288342012-03-28 15:42:03 +0200265 irq_levels[n] = level;
266 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400267 qtest_sendf(chr, "IRQ %s %d\n",
268 level ? "raise" : "lower", n);
Paolo Bonzini20288342012-03-28 15:42:03 +0200269 }
270}
271
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300272static void qtest_process_command(CharBackend *chr, gchar **words)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200273{
274 const gchar *command;
275
276 g_assert(words);
277
278 command = words[0];
279
280 if (qtest_log_fp) {
Anthony Liguori6e924662012-03-30 14:04:04 -0500281 qemu_timeval tv;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200282 int i;
283
284 qtest_get_time(&tv);
285 fprintf(qtest_log_fp, "[R +" FMT_timeval "]",
Richard Henderson35aa3fb2013-08-20 13:53:25 -0700286 (long) tv.tv_sec, (long) tv.tv_usec);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200287 for (i = 0; words[i]; i++) {
288 fprintf(qtest_log_fp, " %s", words[i]);
289 }
290 fprintf(qtest_log_fp, "\n");
291 }
292
293 g_assert(command);
Paolo Bonzini20288342012-03-28 15:42:03 +0200294 if (strcmp(words[0], "irq_intercept_out") == 0
295 || strcmp(words[0], "irq_intercept_in") == 0) {
Peter Crosthwaitea5f54292014-05-19 23:30:58 -0700296 DeviceState *dev;
297 NamedGPIOList *ngl;
Paolo Bonzini20288342012-03-28 15:42:03 +0200298
299 g_assert(words[1]);
300 dev = DEVICE(object_resolve_path(words[1], NULL));
301 if (!dev) {
302 qtest_send_prefix(chr);
303 qtest_send(chr, "FAIL Unknown device\n");
Paolo Bonzini7d374352018-12-13 23:37:37 +0100304 return;
Paolo Bonzini20288342012-03-28 15:42:03 +0200305 }
306
307 if (irq_intercept_dev) {
308 qtest_send_prefix(chr);
309 if (irq_intercept_dev != dev) {
310 qtest_send(chr, "FAIL IRQ intercept already enabled\n");
311 } else {
312 qtest_send(chr, "OK\n");
313 }
Paolo Bonzini7d374352018-12-13 23:37:37 +0100314 return;
Paolo Bonzini20288342012-03-28 15:42:03 +0200315 }
316
Peter Crosthwaitea5f54292014-05-19 23:30:58 -0700317 QLIST_FOREACH(ngl, &dev->gpios, node) {
318 /* We don't support intercept of named GPIOs yet */
319 if (ngl->name) {
320 continue;
321 }
322 if (words[0][14] == 'o') {
Peter Crosthwaite60a79012014-09-25 22:21:31 -0700323 int i;
324 for (i = 0; i < ngl->num_out; ++i) {
325 qemu_irq *disconnected = g_new0(qemu_irq, 1);
326 qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
327 disconnected, i);
328
329 *disconnected = qdev_intercept_gpio_out(dev, icpt,
330 ngl->name, i);
331 }
Peter Crosthwaitea5f54292014-05-19 23:30:58 -0700332 } else {
333 qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
334 ngl->num_in);
335 }
Paolo Bonzini20288342012-03-28 15:42:03 +0200336 }
337 irq_intercept_dev = dev;
338 qtest_send_prefix(chr);
339 qtest_send(chr, "OK\n");
Steffen Görtz9813dc62019-01-07 15:23:47 +0000340 } else if (strcmp(words[0], "set_irq_in") == 0) {
341 DeviceState *dev;
342 qemu_irq irq;
343 char *name;
344 int ret;
345 int num;
346 int level;
Paolo Bonzini20288342012-03-28 15:42:03 +0200347
Steffen Görtz9813dc62019-01-07 15:23:47 +0000348 g_assert(words[1] && words[2] && words[3] && words[4]);
349
350 dev = DEVICE(object_resolve_path(words[1], NULL));
351 if (!dev) {
352 qtest_send_prefix(chr);
353 qtest_send(chr, "FAIL Unknown device\n");
354 return;
355 }
356
357 if (strcmp(words[2], "unnamed-gpio-in") == 0) {
358 name = NULL;
359 } else {
360 name = words[2];
361 }
362
363 ret = qemu_strtoi(words[3], NULL, 0, &num);
364 g_assert(!ret);
365 ret = qemu_strtoi(words[4], NULL, 0, &level);
366 g_assert(!ret);
367
368 irq = qdev_get_gpio_in_named(dev, name, num);
369
370 qemu_set_irq(irq, level);
371 qtest_send_prefix(chr);
372 qtest_send(chr, "OK\n");
Paolo Bonzini20288342012-03-28 15:42:03 +0200373 } else if (strcmp(words[0], "outb") == 0 ||
374 strcmp(words[0], "outw") == 0 ||
375 strcmp(words[0], "outl") == 0) {
Laurent Vivieraa15f492016-09-13 14:52:43 +0200376 unsigned long addr;
377 unsigned long value;
Eric Blake14773122017-09-11 12:19:46 -0500378 int ret;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200379
380 g_assert(words[1] && words[2]);
Eric Blake14773122017-09-11 12:19:46 -0500381 ret = qemu_strtoul(words[1], NULL, 0, &addr);
382 g_assert(ret == 0);
383 ret = qemu_strtoul(words[2], NULL, 0, &value);
384 g_assert(ret == 0);
Laurent Vivieraa15f492016-09-13 14:52:43 +0200385 g_assert(addr <= 0xffff);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200386
387 if (words[0][3] == 'b') {
388 cpu_outb(addr, value);
389 } else if (words[0][3] == 'w') {
390 cpu_outw(addr, value);
391 } else if (words[0][3] == 'l') {
392 cpu_outl(addr, value);
393 }
394 qtest_send_prefix(chr);
395 qtest_send(chr, "OK\n");
396 } else if (strcmp(words[0], "inb") == 0 ||
397 strcmp(words[0], "inw") == 0 ||
398 strcmp(words[0], "inl") == 0) {
Laurent Vivieraa15f492016-09-13 14:52:43 +0200399 unsigned long addr;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200400 uint32_t value = -1U;
Eric Blake14773122017-09-11 12:19:46 -0500401 int ret;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200402
403 g_assert(words[1]);
Eric Blake14773122017-09-11 12:19:46 -0500404 ret = qemu_strtoul(words[1], NULL, 0, &addr);
405 g_assert(ret == 0);
Laurent Vivieraa15f492016-09-13 14:52:43 +0200406 g_assert(addr <= 0xffff);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200407
408 if (words[0][2] == 'b') {
409 value = cpu_inb(addr);
410 } else if (words[0][2] == 'w') {
411 value = cpu_inw(addr);
412 } else if (words[0][2] == 'l') {
413 value = cpu_inl(addr);
414 }
415 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400416 qtest_sendf(chr, "OK 0x%04x\n", value);
Andreas Färber872536b2013-02-16 22:44:03 +0100417 } else if (strcmp(words[0], "writeb") == 0 ||
418 strcmp(words[0], "writew") == 0 ||
419 strcmp(words[0], "writel") == 0 ||
420 strcmp(words[0], "writeq") == 0) {
421 uint64_t addr;
422 uint64_t value;
Eric Blake14773122017-09-11 12:19:46 -0500423 int ret;
Andreas Färber872536b2013-02-16 22:44:03 +0100424
425 g_assert(words[1] && words[2]);
Eric Blake14773122017-09-11 12:19:46 -0500426 ret = qemu_strtou64(words[1], NULL, 0, &addr);
427 g_assert(ret == 0);
428 ret = qemu_strtou64(words[2], NULL, 0, &value);
429 g_assert(ret == 0);
Andreas Färber872536b2013-02-16 22:44:03 +0100430
431 if (words[0][5] == 'b') {
432 uint8_t data = value;
Julia Suvorova70da3042018-07-02 09:52:37 +0300433 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
434 &data, 1, true);
Andreas Färber872536b2013-02-16 22:44:03 +0100435 } else if (words[0][5] == 'w') {
436 uint16_t data = value;
437 tswap16s(&data);
Julia Suvorova70da3042018-07-02 09:52:37 +0300438 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
439 (uint8_t *) &data, 2, true);
Andreas Färber872536b2013-02-16 22:44:03 +0100440 } else if (words[0][5] == 'l') {
441 uint32_t data = value;
442 tswap32s(&data);
Julia Suvorova70da3042018-07-02 09:52:37 +0300443 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
444 (uint8_t *) &data, 4, true);
Andreas Färber872536b2013-02-16 22:44:03 +0100445 } else if (words[0][5] == 'q') {
446 uint64_t data = value;
447 tswap64s(&data);
Julia Suvorova70da3042018-07-02 09:52:37 +0300448 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
449 (uint8_t *) &data, 8, true);
Andreas Färber872536b2013-02-16 22:44:03 +0100450 }
451 qtest_send_prefix(chr);
452 qtest_send(chr, "OK\n");
453 } else if (strcmp(words[0], "readb") == 0 ||
454 strcmp(words[0], "readw") == 0 ||
455 strcmp(words[0], "readl") == 0 ||
456 strcmp(words[0], "readq") == 0) {
457 uint64_t addr;
458 uint64_t value = UINT64_C(-1);
Eric Blake14773122017-09-11 12:19:46 -0500459 int ret;
Andreas Färber872536b2013-02-16 22:44:03 +0100460
461 g_assert(words[1]);
Eric Blake14773122017-09-11 12:19:46 -0500462 ret = qemu_strtou64(words[1], NULL, 0, &addr);
463 g_assert(ret == 0);
Andreas Färber872536b2013-02-16 22:44:03 +0100464
465 if (words[0][4] == 'b') {
466 uint8_t data;
Julia Suvorova70da3042018-07-02 09:52:37 +0300467 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
468 &data, 1, false);
Andreas Färber872536b2013-02-16 22:44:03 +0100469 value = data;
470 } else if (words[0][4] == 'w') {
471 uint16_t data;
Julia Suvorova70da3042018-07-02 09:52:37 +0300472 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
473 (uint8_t *) &data, 2, false);
Andreas Färber872536b2013-02-16 22:44:03 +0100474 value = tswap16(data);
475 } else if (words[0][4] == 'l') {
476 uint32_t data;
Julia Suvorova70da3042018-07-02 09:52:37 +0300477 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
478 (uint8_t *) &data, 4, false);
Andreas Färber872536b2013-02-16 22:44:03 +0100479 value = tswap32(data);
480 } else if (words[0][4] == 'q') {
Julia Suvorova70da3042018-07-02 09:52:37 +0300481 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
482 (uint8_t *) &value, 8, false);
Andreas Färber872536b2013-02-16 22:44:03 +0100483 tswap64s(&value);
484 }
485 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400486 qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200487 } else if (strcmp(words[0], "read") == 0) {
488 uint64_t addr, len, i;
489 uint8_t *data;
John Snow5560b852015-05-22 14:13:44 -0400490 char *enc;
Eric Blake14773122017-09-11 12:19:46 -0500491 int ret;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200492
493 g_assert(words[1] && words[2]);
Eric Blake14773122017-09-11 12:19:46 -0500494 ret = qemu_strtou64(words[1], NULL, 0, &addr);
495 g_assert(ret == 0);
496 ret = qemu_strtou64(words[2], NULL, 0, &len);
497 g_assert(ret == 0);
Greg Kurz204febd2017-01-11 09:49:32 +0100498 /* We'd send garbage to libqtest if len is 0 */
499 g_assert(len);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200500
501 data = g_malloc(len);
Julia Suvorova70da3042018-07-02 09:52:37 +0300502 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
503 data, len, false);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200504
John Snow5560b852015-05-22 14:13:44 -0400505 enc = g_malloc(2 * len + 1);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200506 for (i = 0; i < len; i++) {
John Snow5560b852015-05-22 14:13:44 -0400507 sprintf(&enc[i * 2], "%02x", data[i]);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200508 }
John Snow5560b852015-05-22 14:13:44 -0400509
510 qtest_send_prefix(chr);
511 qtest_sendf(chr, "OK 0x%s\n", enc);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200512
513 g_free(data);
John Snow5560b852015-05-22 14:13:44 -0400514 g_free(enc);
John Snow7a6a7402015-05-22 14:13:44 -0400515 } else if (strcmp(words[0], "b64read") == 0) {
516 uint64_t addr, len;
517 uint8_t *data;
518 gchar *b64_data;
Eric Blake14773122017-09-11 12:19:46 -0500519 int ret;
John Snow7a6a7402015-05-22 14:13:44 -0400520
521 g_assert(words[1] && words[2]);
Eric Blake14773122017-09-11 12:19:46 -0500522 ret = qemu_strtou64(words[1], NULL, 0, &addr);
523 g_assert(ret == 0);
524 ret = qemu_strtou64(words[2], NULL, 0, &len);
525 g_assert(ret == 0);
John Snow7a6a7402015-05-22 14:13:44 -0400526
527 data = g_malloc(len);
Julia Suvorova70da3042018-07-02 09:52:37 +0300528 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
529 data, len, false);
John Snow7a6a7402015-05-22 14:13:44 -0400530 b64_data = g_base64_encode(data, len);
531 qtest_send_prefix(chr);
532 qtest_sendf(chr, "OK %s\n", b64_data);
533
534 g_free(data);
535 g_free(b64_data);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200536 } else if (strcmp(words[0], "write") == 0) {
537 uint64_t addr, len, i;
538 uint8_t *data;
539 size_t data_len;
Eric Blake14773122017-09-11 12:19:46 -0500540 int ret;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200541
542 g_assert(words[1] && words[2] && words[3]);
Eric Blake14773122017-09-11 12:19:46 -0500543 ret = qemu_strtou64(words[1], NULL, 0, &addr);
544 g_assert(ret == 0);
545 ret = qemu_strtou64(words[2], NULL, 0, &len);
546 g_assert(ret == 0);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200547
548 data_len = strlen(words[3]);
549 if (data_len < 3) {
550 qtest_send(chr, "ERR invalid argument size\n");
551 return;
552 }
553
554 data = g_malloc(len);
555 for (i = 0; i < len; i++) {
556 if ((i * 2 + 4) <= data_len) {
557 data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
558 data[i] |= hex2nib(words[3][i * 2 + 3]);
559 } else {
560 data[i] = 0;
561 }
562 }
Julia Suvorova70da3042018-07-02 09:52:37 +0300563 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
564 data, len, true);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200565 g_free(data);
566
567 qtest_send_prefix(chr);
568 qtest_send(chr, "OK\n");
John Snow4d007962015-05-22 14:13:44 -0400569 } else if (strcmp(words[0], "memset") == 0) {
570 uint64_t addr, len;
571 uint8_t *data;
Laurent Vivieraa15f492016-09-13 14:52:43 +0200572 unsigned long pattern;
Eric Blake14773122017-09-11 12:19:46 -0500573 int ret;
John Snow4d007962015-05-22 14:13:44 -0400574
575 g_assert(words[1] && words[2] && words[3]);
Eric Blake14773122017-09-11 12:19:46 -0500576 ret = qemu_strtou64(words[1], NULL, 0, &addr);
577 g_assert(ret == 0);
578 ret = qemu_strtou64(words[2], NULL, 0, &len);
579 g_assert(ret == 0);
580 ret = qemu_strtoul(words[3], NULL, 0, &pattern);
581 g_assert(ret == 0);
John Snow4d007962015-05-22 14:13:44 -0400582
Peter Maydell5f31bbf2016-08-05 11:43:20 +0100583 if (len) {
584 data = g_malloc(len);
585 memset(data, pattern, len);
Julia Suvorova70da3042018-07-02 09:52:37 +0300586 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
587 data, len, true);
Peter Maydell5f31bbf2016-08-05 11:43:20 +0100588 g_free(data);
589 }
John Snow4d007962015-05-22 14:13:44 -0400590
591 qtest_send_prefix(chr);
592 qtest_send(chr, "OK\n");
John Snow7a6a7402015-05-22 14:13:44 -0400593 } else if (strcmp(words[0], "b64write") == 0) {
594 uint64_t addr, len;
595 uint8_t *data;
596 size_t data_len;
597 gsize out_len;
Eric Blake14773122017-09-11 12:19:46 -0500598 int ret;
John Snow7a6a7402015-05-22 14:13:44 -0400599
600 g_assert(words[1] && words[2] && words[3]);
Eric Blake14773122017-09-11 12:19:46 -0500601 ret = qemu_strtou64(words[1], NULL, 0, &addr);
602 g_assert(ret == 0);
603 ret = qemu_strtou64(words[2], NULL, 0, &len);
604 g_assert(ret == 0);
John Snow7a6a7402015-05-22 14:13:44 -0400605
606 data_len = strlen(words[3]);
607 if (data_len < 3) {
608 qtest_send(chr, "ERR invalid argument size\n");
609 return;
610 }
611
612 data = g_base64_decode_inplace(words[3], &out_len);
613 if (out_len != len) {
614 qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
615 "found %zu)\n",
616 len, out_len);
617 out_len = MIN(out_len, len);
618 }
619
Julia Suvorova70da3042018-07-02 09:52:37 +0300620 address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
621 data, len, true);
John Snow7a6a7402015-05-22 14:13:44 -0400622
623 qtest_send_prefix(chr);
624 qtest_send(chr, "OK\n");
Laurent Vivier54ce6f22016-10-07 12:14:27 +0200625 } else if (strcmp(words[0], "endianness") == 0) {
626 qtest_send_prefix(chr);
627#if defined(TARGET_WORDS_BIGENDIAN)
628 qtest_sendf(chr, "OK big\n");
629#else
630 qtest_sendf(chr, "OK little\n");
631#endif
Laurent Viviereeddd592016-09-13 14:52:45 +0200632#ifdef TARGET_PPC64
633 } else if (strcmp(words[0], "rtas") == 0) {
634 uint64_t res, args, ret;
635 unsigned long nargs, nret;
Eric Blake14773122017-09-11 12:19:46 -0500636 int rc;
Laurent Viviereeddd592016-09-13 14:52:45 +0200637
Eric Blake14773122017-09-11 12:19:46 -0500638 rc = qemu_strtoul(words[2], NULL, 0, &nargs);
639 g_assert(rc == 0);
640 rc = qemu_strtou64(words[3], NULL, 0, &args);
641 g_assert(rc == 0);
642 rc = qemu_strtoul(words[4], NULL, 0, &nret);
643 g_assert(rc == 0);
644 rc = qemu_strtou64(words[5], NULL, 0, &ret);
645 g_assert(rc == 0);
Laurent Viviereeddd592016-09-13 14:52:45 +0200646 res = qtest_rtas_call(words[1], nargs, args, nret, ret);
647
648 qtest_send_prefix(chr);
649 qtest_sendf(chr, "OK %"PRIu64"\n", res);
650#endif
Paolo Bonzinid4fce242013-10-18 13:51:11 +0200651 } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
Paolo Bonzini8156be52012-03-28 15:42:04 +0200652 int64_t ns;
653
654 if (words[1]) {
Eric Blake14773122017-09-11 12:19:46 -0500655 int ret = qemu_strtoi64(words[1], NULL, 0, &ns);
656 g_assert(ret == 0);
Paolo Bonzini8156be52012-03-28 15:42:04 +0200657 } else {
Alex Bligh40daca52013-08-21 16:03:02 +0100658 ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
Paolo Bonzini8156be52012-03-28 15:42:04 +0200659 }
Alex Blighbc72ad62013-08-21 16:03:08 +0100660 qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
Paolo Bonzini8156be52012-03-28 15:42:04 +0200661 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400662 qtest_sendf(chr, "OK %"PRIi64"\n",
663 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
Paolo Bonzinid4fce242013-10-18 13:51:11 +0200664 } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
Paolo Bonzini8156be52012-03-28 15:42:04 +0200665 int64_t ns;
Eric Blake14773122017-09-11 12:19:46 -0500666 int ret;
Paolo Bonzini8156be52012-03-28 15:42:04 +0200667
668 g_assert(words[1]);
Eric Blake14773122017-09-11 12:19:46 -0500669 ret = qemu_strtoi64(words[1], NULL, 0, &ns);
670 g_assert(ret == 0);
Paolo Bonzini8156be52012-03-28 15:42:04 +0200671 qtest_clock_warp(ns);
672 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400673 qtest_sendf(chr, "OK %"PRIi64"\n",
674 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200675 } else {
676 qtest_send_prefix(chr);
John Snow332cc7e2015-05-22 14:13:43 -0400677 qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200678 }
679}
680
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300681static void qtest_process_inbuf(CharBackend *chr, GString *inbuf)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200682{
683 char *end;
684
685 while ((end = strchr(inbuf->str, '\n')) != NULL) {
686 size_t offset;
687 GString *cmd;
688 gchar **words;
689
690 offset = end - inbuf->str;
691
692 cmd = g_string_new_len(inbuf->str, offset);
693 g_string_erase(inbuf, 0, offset + 1);
694
695 words = g_strsplit(cmd->str, " ", 0);
696 qtest_process_command(chr, words);
697 g_strfreev(words);
698
699 g_string_free(cmd, TRUE);
700 }
701}
702
703static void qtest_read(void *opaque, const uint8_t *buf, int size)
704{
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300705 CharBackend *chr = opaque;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200706
707 g_string_append_len(inbuf, (const gchar *)buf, size);
708 qtest_process_inbuf(chr, inbuf);
709}
710
711static int qtest_can_read(void *opaque)
712{
713 return 1024;
714}
715
716static void qtest_event(void *opaque, int event)
717{
718 int i;
719
720 switch (event) {
721 case CHR_EVENT_OPENED:
Markus Armbrusterba646ff2013-06-26 15:52:12 +0200722 /*
723 * We used to call qemu_system_reset() here, hoping we could
724 * use the same process for multiple tests that way. Never
725 * used. Injects an extra reset even when it's not used, and
726 * that can mess up tests, e.g. -boot once.
727 */
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200728 for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
729 irq_levels[i] = 0;
730 }
Anthony Liguori6e924662012-03-30 14:04:04 -0500731 qemu_gettimeofday(&start_time);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200732 qtest_opened = true;
733 if (qtest_log_fp) {
734 fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n",
Richard Henderson35aa3fb2013-08-20 13:53:25 -0700735 (long) start_time.tv_sec, (long) start_time.tv_usec);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200736 }
737 break;
738 case CHR_EVENT_CLOSED:
739 qtest_opened = false;
740 if (qtest_log_fp) {
Anthony Liguori6e924662012-03-30 14:04:04 -0500741 qemu_timeval tv;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200742 qtest_get_time(&tv);
743 fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n",
Richard Henderson35aa3fb2013-08-20 13:53:25 -0700744 (long) tv.tv_sec, (long) tv.tv_usec);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200745 }
746 break;
747 default:
748 break;
749 }
750}
751
Eduardo Habkostf6a1ef62014-09-26 17:45:30 -0300752static int qtest_init_accel(MachineState *ms)
Paolo Bonzinid4fce242013-10-18 13:51:11 +0200753{
Markus Armbrusterb3adf5a2015-02-13 15:48:19 +0100754 QemuOpts *opts = qemu_opts_create(qemu_find_opts("icount"), NULL, 0,
755 &error_abort);
756 qemu_opt_set(opts, "shift", "0", &error_abort);
757 configure_icount(opts, &error_abort);
758 qemu_opts_del(opts);
Paolo Bonzinid4fce242013-10-18 13:51:11 +0200759 return 0;
760}
761
Fam Zheng23802b42014-02-10 09:28:02 +0800762void qtest_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200763{
Marc-André Lureau0ec7b3e2016-12-07 16:20:22 +0300764 Chardev *chr;
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200765
Paolo Bonzini4ad6f6c2019-02-13 14:18:13 +0100766 chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200767
Fam Zheng23802b42014-02-10 09:28:02 +0800768 if (chr == NULL) {
769 error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
770 qtest_chrdev);
771 return;
772 }
773
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200774 if (qtest_log) {
775 if (strcmp(qtest_log, "none") != 0) {
776 qtest_log_fp = fopen(qtest_log, "w+");
777 }
778 } else {
779 qtest_log_fp = stderr;
780 }
781
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300782 qemu_chr_fe_init(&qtest_chr, chr, errp);
783 qemu_chr_fe_set_handlers(&qtest_chr, qtest_can_read, qtest_read,
Anton Nefedov81517ba2017-07-06 15:08:49 +0300784 qtest_event, NULL, &qtest_chr, NULL, true);
Marc-André Lureau5345fdb2016-10-22 12:52:55 +0300785 qemu_chr_fe_set_echo(&qtest_chr, true);
Li Liu107684c2014-10-22 10:26:47 +0800786
787 inbuf = g_string_new("");
Anthony Liguoric7f0f3b2012-03-28 15:42:02 +0200788}
Michael S. Tsirkinb3be57c2014-02-04 20:06:47 +0200789
790bool qtest_driver(void)
791{
Marc-André Lureau32a6ebe2016-10-22 12:52:52 +0300792 return qtest_chr.chr != NULL;
Michael S. Tsirkinb3be57c2014-02-04 20:06:47 +0200793}
Eduardo Habkost3a6ce512014-09-26 17:45:26 -0300794
795static void qtest_accel_class_init(ObjectClass *oc, void *data)
796{
797 AccelClass *ac = ACCEL_CLASS(oc);
798 ac->name = "QTest";
799 ac->available = qtest_available;
Eduardo Habkost0d15da82014-09-26 17:45:29 -0300800 ac->init_machine = qtest_init_accel;
Eduardo Habkost3a6ce512014-09-26 17:45:26 -0300801 ac->allowed = &qtest_allowed;
802}
803
804#define TYPE_QTEST_ACCEL ACCEL_CLASS_NAME("qtest")
805
806static const TypeInfo qtest_accel_type = {
807 .name = TYPE_QTEST_ACCEL,
808 .parent = TYPE_ACCEL,
809 .class_init = qtest_accel_class_init,
810};
811
812static void qtest_type_init(void)
813{
814 type_register_static(&qtest_accel_type);
815}
816
817type_init(qtest_type_init);