bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
Blue Swirl | efbf29b | 2011-09-21 20:00:18 +0000 | [diff] [blame] | 4 | * Generate helpers used by TCG for qemu_ld/st ops and code load |
| 5 | * functions. |
| 6 | * |
| 7 | * Included from target op helpers and exec.c. |
| 8 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 9 | * Copyright (c) 2003 Fabrice Bellard |
| 10 | * |
| 11 | * This library is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU Lesser General Public |
| 13 | * License as published by the Free Software Foundation; either |
| 14 | * version 2 of the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This library is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 19 | * Lesser General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 22 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 23 | */ |
Blue Swirl | 29e922b | 2010-03-29 19:24:00 +0000 | [diff] [blame] | 24 | #include "qemu-timer.h" |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 25 | #include "memory.h" |
Blue Swirl | 29e922b | 2010-03-29 19:24:00 +0000 | [diff] [blame] | 26 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 27 | #define DATA_SIZE (1 << SHIFT) |
| 28 | |
| 29 | #if DATA_SIZE == 8 |
| 30 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 31 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 32 | #define DATA_TYPE uint64_t |
| 33 | #elif DATA_SIZE == 4 |
| 34 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 35 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 36 | #define DATA_TYPE uint32_t |
| 37 | #elif DATA_SIZE == 2 |
| 38 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 39 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 40 | #define DATA_TYPE uint16_t |
| 41 | #elif DATA_SIZE == 1 |
| 42 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 43 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 44 | #define DATA_TYPE uint8_t |
| 45 | #else |
| 46 | #error unsupported data size |
| 47 | #endif |
| 48 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 49 | #ifdef SOFTMMU_CODE_ACCESS |
| 50 | #define READ_ACCESS_TYPE 2 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 51 | #define ADDR_READ addr_code |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 52 | #else |
| 53 | #define READ_ACCESS_TYPE 0 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 54 | #define ADDR_READ addr_read |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 55 | #endif |
| 56 | |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 57 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 58 | target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 59 | int mmu_idx, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 60 | uintptr_t retaddr); |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 61 | static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 62 | target_phys_addr_t physaddr, |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 63 | target_ulong addr, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 64 | uintptr_t retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 65 | { |
| 66 | DATA_TYPE res; |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 67 | MemoryRegion *mr = iotlb_to_region(physaddr); |
| 68 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 69 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 70 | env->mem_io_pc = retaddr; |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 71 | if (mr != &io_mem_ram && mr != &io_mem_rom |
| 72 | && mr != &io_mem_unassigned |
| 73 | && mr != &io_mem_notdirty |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 74 | && !can_do_io(env)) { |
| 75 | cpu_io_recompile(env, retaddr); |
| 76 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 77 | |
aliguori | db8886d | 2008-11-18 20:09:43 +0000 | [diff] [blame] | 78 | env->mem_io_vaddr = addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 79 | #if SHIFT <= 2 |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 80 | res = io_mem_read(mr, physaddr, 1 << SHIFT); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 81 | #else |
| 82 | #ifdef TARGET_WORDS_BIGENDIAN |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 83 | res = io_mem_read(mr, physaddr, 4) << 32; |
| 84 | res |= io_mem_read(mr, physaddr + 4, 4); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 85 | #else |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 86 | res = io_mem_read(mr, physaddr, 4); |
| 87 | res |= io_mem_read(mr, physaddr + 4, 4) << 32; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 88 | #endif |
| 89 | #endif /* SHIFT > 2 */ |
| 90 | return res; |
| 91 | } |
| 92 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 93 | /* handle all cases except unaligned access which span two pages */ |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 94 | DATA_TYPE |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 95 | glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr, |
| 96 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 97 | { |
| 98 | DATA_TYPE res; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 99 | int index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 100 | target_ulong tlb_addr; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 101 | target_phys_addr_t ioaddr; |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 102 | uintptr_t retaddr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 103 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 104 | /* test if there is match for unaligned or IO access */ |
| 105 | /* XXX: could done more in memory macro in a non portable way */ |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 106 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 107 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 108 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 109 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 110 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 111 | /* IO access */ |
| 112 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 113 | goto do_unaligned_access; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 114 | retaddr = GETPC(); |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 115 | ioaddr = env->iotlb[mmu_idx][index]; |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 116 | res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 117 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 118 | /* slow unaligned access (it spans two pages or IO) */ |
| 119 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 120 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 121 | #ifdef ALIGNED_ONLY |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 122 | do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 123 | #endif |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 124 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 125 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 126 | } else { |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 127 | /* unaligned/aligned access in the same page */ |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 128 | uintptr_t addend; |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 129 | #ifdef ALIGNED_ONLY |
| 130 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 131 | retaddr = GETPC(); |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 132 | do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 133 | } |
| 134 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 135 | addend = env->tlb_table[mmu_idx][index].addend; |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 136 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(intptr_t) |
| 137 | (addr + addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 138 | } |
| 139 | } else { |
| 140 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 141 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 142 | #ifdef ALIGNED_ONLY |
| 143 | if ((addr & (DATA_SIZE - 1)) != 0) |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 144 | do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 145 | #endif |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 146 | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 147 | goto redo; |
| 148 | } |
| 149 | return res; |
| 150 | } |
| 151 | |
| 152 | /* handle all unaligned cases */ |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 153 | static DATA_TYPE |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 154 | glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 155 | target_ulong addr, |
| 156 | int mmu_idx, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 157 | uintptr_t retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 158 | { |
| 159 | DATA_TYPE res, res1, res2; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 160 | int index, shift; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 161 | target_phys_addr_t ioaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 162 | target_ulong tlb_addr, addr1, addr2; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 163 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 164 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 165 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 166 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 167 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 168 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 169 | /* IO access */ |
| 170 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 171 | goto do_unaligned_access; |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 172 | ioaddr = env->iotlb[mmu_idx][index]; |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 173 | res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 174 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 175 | do_unaligned_access: |
| 176 | /* slow unaligned access (it spans two pages) */ |
| 177 | addr1 = addr & ~(DATA_SIZE - 1); |
| 178 | addr2 = addr1 + DATA_SIZE; |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 179 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr1, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 180 | mmu_idx, retaddr); |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 181 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr2, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 182 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 183 | shift = (addr & (DATA_SIZE - 1)) * 8; |
| 184 | #ifdef TARGET_WORDS_BIGENDIAN |
| 185 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); |
| 186 | #else |
| 187 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); |
| 188 | #endif |
bellard | 6986f88 | 2004-01-18 21:53:18 +0000 | [diff] [blame] | 189 | res = (DATA_TYPE)res; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 190 | } else { |
| 191 | /* unaligned/aligned access in the same page */ |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 192 | uintptr_t addend = env->tlb_table[mmu_idx][index].addend; |
| 193 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(intptr_t) |
| 194 | (addr + addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 195 | } |
| 196 | } else { |
| 197 | /* the page is not in the TLB : fill it */ |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 198 | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 199 | goto redo; |
| 200 | } |
| 201 | return res; |
| 202 | } |
| 203 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 204 | #ifndef SOFTMMU_CODE_ACCESS |
| 205 | |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 206 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 207 | target_ulong addr, |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 208 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 209 | int mmu_idx, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 210 | uintptr_t retaddr); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 211 | |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 212 | static inline void glue(io_write, SUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 213 | target_phys_addr_t physaddr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 214 | DATA_TYPE val, |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 215 | target_ulong addr, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 216 | uintptr_t retaddr) |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 217 | { |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 218 | MemoryRegion *mr = iotlb_to_region(physaddr); |
| 219 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 220 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 221 | if (mr != &io_mem_ram && mr != &io_mem_rom |
| 222 | && mr != &io_mem_unassigned |
| 223 | && mr != &io_mem_notdirty |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 224 | && !can_do_io(env)) { |
| 225 | cpu_io_recompile(env, retaddr); |
| 226 | } |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 227 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 228 | env->mem_io_vaddr = addr; |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 229 | env->mem_io_pc = retaddr; |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 230 | #if SHIFT <= 2 |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 231 | io_mem_write(mr, physaddr, val, 1 << SHIFT); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 232 | #else |
| 233 | #ifdef TARGET_WORDS_BIGENDIAN |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 234 | io_mem_write(mr, physaddr, (val >> 32), 4); |
| 235 | io_mem_write(mr, physaddr + 4, (uint32_t)val, 4); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 236 | #else |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 237 | io_mem_write(mr, physaddr, (uint32_t)val, 4); |
| 238 | io_mem_write(mr, physaddr + 4, val >> 32, 4); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 239 | #endif |
| 240 | #endif /* SHIFT > 2 */ |
| 241 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 242 | |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 243 | void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
| 244 | target_ulong addr, DATA_TYPE val, |
| 245 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 246 | { |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 247 | target_phys_addr_t ioaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 248 | target_ulong tlb_addr; |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 249 | uintptr_t retaddr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 250 | int index; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 251 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 252 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 253 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 254 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 255 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 256 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 257 | /* IO access */ |
| 258 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 259 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 260 | retaddr = GETPC(); |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 261 | ioaddr = env->iotlb[mmu_idx][index]; |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 262 | glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 263 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 264 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 265 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 266 | #ifdef ALIGNED_ONLY |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 267 | do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 268 | #endif |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 269 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(env, addr, val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 270 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 271 | } else { |
| 272 | /* aligned/unaligned access in the same page */ |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 273 | uintptr_t addend; |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 274 | #ifdef ALIGNED_ONLY |
| 275 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 276 | retaddr = GETPC(); |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 277 | do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 278 | } |
| 279 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 280 | addend = env->tlb_table[mmu_idx][index].addend; |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 281 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(intptr_t) |
| 282 | (addr + addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 283 | } |
| 284 | } else { |
| 285 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 286 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 287 | #ifdef ALIGNED_ONLY |
| 288 | if ((addr & (DATA_SIZE - 1)) != 0) |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 289 | do_unaligned_access(env, addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 290 | #endif |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 291 | tlb_fill(env, addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 292 | goto redo; |
| 293 | } |
| 294 | } |
| 295 | |
| 296 | /* handles all unaligned cases */ |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 297 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 298 | target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 299 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 300 | int mmu_idx, |
Blue Swirl | 2050396 | 2012-04-09 14:20:20 +0000 | [diff] [blame] | 301 | uintptr_t retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 302 | { |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 303 | target_phys_addr_t ioaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 304 | target_ulong tlb_addr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 305 | int index, i; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 306 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 307 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 308 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 309 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 310 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 311 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 312 | /* IO access */ |
| 313 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 314 | goto do_unaligned_access; |
Avi Kivity | 37ec01d | 2012-03-08 18:08:35 +0200 | [diff] [blame] | 315 | ioaddr = env->iotlb[mmu_idx][index]; |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 316 | glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 317 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 318 | do_unaligned_access: |
| 319 | /* XXX: not efficient, but simple */ |
balrog | 6c41b27 | 2007-11-17 12:12:29 +0000 | [diff] [blame] | 320 | /* Note: relies on the fact that tlb_fill() does not remove the |
| 321 | * previous page from the TLB cache. */ |
balrog | 7221fa9 | 2007-11-17 09:53:42 +0000 | [diff] [blame] | 322 | for(i = DATA_SIZE - 1; i >= 0; i--) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 323 | #ifdef TARGET_WORDS_BIGENDIAN |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 324 | glue(slow_stb, MMUSUFFIX)(env, addr + i, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 325 | val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 326 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 327 | #else |
Blue Swirl | 89c3333 | 2012-09-02 15:28:56 +0000 | [diff] [blame] | 328 | glue(slow_stb, MMUSUFFIX)(env, addr + i, |
Blue Swirl | e141ab5 | 2011-09-18 14:55:46 +0000 | [diff] [blame] | 329 | val >> (i * 8), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 330 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 331 | #endif |
| 332 | } |
| 333 | } else { |
| 334 | /* aligned/unaligned access in the same page */ |
Stefan Weil | b065927 | 2012-04-12 14:14:51 +0200 | [diff] [blame] | 335 | uintptr_t addend = env->tlb_table[mmu_idx][index].addend; |
| 336 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(intptr_t) |
| 337 | (addr + addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 338 | } |
| 339 | } else { |
| 340 | /* the page is not in the TLB : fill it */ |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 341 | tlb_fill(env, addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 342 | goto redo; |
| 343 | } |
| 344 | } |
| 345 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 346 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
| 347 | |
| 348 | #undef READ_ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 349 | #undef SHIFT |
| 350 | #undef DATA_TYPE |
| 351 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 352 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 353 | #undef DATA_SIZE |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 354 | #undef ADDR_READ |