Peter Maydell | dd75074 | 2021-02-19 14:46:16 +0000 | [diff] [blame] | 1 | Arm MPS2 and MPS3 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an500``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``, ``mps3-an524``, ``mps3-an547``) |
| 2 | ========================================================================================================================================================= |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 3 | |
| 4 | These board models all use Arm M-profile CPUs. |
| 5 | |
Peter Maydell | ced8bb0 | 2021-02-15 11:51:37 +0000 | [diff] [blame] | 6 | The Arm MPS2, MPS2+ and MPS3 dev boards are FPGA based (the 2+ has a |
| 7 | bigger FPGA but is otherwise the same as the 2; the 3 has a bigger |
| 8 | FPGA again, can handle 4GB of RAM and has a USB controller and QSPI flash). |
| 9 | |
| 10 | Since the CPU itself and most of the devices are in the FPGA, the |
| 11 | details of the board as seen by the guest depend significantly on the |
| 12 | FPGA image. |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 13 | |
| 14 | QEMU models the following FPGA images: |
| 15 | |
| 16 | ``mps2-an385`` |
Peter Maydell | 99dfb04 | 2020-09-03 21:20:48 +0100 | [diff] [blame] | 17 | Cortex-M3 as documented in Arm Application Note AN385 |
Peter Maydell | 897d272 | 2020-09-03 21:20:46 +0100 | [diff] [blame] | 18 | ``mps2-an386`` |
Peter Maydell | 99dfb04 | 2020-09-03 21:20:48 +0100 | [diff] [blame] | 19 | Cortex-M4 as documented in Arm Application Note AN386 |
Peter Maydell | 6d4811c | 2020-09-03 21:20:47 +0100 | [diff] [blame] | 20 | ``mps2-an500`` |
Peter Maydell | 99dfb04 | 2020-09-03 21:20:48 +0100 | [diff] [blame] | 21 | Cortex-M7 as documented in Arm Application Note AN500 |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 22 | ``mps2-an505`` |
Peter Maydell | 99dfb04 | 2020-09-03 21:20:48 +0100 | [diff] [blame] | 23 | Cortex-M33 as documented in Arm Application Note AN505 |
| 24 | ``mps2-an511`` |
| 25 | Cortex-M3 'DesignStart' as documented in Arm Application Note AN511 |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 26 | ``mps2-an521`` |
Peter Maydell | 99dfb04 | 2020-09-03 21:20:48 +0100 | [diff] [blame] | 27 | Dual Cortex-M33 as documented in Arm Application Note AN521 |
Peter Maydell | ced8bb0 | 2021-02-15 11:51:37 +0000 | [diff] [blame] | 28 | ``mps3-an524`` |
| 29 | Dual Cortex-M33 on an MPS3, as documented in Arm Application Note AN524 |
Peter Maydell | dd75074 | 2021-02-19 14:46:16 +0000 | [diff] [blame] | 30 | ``mps3-an547`` |
| 31 | Cortex-M55 on an MPS3, as documented in Arm Application Note AN547 |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 32 | |
| 33 | Differences between QEMU and real hardware: |
| 34 | |
Peter Maydell | 897d272 | 2020-09-03 21:20:46 +0100 | [diff] [blame] | 35 | - AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 36 | block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as |
| 37 | if zbt_boot_ctrl is always zero) |
Peter Maydell | ced8bb0 | 2021-02-15 11:51:37 +0000 | [diff] [blame] | 38 | - AN524 remapping of low memory to either BRAM or to QSPI flash is |
| 39 | unimplemented (QEMU always maps this to BRAM, ignoring the |
| 40 | SCC CFG_REG0 memory-remap bit) |
Peter Maydell | ba7912a | 2020-05-07 16:18:18 +0100 | [diff] [blame] | 41 | - QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest |
| 42 | visible difference is that the LAN9118 doesn't support checksum |
| 43 | offloading |
Peter Maydell | ced8bb0 | 2021-02-15 11:51:37 +0000 | [diff] [blame] | 44 | - QEMU does not model the QSPI flash in MPS3 boards as real QSPI |
| 45 | flash, but only as simple ROM, so attempting to rewrite the flash |
| 46 | from the guest will fail |
| 47 | - QEMU does not model the USB controller in MPS3 boards |
Peter Maydell | f1dfab0 | 2021-05-04 13:09:12 +0100 | [diff] [blame] | 48 | |
| 49 | Machine-specific options |
| 50 | """""""""""""""""""""""" |
| 51 | |
| 52 | The following machine-specific options are supported: |
| 53 | |
| 54 | remap |
| 55 | Supported for ``mps3-an524`` only. |
| 56 | Set ``BRAM``/``QSPI`` to select the initial memory mapping. The |
| 57 | default is ``BRAM``. |