Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ASPEED XDMA Controller |
| 3 | * Eddie James <eajames@linux.ibm.com> |
| 4 | * |
| 5 | * Copyright (C) 2019 IBM Corp. |
Ryan Finnie | 5054ba1 | 2021-02-01 12:01:47 -0800 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef ASPEED_XDMA_H |
| 10 | #define ASPEED_XDMA_H |
| 11 | |
| 12 | #include "hw/sysbus.h" |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 13 | #include "qom/object.h" |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 14 | |
| 15 | #define TYPE_ASPEED_XDMA "aspeed.xdma" |
Cédric Le Goater | 8efbee2 | 2021-05-01 10:03:52 +0200 | [diff] [blame] | 16 | #define TYPE_ASPEED_2400_XDMA TYPE_ASPEED_XDMA "-ast2400" |
| 17 | #define TYPE_ASPEED_2500_XDMA TYPE_ASPEED_XDMA "-ast2500" |
| 18 | #define TYPE_ASPEED_2600_XDMA TYPE_ASPEED_XDMA "-ast2600" |
| 19 | OBJECT_DECLARE_TYPE(AspeedXDMAState, AspeedXDMAClass, ASPEED_XDMA) |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 20 | |
| 21 | #define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t)) |
| 22 | #define ASPEED_XDMA_REG_SIZE 0x7C |
| 23 | |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 24 | struct AspeedXDMAState { |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 25 | SysBusDevice parent; |
| 26 | |
| 27 | MemoryRegion iomem; |
| 28 | qemu_irq irq; |
| 29 | |
| 30 | char bmc_cmdq_readp_set; |
| 31 | uint32_t regs[ASPEED_XDMA_NUM_REGS]; |
Eduardo Habkost | db1015e | 2020-09-03 16:43:22 -0400 | [diff] [blame] | 32 | }; |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 33 | |
Cédric Le Goater | 8efbee2 | 2021-05-01 10:03:52 +0200 | [diff] [blame] | 34 | struct AspeedXDMAClass { |
| 35 | SysBusDeviceClass parent_class; |
| 36 | |
| 37 | uint8_t cmdq_endp; |
| 38 | uint8_t cmdq_wrp; |
| 39 | uint8_t cmdq_rdp; |
| 40 | uint8_t intr_ctrl; |
| 41 | uint32_t intr_ctrl_mask; |
| 42 | uint8_t intr_status; |
| 43 | uint32_t intr_complete; |
| 44 | }; |
| 45 | |
Eddie James | 118c82e | 2019-07-01 17:26:18 +0100 | [diff] [blame] | 46 | #endif /* ASPEED_XDMA_H */ |