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bellardc896fe22008-02-01 10:05:41 +00001/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#include "tcg.h"
25
bellardc896fe22008-02-01 10:05:41 +000026int gen_new_label(void);
27
Richard Hendersona9751602010-03-19 11:12:29 -070028static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 arg1)
pbrookac56dd42008-02-03 19:56:33 +000029{
30 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +000031 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
32}
33
Richard Hendersona9751602010-03-19 11:12:29 -070034static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 arg1)
pbrooka7812ae2008-11-17 14:43:54 +000035{
36 *gen_opc_ptr++ = opc;
37 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
pbrookac56dd42008-02-03 19:56:33 +000038}
39
Richard Hendersona9751602010-03-19 11:12:29 -070040static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg arg1)
bellardc896fe22008-02-01 10:05:41 +000041{
42 *gen_opc_ptr++ = opc;
43 *gen_opparam_ptr++ = arg1;
44}
45
Richard Hendersona9751602010-03-19 11:12:29 -070046static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +000047{
48 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +000049 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
50 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
pbrookac56dd42008-02-03 19:56:33 +000051}
52
Richard Hendersona9751602010-03-19 11:12:29 -070053static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2)
pbrookac56dd42008-02-03 19:56:33 +000054{
55 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +000056 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
57 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
58}
59
Richard Hendersona9751602010-03-19 11:12:29 -070060static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGArg arg2)
pbrooka7812ae2008-11-17 14:43:54 +000061{
62 *gen_opc_ptr++ = opc;
63 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
64 *gen_opparam_ptr++ = arg2;
65}
66
Richard Hendersona9751602010-03-19 11:12:29 -070067static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGArg arg2)
pbrooka7812ae2008-11-17 14:43:54 +000068{
69 *gen_opc_ptr++ = opc;
70 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
bellardc896fe22008-02-01 10:05:41 +000071 *gen_opparam_ptr++ = arg2;
72}
73
Richard Hendersona9751602010-03-19 11:12:29 -070074static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg arg1, TCGArg arg2)
pbrookbcb01262008-05-24 02:24:25 +000075{
76 *gen_opc_ptr++ = opc;
77 *gen_opparam_ptr++ = arg1;
78 *gen_opparam_ptr++ = arg2;
79}
80
Richard Hendersona9751602010-03-19 11:12:29 -070081static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +000082 TCGv_i32 arg3)
bellardc896fe22008-02-01 10:05:41 +000083{
84 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +000085 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
86 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
87 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
pbrookac56dd42008-02-03 19:56:33 +000088}
89
Richard Hendersona9751602010-03-19 11:12:29 -070090static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +000091 TCGv_i64 arg3)
pbrookac56dd42008-02-03 19:56:33 +000092{
93 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +000094 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
95 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
96 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
97}
98
Richard Hendersona9751602010-03-19 11:12:29 -070099static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 arg1,
100 TCGv_i32 arg2, TCGArg arg3)
pbrooka7812ae2008-11-17 14:43:54 +0000101{
102 *gen_opc_ptr++ = opc;
103 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
104 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
bellardc896fe22008-02-01 10:05:41 +0000105 *gen_opparam_ptr++ = arg3;
106}
107
Richard Hendersona9751602010-03-19 11:12:29 -0700108static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 arg1,
109 TCGv_i64 arg2, TCGArg arg3)
bellardc896fe22008-02-01 10:05:41 +0000110{
111 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000112 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
113 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
114 *gen_opparam_ptr++ = arg3;
pbrookac56dd42008-02-03 19:56:33 +0000115}
116
Richard Hendersona9751602010-03-19 11:12:29 -0700117static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
118 TCGv_ptr base, TCGArg offset)
pbrookac56dd42008-02-03 19:56:33 +0000119{
120 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000121 *gen_opparam_ptr++ = GET_TCGV_I32(val);
122 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
123 *gen_opparam_ptr++ = offset;
124}
125
Richard Hendersona9751602010-03-19 11:12:29 -0700126static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
127 TCGv_ptr base, TCGArg offset)
pbrooka7812ae2008-11-17 14:43:54 +0000128{
129 *gen_opc_ptr++ = opc;
blueswir1a810a2d2008-12-07 17:16:42 +0000130 *gen_opparam_ptr++ = GET_TCGV_I64(val);
pbrooka7812ae2008-11-17 14:43:54 +0000131 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
132 *gen_opparam_ptr++ = offset;
133}
134
Richard Hendersona9751602010-03-19 11:12:29 -0700135static inline void tcg_gen_qemu_ldst_op_i64_i32(TCGOpcode opc, TCGv_i64 val,
136 TCGv_i32 addr, TCGArg mem_index)
pbrooka7812ae2008-11-17 14:43:54 +0000137{
138 *gen_opc_ptr++ = opc;
139 *gen_opparam_ptr++ = GET_TCGV_I64(val);
140 *gen_opparam_ptr++ = GET_TCGV_I32(addr);
141 *gen_opparam_ptr++ = mem_index;
142}
143
Richard Hendersona9751602010-03-19 11:12:29 -0700144static inline void tcg_gen_qemu_ldst_op_i64_i64(TCGOpcode opc, TCGv_i64 val,
145 TCGv_i64 addr, TCGArg mem_index)
pbrooka7812ae2008-11-17 14:43:54 +0000146{
147 *gen_opc_ptr++ = opc;
148 *gen_opparam_ptr++ = GET_TCGV_I64(val);
149 *gen_opparam_ptr++ = GET_TCGV_I64(addr);
150 *gen_opparam_ptr++ = mem_index;
151}
152
Richard Hendersona9751602010-03-19 11:12:29 -0700153static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000154 TCGv_i32 arg3, TCGv_i32 arg4)
155{
156 *gen_opc_ptr++ = opc;
157 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
158 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
159 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
160 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
161}
162
Richard Hendersona9751602010-03-19 11:12:29 -0700163static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
blueswir1a810a2d2008-12-07 17:16:42 +0000164 TCGv_i64 arg3, TCGv_i64 arg4)
pbrooka7812ae2008-11-17 14:43:54 +0000165{
166 *gen_opc_ptr++ = opc;
167 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
168 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
169 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
170 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
171}
172
Richard Hendersona9751602010-03-19 11:12:29 -0700173static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000174 TCGv_i32 arg3, TCGArg arg4)
175{
176 *gen_opc_ptr++ = opc;
177 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
178 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
179 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
pbrookac56dd42008-02-03 19:56:33 +0000180 *gen_opparam_ptr++ = arg4;
181}
182
Richard Hendersona9751602010-03-19 11:12:29 -0700183static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000184 TCGv_i64 arg3, TCGArg arg4)
pbrookac56dd42008-02-03 19:56:33 +0000185{
186 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000187 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
188 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
189 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
190 *gen_opparam_ptr++ = arg4;
191}
192
Richard Hendersona9751602010-03-19 11:12:29 -0700193static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000194 TCGArg arg3, TCGArg arg4)
195{
196 *gen_opc_ptr++ = opc;
197 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
198 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
bellardc896fe22008-02-01 10:05:41 +0000199 *gen_opparam_ptr++ = arg3;
200 *gen_opparam_ptr++ = arg4;
201}
202
Richard Hendersona9751602010-03-19 11:12:29 -0700203static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000204 TCGArg arg3, TCGArg arg4)
bellardc896fe22008-02-01 10:05:41 +0000205{
206 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000207 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
208 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
209 *gen_opparam_ptr++ = arg3;
210 *gen_opparam_ptr++ = arg4;
pbrookac56dd42008-02-03 19:56:33 +0000211}
212
Richard Hendersona9751602010-03-19 11:12:29 -0700213static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000214 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5)
pbrookac56dd42008-02-03 19:56:33 +0000215{
216 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000217 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
218 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
219 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
220 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
221 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
222}
223
Richard Hendersona9751602010-03-19 11:12:29 -0700224static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000225 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5)
226{
227 *gen_opc_ptr++ = opc;
228 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
229 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
230 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
231 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
232 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
233}
234
Richard Hendersona9751602010-03-19 11:12:29 -0700235static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000236 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5)
237{
238 *gen_opc_ptr++ = opc;
239 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
240 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
241 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
242 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
bellardc896fe22008-02-01 10:05:41 +0000243 *gen_opparam_ptr++ = arg5;
244}
245
Richard Hendersona9751602010-03-19 11:12:29 -0700246static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000247 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5)
bellardc896fe22008-02-01 10:05:41 +0000248{
249 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000250 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
251 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
252 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
253 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
254 *gen_opparam_ptr++ = arg5;
pbrookac56dd42008-02-03 19:56:33 +0000255}
256
Richard Hendersonb7767f02011-01-10 19:23:42 -0800257static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 arg1,
258 TCGv_i32 arg2, TCGv_i32 arg3,
259 TCGArg arg4, TCGArg arg5)
260{
261 *gen_opc_ptr++ = opc;
262 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
263 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
264 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
265 *gen_opparam_ptr++ = arg4;
266 *gen_opparam_ptr++ = arg5;
267}
268
269static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 arg1,
270 TCGv_i64 arg2, TCGv_i64 arg3,
271 TCGArg arg4, TCGArg arg5)
272{
273 *gen_opc_ptr++ = opc;
274 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
275 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
276 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
277 *gen_opparam_ptr++ = arg4;
278 *gen_opparam_ptr++ = arg5;
279}
280
Richard Hendersona9751602010-03-19 11:12:29 -0700281static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000282 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5,
283 TCGv_i32 arg6)
pbrookac56dd42008-02-03 19:56:33 +0000284{
285 *gen_opc_ptr++ = opc;
pbrooka7812ae2008-11-17 14:43:54 +0000286 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
287 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
288 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
289 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
290 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
291 *gen_opparam_ptr++ = GET_TCGV_I32(arg6);
292}
293
Richard Hendersona9751602010-03-19 11:12:29 -0700294static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
pbrooka7812ae2008-11-17 14:43:54 +0000295 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5,
296 TCGv_i64 arg6)
297{
298 *gen_opc_ptr++ = opc;
299 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
300 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
301 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
302 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
303 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
304 *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
305}
306
Richard Hendersona9751602010-03-19 11:12:29 -0700307static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2,
Richard Hendersonbe210ac2010-01-07 10:13:31 -0800308 TCGv_i32 arg3, TCGv_i32 arg4,
309 TCGv_i32 arg5, TCGArg arg6)
310{
311 *gen_opc_ptr++ = opc;
312 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
313 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
314 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
315 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
316 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
317 *gen_opparam_ptr++ = arg6;
318}
319
Richard Hendersona9751602010-03-19 11:12:29 -0700320static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
Richard Hendersonbe210ac2010-01-07 10:13:31 -0800321 TCGv_i64 arg3, TCGv_i64 arg4,
322 TCGv_i64 arg5, TCGArg arg6)
323{
324 *gen_opc_ptr++ = opc;
325 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
326 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
327 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
328 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
329 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
330 *gen_opparam_ptr++ = arg6;
331}
332
Richard Hendersona9751602010-03-19 11:12:29 -0700333static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 arg1,
334 TCGv_i32 arg2, TCGv_i32 arg3,
335 TCGv_i32 arg4, TCGArg arg5, TCGArg arg6)
pbrooka7812ae2008-11-17 14:43:54 +0000336{
337 *gen_opc_ptr++ = opc;
338 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
339 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
340 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
341 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
342 *gen_opparam_ptr++ = arg5;
343 *gen_opparam_ptr++ = arg6;
344}
345
Richard Hendersona9751602010-03-19 11:12:29 -0700346static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 arg1,
347 TCGv_i64 arg2, TCGv_i64 arg3,
348 TCGv_i64 arg4, TCGArg arg5, TCGArg arg6)
pbrooka7812ae2008-11-17 14:43:54 +0000349{
350 *gen_opc_ptr++ = opc;
351 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
352 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
353 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
354 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
bellardc896fe22008-02-01 10:05:41 +0000355 *gen_opparam_ptr++ = arg5;
356 *gen_opparam_ptr++ = arg6;
357}
358
359static inline void gen_set_label(int n)
360{
pbrookac56dd42008-02-03 19:56:33 +0000361 tcg_gen_op1i(INDEX_op_set_label, n);
bellardc896fe22008-02-01 10:05:41 +0000362}
363
blueswir1fb50d412008-03-21 17:58:45 +0000364static inline void tcg_gen_br(int label)
365{
366 tcg_gen_op1i(INDEX_op_br, label);
367}
368
pbrooka7812ae2008-11-17 14:43:54 +0000369static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +0000370{
aurel32fe75bcf2009-03-10 08:57:16 +0000371 if (!TCGV_EQUAL_I32(ret, arg))
pbrooka7812ae2008-11-17 14:43:54 +0000372 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
bellardc896fe22008-02-01 10:05:41 +0000373}
374
pbrooka7812ae2008-11-17 14:43:54 +0000375static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
bellardc896fe22008-02-01 10:05:41 +0000376{
pbrooka7812ae2008-11-17 14:43:54 +0000377 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
bellardc896fe22008-02-01 10:05:41 +0000378}
379
Richard Henderson2bece2c2010-06-14 17:35:27 -0700380/* A version of dh_sizemask from def-helper.h that doesn't rely on
381 preprocessor magic. */
382static inline int tcg_gen_sizemask(int n, int is_64bit, int is_signed)
383{
384 return (is_64bit << n*2) | (is_signed << (n*2 + 1));
385}
386
bellardc896fe22008-02-01 10:05:41 +0000387/* helper calls */
pbrooka7812ae2008-11-17 14:43:54 +0000388static inline void tcg_gen_helperN(void *func, int flags, int sizemask,
389 TCGArg ret, int nargs, TCGArg *args)
bellardc896fe22008-02-01 10:05:41 +0000390{
pbrooka7812ae2008-11-17 14:43:54 +0000391 TCGv_ptr fn;
392 fn = tcg_const_ptr((tcg_target_long)func);
393 tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret,
394 nargs, args);
395 tcg_temp_free_ptr(fn);
bellardc896fe22008-02-01 10:05:41 +0000396}
397
Aurelien Jarnodbfff4d2010-03-14 23:01:01 +0100398/* Note: Both tcg_gen_helper32() and tcg_gen_helper64() are currently
399 reserved for helpers in tcg-runtime.c. These helpers are all const
400 and pure, hence the call to tcg_gen_callN() with TCG_CALL_CONST |
401 TCG_CALL_PURE. This may need to be adjusted if these functions
402 start to be used with other helpers. */
Richard Henderson2bece2c2010-06-14 17:35:27 -0700403static inline void tcg_gen_helper32(void *func, int sizemask, TCGv_i32 ret,
Aurelien Jarno31d66552010-03-02 23:16:36 +0100404 TCGv_i32 a, TCGv_i32 b)
405{
406 TCGv_ptr fn;
407 TCGArg args[2];
408 fn = tcg_const_ptr((tcg_target_long)func);
409 args[0] = GET_TCGV_I32(a);
410 args[1] = GET_TCGV_I32(b);
Richard Henderson2bece2c2010-06-14 17:35:27 -0700411 tcg_gen_callN(&tcg_ctx, fn, TCG_CALL_CONST | TCG_CALL_PURE, sizemask,
412 GET_TCGV_I32(ret), 2, args);
Aurelien Jarno31d66552010-03-02 23:16:36 +0100413 tcg_temp_free_ptr(fn);
414}
415
Richard Henderson2bece2c2010-06-14 17:35:27 -0700416static inline void tcg_gen_helper64(void *func, int sizemask, TCGv_i64 ret,
pbrooka7812ae2008-11-17 14:43:54 +0000417 TCGv_i64 a, TCGv_i64 b)
bellardc896fe22008-02-01 10:05:41 +0000418{
pbrooka7812ae2008-11-17 14:43:54 +0000419 TCGv_ptr fn;
420 TCGArg args[2];
421 fn = tcg_const_ptr((tcg_target_long)func);
422 args[0] = GET_TCGV_I64(a);
423 args[1] = GET_TCGV_I64(b);
Richard Henderson2bece2c2010-06-14 17:35:27 -0700424 tcg_gen_callN(&tcg_ctx, fn, TCG_CALL_CONST | TCG_CALL_PURE, sizemask,
425 GET_TCGV_I64(ret), 2, args);
pbrooka7812ae2008-11-17 14:43:54 +0000426 tcg_temp_free_ptr(fn);
blueswir1f8422f52008-02-24 07:45:43 +0000427}
428
bellardc896fe22008-02-01 10:05:41 +0000429/* 32 bit ops */
430
pbrooka7812ae2008-11-17 14:43:54 +0000431static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000432{
pbrooka7812ae2008-11-17 14:43:54 +0000433 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000434}
435
pbrooka7812ae2008-11-17 14:43:54 +0000436static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000437{
pbrooka7812ae2008-11-17 14:43:54 +0000438 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000439}
440
pbrooka7812ae2008-11-17 14:43:54 +0000441static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000442{
pbrooka7812ae2008-11-17 14:43:54 +0000443 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000444}
445
pbrooka7812ae2008-11-17 14:43:54 +0000446static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000447{
pbrooka7812ae2008-11-17 14:43:54 +0000448 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000449}
450
pbrooka7812ae2008-11-17 14:43:54 +0000451static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000452{
pbrooka7812ae2008-11-17 14:43:54 +0000453 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000454}
455
pbrooka7812ae2008-11-17 14:43:54 +0000456static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000457{
pbrooka7812ae2008-11-17 14:43:54 +0000458 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000459}
460
pbrooka7812ae2008-11-17 14:43:54 +0000461static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000462{
pbrooka7812ae2008-11-17 14:43:54 +0000463 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000464}
465
pbrooka7812ae2008-11-17 14:43:54 +0000466static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000467{
pbrooka7812ae2008-11-17 14:43:54 +0000468 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000469}
470
pbrooka7812ae2008-11-17 14:43:54 +0000471static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000472{
pbrooka7812ae2008-11-17 14:43:54 +0000473 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000474}
475
pbrooka7812ae2008-11-17 14:43:54 +0000476static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000477{
blueswir170894422008-02-20 18:01:23 +0000478 /* some cases can be optimized here */
479 if (arg2 == 0) {
480 tcg_gen_mov_i32(ret, arg1);
481 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000482 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000483 tcg_gen_add_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000484 tcg_temp_free_i32(t0);
blueswir170894422008-02-20 18:01:23 +0000485 }
bellardc896fe22008-02-01 10:05:41 +0000486}
487
pbrooka7812ae2008-11-17 14:43:54 +0000488static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000489{
pbrooka7812ae2008-11-17 14:43:54 +0000490 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000491}
492
pbrooka7812ae2008-11-17 14:43:54 +0000493static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
aurel3200457342008-11-02 08:23:04 +0000494{
pbrooka7812ae2008-11-17 14:43:54 +0000495 TCGv_i32 t0 = tcg_const_i32(arg1);
aurel3200457342008-11-02 08:23:04 +0000496 tcg_gen_sub_i32(ret, t0, arg2);
pbrooka7812ae2008-11-17 14:43:54 +0000497 tcg_temp_free_i32(t0);
aurel3200457342008-11-02 08:23:04 +0000498}
499
pbrooka7812ae2008-11-17 14:43:54 +0000500static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000501{
blueswir170894422008-02-20 18:01:23 +0000502 /* some cases can be optimized here */
503 if (arg2 == 0) {
504 tcg_gen_mov_i32(ret, arg1);
505 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000506 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000507 tcg_gen_sub_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000508 tcg_temp_free_i32(t0);
blueswir170894422008-02-20 18:01:23 +0000509 }
bellardc896fe22008-02-01 10:05:41 +0000510}
511
pbrooka7812ae2008-11-17 14:43:54 +0000512static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000513{
aurel327fc81052009-03-10 19:37:39 +0000514 if (TCGV_EQUAL_I32(arg1, arg2)) {
515 tcg_gen_mov_i32(ret, arg1);
516 } else {
517 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
518 }
bellardc896fe22008-02-01 10:05:41 +0000519}
520
pbrooka7812ae2008-11-17 14:43:54 +0000521static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000522{
523 /* some cases can be optimized here */
524 if (arg2 == 0) {
525 tcg_gen_movi_i32(ret, 0);
526 } else if (arg2 == 0xffffffff) {
527 tcg_gen_mov_i32(ret, arg1);
528 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000529 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000530 tcg_gen_and_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000531 tcg_temp_free_i32(t0);
bellardc896fe22008-02-01 10:05:41 +0000532 }
533}
534
pbrooka7812ae2008-11-17 14:43:54 +0000535static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000536{
aurel327fc81052009-03-10 19:37:39 +0000537 if (TCGV_EQUAL_I32(arg1, arg2)) {
538 tcg_gen_mov_i32(ret, arg1);
539 } else {
540 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
541 }
bellardc896fe22008-02-01 10:05:41 +0000542}
543
pbrooka7812ae2008-11-17 14:43:54 +0000544static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000545{
546 /* some cases can be optimized here */
547 if (arg2 == 0xffffffff) {
blueswir170894422008-02-20 18:01:23 +0000548 tcg_gen_movi_i32(ret, 0xffffffff);
bellardc896fe22008-02-01 10:05:41 +0000549 } else if (arg2 == 0) {
550 tcg_gen_mov_i32(ret, arg1);
551 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000552 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000553 tcg_gen_or_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000554 tcg_temp_free_i32(t0);
bellardc896fe22008-02-01 10:05:41 +0000555 }
556}
557
pbrooka7812ae2008-11-17 14:43:54 +0000558static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000559{
aurel327fc81052009-03-10 19:37:39 +0000560 if (TCGV_EQUAL_I32(arg1, arg2)) {
561 tcg_gen_movi_i32(ret, 0);
562 } else {
563 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
564 }
bellardc896fe22008-02-01 10:05:41 +0000565}
566
pbrooka7812ae2008-11-17 14:43:54 +0000567static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000568{
569 /* some cases can be optimized here */
570 if (arg2 == 0) {
571 tcg_gen_mov_i32(ret, arg1);
572 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000573 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000574 tcg_gen_xor_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000575 tcg_temp_free_i32(t0);
bellardc896fe22008-02-01 10:05:41 +0000576 }
577}
578
pbrooka7812ae2008-11-17 14:43:54 +0000579static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000580{
pbrooka7812ae2008-11-17 14:43:54 +0000581 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000582}
583
pbrooka7812ae2008-11-17 14:43:54 +0000584static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000585{
bellard34151a22008-05-22 13:25:14 +0000586 if (arg2 == 0) {
587 tcg_gen_mov_i32(ret, arg1);
588 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000589 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000590 tcg_gen_shl_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000591 tcg_temp_free_i32(t0);
bellard34151a22008-05-22 13:25:14 +0000592 }
bellardc896fe22008-02-01 10:05:41 +0000593}
594
pbrooka7812ae2008-11-17 14:43:54 +0000595static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000596{
pbrooka7812ae2008-11-17 14:43:54 +0000597 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000598}
599
pbrooka7812ae2008-11-17 14:43:54 +0000600static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000601{
bellard34151a22008-05-22 13:25:14 +0000602 if (arg2 == 0) {
603 tcg_gen_mov_i32(ret, arg1);
604 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000605 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000606 tcg_gen_shr_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000607 tcg_temp_free_i32(t0);
bellard34151a22008-05-22 13:25:14 +0000608 }
bellardc896fe22008-02-01 10:05:41 +0000609}
610
pbrooka7812ae2008-11-17 14:43:54 +0000611static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000612{
pbrooka7812ae2008-11-17 14:43:54 +0000613 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000614}
615
pbrooka7812ae2008-11-17 14:43:54 +0000616static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000617{
bellard34151a22008-05-22 13:25:14 +0000618 if (arg2 == 0) {
619 tcg_gen_mov_i32(ret, arg1);
620 } else {
pbrooka7812ae2008-11-17 14:43:54 +0000621 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000622 tcg_gen_sar_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000623 tcg_temp_free_i32(t0);
bellard34151a22008-05-22 13:25:14 +0000624 }
bellardc896fe22008-02-01 10:05:41 +0000625}
626
Richard Henderson8a56e842010-03-19 11:26:05 -0700627static inline void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1,
628 TCGv_i32 arg2, int label_index)
bellardc896fe22008-02-01 10:05:41 +0000629{
pbrooka7812ae2008-11-17 14:43:54 +0000630 tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
bellardc896fe22008-02-01 10:05:41 +0000631}
632
Richard Henderson8a56e842010-03-19 11:26:05 -0700633static inline void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1,
634 int32_t arg2, int label_index)
pbrookcb636692008-05-24 02:22:00 +0000635{
pbrooka7812ae2008-11-17 14:43:54 +0000636 TCGv_i32 t0 = tcg_const_i32(arg2);
pbrookcb636692008-05-24 02:22:00 +0000637 tcg_gen_brcond_i32(cond, arg1, t0, label_index);
pbrooka7812ae2008-11-17 14:43:54 +0000638 tcg_temp_free_i32(t0);
pbrookcb636692008-05-24 02:22:00 +0000639}
640
Richard Henderson8a56e842010-03-19 11:26:05 -0700641static inline void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
Aurelien Jarno5105c552010-02-08 12:10:15 +0100642 TCGv_i32 arg1, TCGv_i32 arg2)
643{
644 tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond);
645}
646
Richard Henderson8a56e842010-03-19 11:26:05 -0700647static inline void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
648 TCGv_i32 arg1, int32_t arg2)
Aurelien Jarno5105c552010-02-08 12:10:15 +0100649{
650 TCGv_i32 t0 = tcg_const_i32(arg2);
651 tcg_gen_setcond_i32(cond, ret, arg1, t0);
652 tcg_temp_free_i32(t0);
653}
654
pbrooka7812ae2008-11-17 14:43:54 +0000655static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000656{
pbrooka7812ae2008-11-17 14:43:54 +0000657 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000658}
659
pbrooka7812ae2008-11-17 14:43:54 +0000660static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
thsf730fd22008-05-04 08:14:08 +0000661{
pbrooka7812ae2008-11-17 14:43:54 +0000662 TCGv_i32 t0 = tcg_const_i32(arg2);
bellarde8996ee2008-05-23 17:33:39 +0000663 tcg_gen_mul_i32(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000664 tcg_temp_free_i32(t0);
thsf730fd22008-05-04 08:14:08 +0000665}
666
pbrooka7812ae2008-11-17 14:43:54 +0000667static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000668{
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700669 if (TCG_TARGET_HAS_div_i32) {
670 tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2);
671 } else if (TCG_TARGET_HAS_div2_i32) {
672 TCGv_i32 t0 = tcg_temp_new_i32();
673 tcg_gen_sari_i32(t0, arg1, 31);
674 tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
675 tcg_temp_free_i32(t0);
676 } else {
677 int sizemask = 0;
678 /* Return value and both arguments are 32-bit and signed. */
679 sizemask |= tcg_gen_sizemask(0, 0, 1);
680 sizemask |= tcg_gen_sizemask(1, 0, 1);
681 sizemask |= tcg_gen_sizemask(2, 0, 1);
682 tcg_gen_helper32(tcg_helper_div_i32, sizemask, ret, arg1, arg2);
683 }
bellardc896fe22008-02-01 10:05:41 +0000684}
685
pbrooka7812ae2008-11-17 14:43:54 +0000686static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000687{
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700688 if (TCG_TARGET_HAS_div_i32) {
689 tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2);
690 } else if (TCG_TARGET_HAS_div2_i32) {
691 TCGv_i32 t0 = tcg_temp_new_i32();
692 tcg_gen_sari_i32(t0, arg1, 31);
693 tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
694 tcg_temp_free_i32(t0);
695 } else {
696 int sizemask = 0;
697 /* Return value and both arguments are 32-bit and signed. */
698 sizemask |= tcg_gen_sizemask(0, 0, 1);
699 sizemask |= tcg_gen_sizemask(1, 0, 1);
700 sizemask |= tcg_gen_sizemask(2, 0, 1);
701 tcg_gen_helper32(tcg_helper_rem_i32, sizemask, ret, arg1, arg2);
702 }
bellardc896fe22008-02-01 10:05:41 +0000703}
704
pbrooka7812ae2008-11-17 14:43:54 +0000705static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000706{
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700707 if (TCG_TARGET_HAS_div_i32) {
708 tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2);
709 } else if (TCG_TARGET_HAS_div2_i32) {
710 TCGv_i32 t0 = tcg_temp_new_i32();
711 tcg_gen_movi_i32(t0, 0);
712 tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
713 tcg_temp_free_i32(t0);
714 } else {
715 int sizemask = 0;
716 /* Return value and both arguments are 32-bit and unsigned. */
717 sizemask |= tcg_gen_sizemask(0, 0, 0);
718 sizemask |= tcg_gen_sizemask(1, 0, 0);
719 sizemask |= tcg_gen_sizemask(2, 0, 0);
720 tcg_gen_helper32(tcg_helper_divu_i32, sizemask, ret, arg1, arg2);
721 }
bellardc896fe22008-02-01 10:05:41 +0000722}
723
pbrooka7812ae2008-11-17 14:43:54 +0000724static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
bellardc896fe22008-02-01 10:05:41 +0000725{
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700726 if (TCG_TARGET_HAS_div_i32) {
727 tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2);
728 } else if (TCG_TARGET_HAS_div2_i32) {
729 TCGv_i32 t0 = tcg_temp_new_i32();
730 tcg_gen_movi_i32(t0, 0);
731 tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
732 tcg_temp_free_i32(t0);
733 } else {
734 int sizemask = 0;
735 /* Return value and both arguments are 32-bit and unsigned. */
736 sizemask |= tcg_gen_sizemask(0, 0, 0);
737 sizemask |= tcg_gen_sizemask(1, 0, 0);
738 sizemask |= tcg_gen_sizemask(2, 0, 0);
739 tcg_gen_helper32(tcg_helper_remu_i32, sizemask, ret, arg1, arg2);
740 }
bellardc896fe22008-02-01 10:05:41 +0000741}
bellardc896fe22008-02-01 10:05:41 +0000742
743#if TCG_TARGET_REG_BITS == 32
744
pbrooka7812ae2008-11-17 14:43:54 +0000745static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +0000746{
aurel32fe75bcf2009-03-10 08:57:16 +0000747 if (!TCGV_EQUAL_I64(ret, arg)) {
pbrooka7812ae2008-11-17 14:43:54 +0000748 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
blueswir14d072722008-05-03 20:52:26 +0000749 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
750 }
bellardc896fe22008-02-01 10:05:41 +0000751}
752
pbrooka7812ae2008-11-17 14:43:54 +0000753static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
bellardc896fe22008-02-01 10:05:41 +0000754{
pbrooka7812ae2008-11-17 14:43:54 +0000755 tcg_gen_movi_i32(TCGV_LOW(ret), arg);
pbrookac56dd42008-02-03 19:56:33 +0000756 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
bellardc896fe22008-02-01 10:05:41 +0000757}
758
pbrooka7812ae2008-11-17 14:43:54 +0000759static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
760 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000761{
pbrooka7812ae2008-11-17 14:43:54 +0000762 tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
pbrookac56dd42008-02-03 19:56:33 +0000763 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +0000764}
765
pbrooka7812ae2008-11-17 14:43:54 +0000766static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
767 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000768{
pbrooka7812ae2008-11-17 14:43:54 +0000769 tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
770 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
bellardc896fe22008-02-01 10:05:41 +0000771}
772
pbrooka7812ae2008-11-17 14:43:54 +0000773static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
774 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000775{
aurel32a7477232009-02-09 20:43:53 +0000776 tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
pbrookac56dd42008-02-03 19:56:33 +0000777 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +0000778}
779
pbrooka7812ae2008-11-17 14:43:54 +0000780static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
781 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000782{
pbrooka7812ae2008-11-17 14:43:54 +0000783 tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
784 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +0000785}
786
pbrooka7812ae2008-11-17 14:43:54 +0000787static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
788 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000789{
pbrooka7812ae2008-11-17 14:43:54 +0000790 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
pbrookac56dd42008-02-03 19:56:33 +0000791 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +0000792}
793
pbrooka7812ae2008-11-17 14:43:54 +0000794static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
795 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000796{
pbrooka7812ae2008-11-17 14:43:54 +0000797 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
798 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +0000799}
800
pbrooka7812ae2008-11-17 14:43:54 +0000801static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
802 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000803{
804 /* since arg2 and ret have different types, they cannot be the
805 same temporary */
806#ifdef TCG_TARGET_WORDS_BIGENDIAN
pbrookac56dd42008-02-03 19:56:33 +0000807 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
pbrooka7812ae2008-11-17 14:43:54 +0000808 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
bellardc896fe22008-02-01 10:05:41 +0000809#else
pbrooka7812ae2008-11-17 14:43:54 +0000810 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
pbrookac56dd42008-02-03 19:56:33 +0000811 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
bellardc896fe22008-02-01 10:05:41 +0000812#endif
813}
814
pbrooka7812ae2008-11-17 14:43:54 +0000815static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
816 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000817{
pbrooka7812ae2008-11-17 14:43:54 +0000818 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000819}
820
pbrooka7812ae2008-11-17 14:43:54 +0000821static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
822 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000823{
pbrooka7812ae2008-11-17 14:43:54 +0000824 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000825}
826
pbrooka7812ae2008-11-17 14:43:54 +0000827static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
828 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000829{
pbrooka7812ae2008-11-17 14:43:54 +0000830 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
bellardc896fe22008-02-01 10:05:41 +0000831}
832
pbrooka7812ae2008-11-17 14:43:54 +0000833static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
834 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +0000835{
836#ifdef TCG_TARGET_WORDS_BIGENDIAN
pbrookac56dd42008-02-03 19:56:33 +0000837 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
pbrooka7812ae2008-11-17 14:43:54 +0000838 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
bellardc896fe22008-02-01 10:05:41 +0000839#else
pbrooka7812ae2008-11-17 14:43:54 +0000840 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
pbrookac56dd42008-02-03 19:56:33 +0000841 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
bellardc896fe22008-02-01 10:05:41 +0000842#endif
843}
844
pbrooka7812ae2008-11-17 14:43:54 +0000845static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000846{
pbrooka7812ae2008-11-17 14:43:54 +0000847 tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
848 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
849 TCGV_HIGH(arg2));
bellardc896fe22008-02-01 10:05:41 +0000850}
851
pbrooka7812ae2008-11-17 14:43:54 +0000852static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000853{
pbrooka7812ae2008-11-17 14:43:54 +0000854 tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
855 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
856 TCGV_HIGH(arg2));
bellardc896fe22008-02-01 10:05:41 +0000857}
858
pbrooka7812ae2008-11-17 14:43:54 +0000859static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000860{
pbrooka7812ae2008-11-17 14:43:54 +0000861 tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
pbrookac56dd42008-02-03 19:56:33 +0000862 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
bellardc896fe22008-02-01 10:05:41 +0000863}
864
pbrooka7812ae2008-11-17 14:43:54 +0000865static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000866{
aurel32e5105082009-03-11 02:57:30 +0000867 tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
868 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
bellardc896fe22008-02-01 10:05:41 +0000869}
870
pbrooka7812ae2008-11-17 14:43:54 +0000871static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000872{
aurel32e5105082009-03-11 02:57:30 +0000873 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
874 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
bellardc896fe22008-02-01 10:05:41 +0000875}
876
pbrooka7812ae2008-11-17 14:43:54 +0000877static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000878{
pbrooka7812ae2008-11-17 14:43:54 +0000879 tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
pbrookac56dd42008-02-03 19:56:33 +0000880 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
bellardc896fe22008-02-01 10:05:41 +0000881}
882
pbrooka7812ae2008-11-17 14:43:54 +0000883static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000884{
aurel32e5105082009-03-11 02:57:30 +0000885 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
886 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
bellardc896fe22008-02-01 10:05:41 +0000887}
888
pbrooka7812ae2008-11-17 14:43:54 +0000889static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000890{
pbrooka7812ae2008-11-17 14:43:54 +0000891 tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
pbrookac56dd42008-02-03 19:56:33 +0000892 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
bellardc896fe22008-02-01 10:05:41 +0000893}
894
895/* XXX: use generic code when basic block handling is OK or CPU
896 specific code (x86) */
pbrooka7812ae2008-11-17 14:43:54 +0000897static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000898{
Richard Henderson2bece2c2010-06-14 17:35:27 -0700899 int sizemask = 0;
900 /* Return value and both arguments are 64-bit and signed. */
901 sizemask |= tcg_gen_sizemask(0, 1, 1);
902 sizemask |= tcg_gen_sizemask(1, 1, 1);
903 sizemask |= tcg_gen_sizemask(2, 1, 1);
904
905 tcg_gen_helper64(tcg_helper_shl_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000906}
907
pbrooka7812ae2008-11-17 14:43:54 +0000908static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000909{
910 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
911}
912
pbrooka7812ae2008-11-17 14:43:54 +0000913static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000914{
Richard Henderson2bece2c2010-06-14 17:35:27 -0700915 int sizemask = 0;
916 /* Return value and both arguments are 64-bit and signed. */
917 sizemask |= tcg_gen_sizemask(0, 1, 1);
918 sizemask |= tcg_gen_sizemask(1, 1, 1);
919 sizemask |= tcg_gen_sizemask(2, 1, 1);
920
921 tcg_gen_helper64(tcg_helper_shr_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000922}
923
pbrooka7812ae2008-11-17 14:43:54 +0000924static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000925{
926 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
927}
928
pbrooka7812ae2008-11-17 14:43:54 +0000929static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000930{
Richard Henderson2bece2c2010-06-14 17:35:27 -0700931 int sizemask = 0;
932 /* Return value and both arguments are 64-bit and signed. */
933 sizemask |= tcg_gen_sizemask(0, 1, 1);
934 sizemask |= tcg_gen_sizemask(1, 1, 1);
935 sizemask |= tcg_gen_sizemask(2, 1, 1);
936
937 tcg_gen_helper64(tcg_helper_sar_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000938}
939
pbrooka7812ae2008-11-17 14:43:54 +0000940static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +0000941{
942 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
943}
944
Richard Henderson8a56e842010-03-19 11:26:05 -0700945static inline void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1,
946 TCGv_i64 arg2, int label_index)
bellardc896fe22008-02-01 10:05:41 +0000947{
pbrooka7812ae2008-11-17 14:43:54 +0000948 tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
949 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
950 TCGV_HIGH(arg2), cond, label_index);
bellardc896fe22008-02-01 10:05:41 +0000951}
952
Richard Henderson8a56e842010-03-19 11:26:05 -0700953static inline void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
Aurelien Jarno5105c552010-02-08 12:10:15 +0100954 TCGv_i64 arg1, TCGv_i64 arg2)
955{
956 tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
957 TCGV_LOW(arg1), TCGV_HIGH(arg1),
958 TCGV_LOW(arg2), TCGV_HIGH(arg2), cond);
959 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
960}
961
pbrooka7812ae2008-11-17 14:43:54 +0000962static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000963{
pbrooka7812ae2008-11-17 14:43:54 +0000964 TCGv_i64 t0;
965 TCGv_i32 t1;
bellardc896fe22008-02-01 10:05:41 +0000966
pbrooka7812ae2008-11-17 14:43:54 +0000967 t0 = tcg_temp_new_i64();
968 t1 = tcg_temp_new_i32();
969
970 tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0),
971 TCGV_LOW(arg1), TCGV_LOW(arg2));
972
973 tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2));
pbrookac56dd42008-02-03 19:56:33 +0000974 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
pbrooka7812ae2008-11-17 14:43:54 +0000975 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2));
pbrookac56dd42008-02-03 19:56:33 +0000976 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
pbrooka7812ae2008-11-17 14:43:54 +0000977
bellardc896fe22008-02-01 10:05:41 +0000978 tcg_gen_mov_i64(ret, t0);
pbrooka7812ae2008-11-17 14:43:54 +0000979 tcg_temp_free_i64(t0);
980 tcg_temp_free_i32(t1);
bellardc896fe22008-02-01 10:05:41 +0000981}
982
pbrooka7812ae2008-11-17 14:43:54 +0000983static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000984{
Richard Henderson2bece2c2010-06-14 17:35:27 -0700985 int sizemask = 0;
986 /* Return value and both arguments are 64-bit and signed. */
987 sizemask |= tcg_gen_sizemask(0, 1, 1);
988 sizemask |= tcg_gen_sizemask(1, 1, 1);
989 sizemask |= tcg_gen_sizemask(2, 1, 1);
990
991 tcg_gen_helper64(tcg_helper_div_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +0000992}
993
pbrooka7812ae2008-11-17 14:43:54 +0000994static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +0000995{
Richard Henderson2bece2c2010-06-14 17:35:27 -0700996 int sizemask = 0;
997 /* Return value and both arguments are 64-bit and signed. */
998 sizemask |= tcg_gen_sizemask(0, 1, 1);
999 sizemask |= tcg_gen_sizemask(1, 1, 1);
1000 sizemask |= tcg_gen_sizemask(2, 1, 1);
1001
1002 tcg_gen_helper64(tcg_helper_rem_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001003}
1004
pbrooka7812ae2008-11-17 14:43:54 +00001005static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001006{
Richard Henderson2bece2c2010-06-14 17:35:27 -07001007 int sizemask = 0;
1008 /* Return value and both arguments are 64-bit and unsigned. */
1009 sizemask |= tcg_gen_sizemask(0, 1, 0);
1010 sizemask |= tcg_gen_sizemask(1, 1, 0);
1011 sizemask |= tcg_gen_sizemask(2, 1, 0);
1012
1013 tcg_gen_helper64(tcg_helper_divu_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001014}
1015
pbrooka7812ae2008-11-17 14:43:54 +00001016static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001017{
Richard Henderson2bece2c2010-06-14 17:35:27 -07001018 int sizemask = 0;
1019 /* Return value and both arguments are 64-bit and unsigned. */
1020 sizemask |= tcg_gen_sizemask(0, 1, 0);
1021 sizemask |= tcg_gen_sizemask(1, 1, 0);
1022 sizemask |= tcg_gen_sizemask(2, 1, 0);
1023
1024 tcg_gen_helper64(tcg_helper_remu_i64, sizemask, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001025}
1026
1027#else
1028
pbrooka7812ae2008-11-17 14:43:54 +00001029static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001030{
aurel32fe75bcf2009-03-10 08:57:16 +00001031 if (!TCGV_EQUAL_I64(ret, arg))
pbrooka7812ae2008-11-17 14:43:54 +00001032 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
bellardc896fe22008-02-01 10:05:41 +00001033}
1034
pbrooka7812ae2008-11-17 14:43:54 +00001035static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
bellardc896fe22008-02-01 10:05:41 +00001036{
pbrooka7812ae2008-11-17 14:43:54 +00001037 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
bellardc896fe22008-02-01 10:05:41 +00001038}
1039
Peter Maydell6bd4b082011-05-27 13:12:12 +01001040static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001041 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001042{
pbrooka7812ae2008-11-17 14:43:54 +00001043 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001044}
1045
Peter Maydell6bd4b082011-05-27 13:12:12 +01001046static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001047 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001048{
pbrooka7812ae2008-11-17 14:43:54 +00001049 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001050}
1051
Peter Maydell6bd4b082011-05-27 13:12:12 +01001052static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001053 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001054{
pbrooka7812ae2008-11-17 14:43:54 +00001055 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001056}
1057
Peter Maydell6bd4b082011-05-27 13:12:12 +01001058static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001059 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001060{
pbrooka7812ae2008-11-17 14:43:54 +00001061 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001062}
1063
Peter Maydell6bd4b082011-05-27 13:12:12 +01001064static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001065 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001066{
pbrooka7812ae2008-11-17 14:43:54 +00001067 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001068}
1069
Peter Maydell6bd4b082011-05-27 13:12:12 +01001070static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001071 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001072{
pbrooka7812ae2008-11-17 14:43:54 +00001073 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001074}
1075
Peter Maydell6bd4b082011-05-27 13:12:12 +01001076static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001077{
pbrooka7812ae2008-11-17 14:43:54 +00001078 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001079}
1080
Peter Maydell6bd4b082011-05-27 13:12:12 +01001081static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001082 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001083{
pbrooka7812ae2008-11-17 14:43:54 +00001084 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001085}
1086
Peter Maydell6bd4b082011-05-27 13:12:12 +01001087static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001088 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001089{
pbrooka7812ae2008-11-17 14:43:54 +00001090 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001091}
1092
Peter Maydell6bd4b082011-05-27 13:12:12 +01001093static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
pbrookac56dd42008-02-03 19:56:33 +00001094 tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001095{
pbrooka7812ae2008-11-17 14:43:54 +00001096 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001097}
1098
Peter Maydell6bd4b082011-05-27 13:12:12 +01001099static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset)
bellardc896fe22008-02-01 10:05:41 +00001100{
pbrooka7812ae2008-11-17 14:43:54 +00001101 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
bellardc896fe22008-02-01 10:05:41 +00001102}
1103
pbrooka7812ae2008-11-17 14:43:54 +00001104static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001105{
pbrooka7812ae2008-11-17 14:43:54 +00001106 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001107}
1108
pbrooka7812ae2008-11-17 14:43:54 +00001109static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001110{
pbrooka7812ae2008-11-17 14:43:54 +00001111 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001112}
1113
pbrooka7812ae2008-11-17 14:43:54 +00001114static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001115{
aurel327fc81052009-03-10 19:37:39 +00001116 if (TCGV_EQUAL_I64(arg1, arg2)) {
1117 tcg_gen_mov_i64(ret, arg1);
1118 } else {
1119 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
1120 }
bellardc896fe22008-02-01 10:05:41 +00001121}
1122
pbrooka7812ae2008-11-17 14:43:54 +00001123static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001124{
pbrooka7812ae2008-11-17 14:43:54 +00001125 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001126 tcg_gen_and_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001127 tcg_temp_free_i64(t0);
bellardc896fe22008-02-01 10:05:41 +00001128}
1129
pbrooka7812ae2008-11-17 14:43:54 +00001130static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001131{
aurel327fc81052009-03-10 19:37:39 +00001132 if (TCGV_EQUAL_I64(arg1, arg2)) {
1133 tcg_gen_mov_i64(ret, arg1);
1134 } else {
1135 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
1136 }
bellardc896fe22008-02-01 10:05:41 +00001137}
1138
pbrooka7812ae2008-11-17 14:43:54 +00001139static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001140{
pbrooka7812ae2008-11-17 14:43:54 +00001141 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001142 tcg_gen_or_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001143 tcg_temp_free_i64(t0);
bellardc896fe22008-02-01 10:05:41 +00001144}
1145
pbrooka7812ae2008-11-17 14:43:54 +00001146static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001147{
aurel327fc81052009-03-10 19:37:39 +00001148 if (TCGV_EQUAL_I64(arg1, arg2)) {
1149 tcg_gen_movi_i64(ret, 0);
1150 } else {
1151 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
1152 }
bellardc896fe22008-02-01 10:05:41 +00001153}
1154
pbrooka7812ae2008-11-17 14:43:54 +00001155static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001156{
pbrooka7812ae2008-11-17 14:43:54 +00001157 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001158 tcg_gen_xor_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001159 tcg_temp_free_i64(t0);
bellardc896fe22008-02-01 10:05:41 +00001160}
1161
pbrooka7812ae2008-11-17 14:43:54 +00001162static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001163{
pbrooka7812ae2008-11-17 14:43:54 +00001164 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001165}
1166
pbrooka7812ae2008-11-17 14:43:54 +00001167static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001168{
bellard34151a22008-05-22 13:25:14 +00001169 if (arg2 == 0) {
1170 tcg_gen_mov_i64(ret, arg1);
1171 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001172 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001173 tcg_gen_shl_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001174 tcg_temp_free_i64(t0);
bellard34151a22008-05-22 13:25:14 +00001175 }
bellardc896fe22008-02-01 10:05:41 +00001176}
1177
pbrooka7812ae2008-11-17 14:43:54 +00001178static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001179{
pbrooka7812ae2008-11-17 14:43:54 +00001180 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001181}
1182
pbrooka7812ae2008-11-17 14:43:54 +00001183static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001184{
bellard34151a22008-05-22 13:25:14 +00001185 if (arg2 == 0) {
1186 tcg_gen_mov_i64(ret, arg1);
1187 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001188 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001189 tcg_gen_shr_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001190 tcg_temp_free_i64(t0);
bellard34151a22008-05-22 13:25:14 +00001191 }
bellardc896fe22008-02-01 10:05:41 +00001192}
1193
pbrooka7812ae2008-11-17 14:43:54 +00001194static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001195{
pbrooka7812ae2008-11-17 14:43:54 +00001196 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001197}
1198
pbrooka7812ae2008-11-17 14:43:54 +00001199static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
bellardc896fe22008-02-01 10:05:41 +00001200{
bellard34151a22008-05-22 13:25:14 +00001201 if (arg2 == 0) {
1202 tcg_gen_mov_i64(ret, arg1);
1203 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001204 TCGv_i64 t0 = tcg_const_i64(arg2);
bellarde8996ee2008-05-23 17:33:39 +00001205 tcg_gen_sar_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001206 tcg_temp_free_i64(t0);
bellard34151a22008-05-22 13:25:14 +00001207 }
bellardc896fe22008-02-01 10:05:41 +00001208}
1209
Richard Henderson8a56e842010-03-19 11:26:05 -07001210static inline void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1,
1211 TCGv_i64 arg2, int label_index)
bellardc896fe22008-02-01 10:05:41 +00001212{
pbrooka7812ae2008-11-17 14:43:54 +00001213 tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
bellardc896fe22008-02-01 10:05:41 +00001214}
1215
Richard Henderson8a56e842010-03-19 11:26:05 -07001216static inline void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
Aurelien Jarno5105c552010-02-08 12:10:15 +01001217 TCGv_i64 arg1, TCGv_i64 arg2)
1218{
1219 tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond);
1220}
1221
pbrooka7812ae2008-11-17 14:43:54 +00001222static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001223{
pbrooka7812ae2008-11-17 14:43:54 +00001224 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
bellardc896fe22008-02-01 10:05:41 +00001225}
1226
pbrooka7812ae2008-11-17 14:43:54 +00001227static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001228{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001229 if (TCG_TARGET_HAS_div_i64) {
1230 tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2);
1231 } else if (TCG_TARGET_HAS_div2_i64) {
1232 TCGv_i64 t0 = tcg_temp_new_i64();
1233 tcg_gen_sari_i64(t0, arg1, 63);
1234 tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
1235 tcg_temp_free_i64(t0);
1236 } else {
1237 int sizemask = 0;
1238 /* Return value and both arguments are 64-bit and signed. */
1239 sizemask |= tcg_gen_sizemask(0, 1, 1);
1240 sizemask |= tcg_gen_sizemask(1, 1, 1);
1241 sizemask |= tcg_gen_sizemask(2, 1, 1);
1242 tcg_gen_helper64(tcg_helper_div_i64, sizemask, ret, arg1, arg2);
1243 }
bellardc896fe22008-02-01 10:05:41 +00001244}
1245
pbrooka7812ae2008-11-17 14:43:54 +00001246static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001247{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001248 if (TCG_TARGET_HAS_div_i64) {
1249 tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2);
1250 } else if (TCG_TARGET_HAS_div2_i64) {
1251 TCGv_i64 t0 = tcg_temp_new_i64();
1252 tcg_gen_sari_i64(t0, arg1, 63);
1253 tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
1254 tcg_temp_free_i64(t0);
1255 } else {
1256 int sizemask = 0;
1257 /* Return value and both arguments are 64-bit and signed. */
1258 sizemask |= tcg_gen_sizemask(0, 1, 1);
1259 sizemask |= tcg_gen_sizemask(1, 1, 1);
1260 sizemask |= tcg_gen_sizemask(2, 1, 1);
1261 tcg_gen_helper64(tcg_helper_rem_i64, sizemask, ret, arg1, arg2);
1262 }
bellardc896fe22008-02-01 10:05:41 +00001263}
1264
pbrooka7812ae2008-11-17 14:43:54 +00001265static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001266{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001267 if (TCG_TARGET_HAS_div_i64) {
1268 tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2);
1269 } else if (TCG_TARGET_HAS_div2_i64) {
1270 TCGv_i64 t0 = tcg_temp_new_i64();
1271 tcg_gen_movi_i64(t0, 0);
1272 tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
1273 tcg_temp_free_i64(t0);
1274 } else {
1275 int sizemask = 0;
1276 /* Return value and both arguments are 64-bit and unsigned. */
1277 sizemask |= tcg_gen_sizemask(0, 1, 0);
1278 sizemask |= tcg_gen_sizemask(1, 1, 0);
1279 sizemask |= tcg_gen_sizemask(2, 1, 0);
1280 tcg_gen_helper64(tcg_helper_divu_i64, sizemask, ret, arg1, arg2);
1281 }
bellardc896fe22008-02-01 10:05:41 +00001282}
1283
pbrooka7812ae2008-11-17 14:43:54 +00001284static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
bellardc896fe22008-02-01 10:05:41 +00001285{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001286 if (TCG_TARGET_HAS_div_i64) {
1287 tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2);
1288 } else if (TCG_TARGET_HAS_div2_i64) {
1289 TCGv_i64 t0 = tcg_temp_new_i64();
1290 tcg_gen_movi_i64(t0, 0);
1291 tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
1292 tcg_temp_free_i64(t0);
1293 } else {
1294 int sizemask = 0;
1295 /* Return value and both arguments are 64-bit and unsigned. */
1296 sizemask |= tcg_gen_sizemask(0, 1, 0);
1297 sizemask |= tcg_gen_sizemask(1, 1, 0);
1298 sizemask |= tcg_gen_sizemask(2, 1, 0);
1299 tcg_gen_helper64(tcg_helper_remu_i64, sizemask, ret, arg1, arg2);
1300 }
bellardc896fe22008-02-01 10:05:41 +00001301}
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001302#endif /* TCG_TARGET_REG_BITS == 32 */
bellardc896fe22008-02-01 10:05:41 +00001303
pbrooka7812ae2008-11-17 14:43:54 +00001304static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
aurel3263597062008-11-02 08:22:54 +00001305{
1306 /* some cases can be optimized here */
1307 if (arg2 == 0) {
1308 tcg_gen_mov_i64(ret, arg1);
1309 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001310 TCGv_i64 t0 = tcg_const_i64(arg2);
aurel3263597062008-11-02 08:22:54 +00001311 tcg_gen_add_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001312 tcg_temp_free_i64(t0);
aurel3263597062008-11-02 08:22:54 +00001313 }
1314}
1315
pbrooka7812ae2008-11-17 14:43:54 +00001316static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
aurel3200457342008-11-02 08:23:04 +00001317{
pbrooka7812ae2008-11-17 14:43:54 +00001318 TCGv_i64 t0 = tcg_const_i64(arg1);
aurel3200457342008-11-02 08:23:04 +00001319 tcg_gen_sub_i64(ret, t0, arg2);
pbrooka7812ae2008-11-17 14:43:54 +00001320 tcg_temp_free_i64(t0);
aurel3200457342008-11-02 08:23:04 +00001321}
1322
pbrooka7812ae2008-11-17 14:43:54 +00001323static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
aurel3263597062008-11-02 08:22:54 +00001324{
1325 /* some cases can be optimized here */
1326 if (arg2 == 0) {
1327 tcg_gen_mov_i64(ret, arg1);
1328 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001329 TCGv_i64 t0 = tcg_const_i64(arg2);
aurel3263597062008-11-02 08:22:54 +00001330 tcg_gen_sub_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001331 tcg_temp_free_i64(t0);
aurel3263597062008-11-02 08:22:54 +00001332 }
1333}
Richard Henderson8a56e842010-03-19 11:26:05 -07001334static inline void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1,
1335 int64_t arg2, int label_index)
aurel32f02bb952008-11-03 07:08:26 +00001336{
pbrooka7812ae2008-11-17 14:43:54 +00001337 TCGv_i64 t0 = tcg_const_i64(arg2);
aurel32f02bb952008-11-03 07:08:26 +00001338 tcg_gen_brcond_i64(cond, arg1, t0, label_index);
pbrooka7812ae2008-11-17 14:43:54 +00001339 tcg_temp_free_i64(t0);
aurel32f02bb952008-11-03 07:08:26 +00001340}
1341
Richard Henderson8a56e842010-03-19 11:26:05 -07001342static inline void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
1343 TCGv_i64 arg1, int64_t arg2)
Aurelien Jarno5105c552010-02-08 12:10:15 +01001344{
1345 TCGv_i64 t0 = tcg_const_i64(arg2);
1346 tcg_gen_setcond_i64(cond, ret, arg1, t0);
1347 tcg_temp_free_i64(t0);
1348}
1349
pbrooka7812ae2008-11-17 14:43:54 +00001350static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
aurel32f02bb952008-11-03 07:08:26 +00001351{
pbrooka7812ae2008-11-17 14:43:54 +00001352 TCGv_i64 t0 = tcg_const_i64(arg2);
aurel32f02bb952008-11-03 07:08:26 +00001353 tcg_gen_mul_i64(ret, arg1, t0);
pbrooka7812ae2008-11-17 14:43:54 +00001354 tcg_temp_free_i64(t0);
aurel32f02bb952008-11-03 07:08:26 +00001355}
1356
aurel3263597062008-11-02 08:22:54 +00001357
bellardc896fe22008-02-01 10:05:41 +00001358/***************************************/
1359/* optional operations */
1360
pbrooka7812ae2008-11-17 14:43:54 +00001361static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001362{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001363 if (TCG_TARGET_HAS_ext8s_i32) {
1364 tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg);
1365 } else {
1366 tcg_gen_shli_i32(ret, arg, 24);
1367 tcg_gen_sari_i32(ret, ret, 24);
1368 }
bellardc896fe22008-02-01 10:05:41 +00001369}
1370
pbrooka7812ae2008-11-17 14:43:54 +00001371static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001372{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001373 if (TCG_TARGET_HAS_ext16s_i32) {
1374 tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg);
1375 } else {
1376 tcg_gen_shli_i32(ret, arg, 16);
1377 tcg_gen_sari_i32(ret, ret, 16);
1378 }
bellardc896fe22008-02-01 10:05:41 +00001379}
1380
pbrooka7812ae2008-11-17 14:43:54 +00001381static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
pbrook86831432008-05-11 12:22:01 +00001382{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001383 if (TCG_TARGET_HAS_ext8u_i32) {
1384 tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg);
1385 } else {
1386 tcg_gen_andi_i32(ret, arg, 0xffu);
1387 }
pbrook86831432008-05-11 12:22:01 +00001388}
1389
pbrooka7812ae2008-11-17 14:43:54 +00001390static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
pbrook86831432008-05-11 12:22:01 +00001391{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001392 if (TCG_TARGET_HAS_ext16u_i32) {
1393 tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg);
1394 } else {
1395 tcg_gen_andi_i32(ret, arg, 0xffffu);
1396 }
pbrook86831432008-05-11 12:22:01 +00001397}
1398
bellardc896fe22008-02-01 10:05:41 +00001399/* Note: we assume the two high bytes are set to zero */
pbrooka7812ae2008-11-17 14:43:54 +00001400static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001401{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001402 if (TCG_TARGET_HAS_bswap16_i32) {
1403 tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg);
1404 } else {
1405 TCGv_i32 t0 = tcg_temp_new_i32();
bellardc896fe22008-02-01 10:05:41 +00001406
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001407 tcg_gen_ext8u_i32(t0, arg);
1408 tcg_gen_shli_i32(t0, t0, 8);
1409 tcg_gen_shri_i32(ret, arg, 8);
1410 tcg_gen_or_i32(ret, ret, t0);
1411 tcg_temp_free_i32(t0);
1412 }
bellardc896fe22008-02-01 10:05:41 +00001413}
1414
aurel3266896cb2009-03-13 09:34:48 +00001415static inline void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001416{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001417 if (TCG_TARGET_HAS_bswap32_i32) {
1418 tcg_gen_op2_i32(INDEX_op_bswap32_i32, ret, arg);
1419 } else {
1420 TCGv_i32 t0, t1;
1421 t0 = tcg_temp_new_i32();
1422 t1 = tcg_temp_new_i32();
bellardc896fe22008-02-01 10:05:41 +00001423
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001424 tcg_gen_shli_i32(t0, arg, 24);
bellardc896fe22008-02-01 10:05:41 +00001425
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001426 tcg_gen_andi_i32(t1, arg, 0x0000ff00);
1427 tcg_gen_shli_i32(t1, t1, 8);
1428 tcg_gen_or_i32(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001429
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001430 tcg_gen_shri_i32(t1, arg, 8);
1431 tcg_gen_andi_i32(t1, t1, 0x0000ff00);
1432 tcg_gen_or_i32(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001433
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001434 tcg_gen_shri_i32(t1, arg, 24);
1435 tcg_gen_or_i32(ret, t0, t1);
1436 tcg_temp_free_i32(t0);
1437 tcg_temp_free_i32(t1);
1438 }
bellardc896fe22008-02-01 10:05:41 +00001439}
1440
1441#if TCG_TARGET_REG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00001442static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001443{
pbrooka7812ae2008-11-17 14:43:54 +00001444 tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1445 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00001446}
1447
pbrooka7812ae2008-11-17 14:43:54 +00001448static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001449{
pbrooka7812ae2008-11-17 14:43:54 +00001450 tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1451 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00001452}
1453
pbrooka7812ae2008-11-17 14:43:54 +00001454static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001455{
pbrooka7812ae2008-11-17 14:43:54 +00001456 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1457 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00001458}
1459
pbrooka7812ae2008-11-17 14:43:54 +00001460static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001461{
pbrooka7812ae2008-11-17 14:43:54 +00001462 tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
pbrook86831432008-05-11 12:22:01 +00001463 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1464}
1465
pbrooka7812ae2008-11-17 14:43:54 +00001466static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001467{
pbrooka7812ae2008-11-17 14:43:54 +00001468 tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
pbrook86831432008-05-11 12:22:01 +00001469 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1470}
1471
pbrooka7812ae2008-11-17 14:43:54 +00001472static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001473{
pbrooka7812ae2008-11-17 14:43:54 +00001474 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
pbrook86831432008-05-11 12:22:01 +00001475 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1476}
1477
pbrooka7812ae2008-11-17 14:43:54 +00001478static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001479{
pbrooka7812ae2008-11-17 14:43:54 +00001480 tcg_gen_mov_i32(ret, TCGV_LOW(arg));
bellardc896fe22008-02-01 10:05:41 +00001481}
1482
pbrooka7812ae2008-11-17 14:43:54 +00001483static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001484{
pbrooka7812ae2008-11-17 14:43:54 +00001485 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
pbrookac56dd42008-02-03 19:56:33 +00001486 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +00001487}
1488
pbrooka7812ae2008-11-17 14:43:54 +00001489static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001490{
pbrooka7812ae2008-11-17 14:43:54 +00001491 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1492 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00001493}
1494
aurel329a5c57f2009-03-13 09:35:12 +00001495/* Note: we assume the six high bytes are set to zero */
1496static inline void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg)
1497{
1498 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
1499 tcg_gen_bswap16_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1500}
1501
1502/* Note: we assume the four high bytes are set to zero */
1503static inline void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
1504{
1505 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
1506 tcg_gen_bswap32_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1507}
1508
aurel3266896cb2009-03-13 09:34:48 +00001509static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001510{
pbrooka7812ae2008-11-17 14:43:54 +00001511 TCGv_i32 t0, t1;
1512 t0 = tcg_temp_new_i32();
1513 t1 = tcg_temp_new_i32();
bellardc896fe22008-02-01 10:05:41 +00001514
aurel3266896cb2009-03-13 09:34:48 +00001515 tcg_gen_bswap32_i32(t0, TCGV_LOW(arg));
1516 tcg_gen_bswap32_i32(t1, TCGV_HIGH(arg));
pbrooka7812ae2008-11-17 14:43:54 +00001517 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
pbrookac56dd42008-02-03 19:56:33 +00001518 tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
pbrooka7812ae2008-11-17 14:43:54 +00001519 tcg_temp_free_i32(t0);
1520 tcg_temp_free_i32(t1);
bellardc896fe22008-02-01 10:05:41 +00001521}
1522#else
1523
pbrooka7812ae2008-11-17 14:43:54 +00001524static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001525{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001526 if (TCG_TARGET_HAS_ext8s_i64) {
1527 tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg);
1528 } else {
1529 tcg_gen_shli_i64(ret, arg, 56);
1530 tcg_gen_sari_i64(ret, ret, 56);
1531 }
bellardc896fe22008-02-01 10:05:41 +00001532}
1533
pbrooka7812ae2008-11-17 14:43:54 +00001534static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001535{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001536 if (TCG_TARGET_HAS_ext16s_i64) {
1537 tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg);
1538 } else {
1539 tcg_gen_shli_i64(ret, arg, 48);
1540 tcg_gen_sari_i64(ret, ret, 48);
1541 }
bellardc896fe22008-02-01 10:05:41 +00001542}
1543
pbrooka7812ae2008-11-17 14:43:54 +00001544static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001545{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001546 if (TCG_TARGET_HAS_ext32s_i64) {
1547 tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg);
1548 } else {
1549 tcg_gen_shli_i64(ret, arg, 32);
1550 tcg_gen_sari_i64(ret, ret, 32);
1551 }
bellardc896fe22008-02-01 10:05:41 +00001552}
1553
pbrooka7812ae2008-11-17 14:43:54 +00001554static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001555{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001556 if (TCG_TARGET_HAS_ext8u_i64) {
1557 tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg);
1558 } else {
1559 tcg_gen_andi_i64(ret, arg, 0xffu);
1560 }
pbrook86831432008-05-11 12:22:01 +00001561}
1562
pbrooka7812ae2008-11-17 14:43:54 +00001563static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001564{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001565 if (TCG_TARGET_HAS_ext16u_i64) {
1566 tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg);
1567 } else {
1568 tcg_gen_andi_i64(ret, arg, 0xffffu);
1569 }
pbrook86831432008-05-11 12:22:01 +00001570}
1571
pbrooka7812ae2008-11-17 14:43:54 +00001572static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook86831432008-05-11 12:22:01 +00001573{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001574 if (TCG_TARGET_HAS_ext32u_i64) {
1575 tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg);
1576 } else {
1577 tcg_gen_andi_i64(ret, arg, 0xffffffffu);
1578 }
pbrook86831432008-05-11 12:22:01 +00001579}
1580
bellardc896fe22008-02-01 10:05:41 +00001581/* Note: we assume the target supports move between 32 and 64 bit
pbrookac56dd42008-02-03 19:56:33 +00001582 registers. This will probably break MIPS64 targets. */
pbrooka7812ae2008-11-17 14:43:54 +00001583static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001584{
pbrooka7812ae2008-11-17 14:43:54 +00001585 tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
bellardc896fe22008-02-01 10:05:41 +00001586}
1587
1588/* Note: we assume the target supports move between 32 and 64 bit
1589 registers */
pbrooka7812ae2008-11-17 14:43:54 +00001590static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001591{
Aurelien Jarnocfc86982009-09-30 23:09:35 +02001592 tcg_gen_ext32u_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
bellardc896fe22008-02-01 10:05:41 +00001593}
1594
1595/* Note: we assume the target supports move between 32 and 64 bit
1596 registers */
pbrooka7812ae2008-11-17 14:43:54 +00001597static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
bellardc896fe22008-02-01 10:05:41 +00001598{
pbrooka7812ae2008-11-17 14:43:54 +00001599 tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
bellardc896fe22008-02-01 10:05:41 +00001600}
1601
aurel329a5c57f2009-03-13 09:35:12 +00001602/* Note: we assume the six high bytes are set to zero */
1603static inline void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg)
1604{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001605 if (TCG_TARGET_HAS_bswap16_i64) {
1606 tcg_gen_op2_i64(INDEX_op_bswap16_i64, ret, arg);
1607 } else {
1608 TCGv_i64 t0 = tcg_temp_new_i64();
aurel329a5c57f2009-03-13 09:35:12 +00001609
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001610 tcg_gen_ext8u_i64(t0, arg);
1611 tcg_gen_shli_i64(t0, t0, 8);
1612 tcg_gen_shri_i64(ret, arg, 8);
1613 tcg_gen_or_i64(ret, ret, t0);
1614 tcg_temp_free_i64(t0);
1615 }
aurel329a5c57f2009-03-13 09:35:12 +00001616}
1617
1618/* Note: we assume the four high bytes are set to zero */
1619static inline void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
1620{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001621 if (TCG_TARGET_HAS_bswap32_i64) {
1622 tcg_gen_op2_i64(INDEX_op_bswap32_i64, ret, arg);
1623 } else {
1624 TCGv_i64 t0, t1;
1625 t0 = tcg_temp_new_i64();
1626 t1 = tcg_temp_new_i64();
aurel329a5c57f2009-03-13 09:35:12 +00001627
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001628 tcg_gen_shli_i64(t0, arg, 24);
1629 tcg_gen_ext32u_i64(t0, t0);
aurel329a5c57f2009-03-13 09:35:12 +00001630
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001631 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1632 tcg_gen_shli_i64(t1, t1, 8);
1633 tcg_gen_or_i64(t0, t0, t1);
aurel329a5c57f2009-03-13 09:35:12 +00001634
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001635 tcg_gen_shri_i64(t1, arg, 8);
1636 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1637 tcg_gen_or_i64(t0, t0, t1);
aurel329a5c57f2009-03-13 09:35:12 +00001638
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001639 tcg_gen_shri_i64(t1, arg, 24);
1640 tcg_gen_or_i64(ret, t0, t1);
1641 tcg_temp_free_i64(t0);
1642 tcg_temp_free_i64(t1);
1643 }
aurel329a5c57f2009-03-13 09:35:12 +00001644}
1645
aurel3266896cb2009-03-13 09:34:48 +00001646static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
bellardc896fe22008-02-01 10:05:41 +00001647{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001648 if (TCG_TARGET_HAS_bswap64_i64) {
1649 tcg_gen_op2_i64(INDEX_op_bswap64_i64, ret, arg);
1650 } else {
1651 TCGv_i64 t0 = tcg_temp_new_i64();
1652 TCGv_i64 t1 = tcg_temp_new_i64();
bellardc896fe22008-02-01 10:05:41 +00001653
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001654 tcg_gen_shli_i64(t0, arg, 56);
bellardc896fe22008-02-01 10:05:41 +00001655
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001656 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1657 tcg_gen_shli_i64(t1, t1, 40);
1658 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001659
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001660 tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1661 tcg_gen_shli_i64(t1, t1, 24);
1662 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001663
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001664 tcg_gen_andi_i64(t1, arg, 0xff000000);
1665 tcg_gen_shli_i64(t1, t1, 8);
1666 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001667
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001668 tcg_gen_shri_i64(t1, arg, 8);
1669 tcg_gen_andi_i64(t1, t1, 0xff000000);
1670 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001671
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001672 tcg_gen_shri_i64(t1, arg, 24);
1673 tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1674 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001675
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001676 tcg_gen_shri_i64(t1, arg, 40);
1677 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1678 tcg_gen_or_i64(t0, t0, t1);
bellardc896fe22008-02-01 10:05:41 +00001679
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001680 tcg_gen_shri_i64(t1, arg, 56);
1681 tcg_gen_or_i64(ret, t0, t1);
1682 tcg_temp_free_i64(t0);
1683 tcg_temp_free_i64(t1);
1684 }
bellardc896fe22008-02-01 10:05:41 +00001685}
1686
1687#endif
1688
pbrooka7812ae2008-11-17 14:43:54 +00001689static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
pbrook390efc52008-05-11 14:35:37 +00001690{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001691 if (TCG_TARGET_HAS_neg_i32) {
1692 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
1693 } else {
1694 TCGv_i32 t0 = tcg_const_i32(0);
1695 tcg_gen_sub_i32(ret, t0, arg);
1696 tcg_temp_free_i32(t0);
1697 }
pbrook390efc52008-05-11 14:35:37 +00001698}
1699
pbrooka7812ae2008-11-17 14:43:54 +00001700static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
pbrook390efc52008-05-11 14:35:37 +00001701{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001702 if (TCG_TARGET_HAS_neg_i64) {
1703 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
1704 } else {
1705 TCGv_i64 t0 = tcg_const_i64(0);
1706 tcg_gen_sub_i64(ret, t0, arg);
1707 tcg_temp_free_i64(t0);
1708 }
pbrook390efc52008-05-11 14:35:37 +00001709}
1710
pbrooka7812ae2008-11-17 14:43:54 +00001711static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
bellard0b6ce4c2008-05-17 12:40:44 +00001712{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001713 if (TCG_TARGET_HAS_not_i32) {
1714 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
1715 } else {
1716 tcg_gen_xori_i32(ret, arg, -1);
1717 }
bellard0b6ce4c2008-05-17 12:40:44 +00001718}
1719
pbrooka7812ae2008-11-17 14:43:54 +00001720static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
bellard0b6ce4c2008-05-17 12:40:44 +00001721{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001722#if TCG_TARGET_REG_BITS == 64
1723 if (TCG_TARGET_HAS_not_i64) {
1724 tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg);
1725 } else {
1726 tcg_gen_xori_i64(ret, arg, -1);
1727 }
1728#else
Richard Hendersona10f9f42010-03-19 12:44:47 -07001729 tcg_gen_not_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1730 tcg_gen_not_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
aurel32d2604282009-03-09 22:35:13 +00001731#endif
bellard0b6ce4c2008-05-17 12:40:44 +00001732}
bellard5ff9d6a2008-02-04 00:37:54 +00001733
pbrooka7812ae2008-11-17 14:43:54 +00001734static inline void tcg_gen_discard_i32(TCGv_i32 arg)
bellard5ff9d6a2008-02-04 00:37:54 +00001735{
pbrooka7812ae2008-11-17 14:43:54 +00001736 tcg_gen_op1_i32(INDEX_op_discard, arg);
bellard5ff9d6a2008-02-04 00:37:54 +00001737}
1738
pbrooka7812ae2008-11-17 14:43:54 +00001739static inline void tcg_gen_discard_i64(TCGv_i64 arg)
bellard5ff9d6a2008-02-04 00:37:54 +00001740{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001741#if TCG_TARGET_REG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00001742 tcg_gen_discard_i32(TCGV_LOW(arg));
bellard5ff9d6a2008-02-04 00:37:54 +00001743 tcg_gen_discard_i32(TCGV_HIGH(arg));
bellard5ff9d6a2008-02-04 00:37:54 +00001744#else
pbrooka7812ae2008-11-17 14:43:54 +00001745 tcg_gen_op1_i64(INDEX_op_discard, arg);
bellard5ff9d6a2008-02-04 00:37:54 +00001746#endif
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001747}
bellard5ff9d6a2008-02-04 00:37:54 +00001748
pbrooka7812ae2008-11-17 14:43:54 +00001749static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high)
pbrook36aa55d2008-09-21 13:48:32 +00001750{
1751#if TCG_TARGET_REG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00001752 tcg_gen_mov_i32(TCGV_LOW(dest), low);
pbrook36aa55d2008-09-21 13:48:32 +00001753 tcg_gen_mov_i32(TCGV_HIGH(dest), high);
1754#else
pbrooka7812ae2008-11-17 14:43:54 +00001755 TCGv_i64 tmp = tcg_temp_new_i64();
pbrook36aa55d2008-09-21 13:48:32 +00001756 /* This extension is only needed for type correctness.
1757 We may be able to do better given target specific information. */
1758 tcg_gen_extu_i32_i64(tmp, high);
1759 tcg_gen_shli_i64(tmp, tmp, 32);
1760 tcg_gen_extu_i32_i64(dest, low);
1761 tcg_gen_or_i64(dest, dest, tmp);
pbrooka7812ae2008-11-17 14:43:54 +00001762 tcg_temp_free_i64(tmp);
pbrook36aa55d2008-09-21 13:48:32 +00001763#endif
1764}
1765
pbrooka7812ae2008-11-17 14:43:54 +00001766static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high)
blueswir1945ca822008-09-21 18:32:28 +00001767{
1768#if TCG_TARGET_REG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00001769 tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
blueswir1945ca822008-09-21 18:32:28 +00001770#else
pbrooka7812ae2008-11-17 14:43:54 +00001771 TCGv_i64 tmp = tcg_temp_new_i64();
pbrook88422e22008-09-23 22:31:10 +00001772 tcg_gen_ext32u_i64(dest, low);
blueswir1945ca822008-09-21 18:32:28 +00001773 tcg_gen_shli_i64(tmp, high, 32);
pbrook88422e22008-09-23 22:31:10 +00001774 tcg_gen_or_i64(dest, dest, tmp);
pbrooka7812ae2008-11-17 14:43:54 +00001775 tcg_temp_free_i64(tmp);
blueswir1945ca822008-09-21 18:32:28 +00001776#endif
1777}
1778
pbrooka7812ae2008-11-17 14:43:54 +00001779static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001780{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001781 if (TCG_TARGET_HAS_andc_i32) {
1782 tcg_gen_op3_i32(INDEX_op_andc_i32, ret, arg1, arg2);
1783 } else {
1784 TCGv_i32 t0 = tcg_temp_new_i32();
1785 tcg_gen_not_i32(t0, arg2);
1786 tcg_gen_and_i32(ret, arg1, t0);
1787 tcg_temp_free_i32(t0);
1788 }
aurel32f24cb332008-10-21 11:28:59 +00001789}
1790
pbrooka7812ae2008-11-17 14:43:54 +00001791static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001792{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001793#if TCG_TARGET_REG_BITS == 64
1794 if (TCG_TARGET_HAS_andc_i64) {
1795 tcg_gen_op3_i64(INDEX_op_andc_i64, ret, arg1, arg2);
1796 } else {
1797 TCGv_i64 t0 = tcg_temp_new_i64();
1798 tcg_gen_not_i64(t0, arg2);
1799 tcg_gen_and_i64(ret, arg1, t0);
1800 tcg_temp_free_i64(t0);
1801 }
1802#else
Richard Henderson241cbed2010-02-16 14:10:13 -08001803 tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1804 tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
Richard Henderson241cbed2010-02-16 14:10:13 -08001805#endif
aurel32f24cb332008-10-21 11:28:59 +00001806}
1807
pbrooka7812ae2008-11-17 14:43:54 +00001808static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001809{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001810 if (TCG_TARGET_HAS_eqv_i32) {
1811 tcg_gen_op3_i32(INDEX_op_eqv_i32, ret, arg1, arg2);
1812 } else {
1813 tcg_gen_xor_i32(ret, arg1, arg2);
1814 tcg_gen_not_i32(ret, ret);
1815 }
aurel32f24cb332008-10-21 11:28:59 +00001816}
1817
pbrooka7812ae2008-11-17 14:43:54 +00001818static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001819{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001820#if TCG_TARGET_REG_BITS == 64
1821 if (TCG_TARGET_HAS_eqv_i64) {
1822 tcg_gen_op3_i64(INDEX_op_eqv_i64, ret, arg1, arg2);
1823 } else {
1824 tcg_gen_xor_i64(ret, arg1, arg2);
1825 tcg_gen_not_i64(ret, ret);
1826 }
1827#else
Richard Henderson8d625cf2010-03-19 13:02:02 -07001828 tcg_gen_eqv_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1829 tcg_gen_eqv_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
Richard Henderson8d625cf2010-03-19 13:02:02 -07001830#endif
aurel32f24cb332008-10-21 11:28:59 +00001831}
1832
pbrooka7812ae2008-11-17 14:43:54 +00001833static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001834{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001835 if (TCG_TARGET_HAS_nand_i32) {
1836 tcg_gen_op3_i32(INDEX_op_nand_i32, ret, arg1, arg2);
1837 } else {
1838 tcg_gen_and_i32(ret, arg1, arg2);
1839 tcg_gen_not_i32(ret, ret);
1840 }
aurel32f24cb332008-10-21 11:28:59 +00001841}
1842
pbrooka7812ae2008-11-17 14:43:54 +00001843static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001844{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001845#if TCG_TARGET_REG_BITS == 64
1846 if (TCG_TARGET_HAS_nand_i64) {
1847 tcg_gen_op3_i64(INDEX_op_nand_i64, ret, arg1, arg2);
1848 } else {
1849 tcg_gen_and_i64(ret, arg1, arg2);
1850 tcg_gen_not_i64(ret, ret);
1851 }
1852#else
Richard Henderson9940a962010-03-19 13:03:58 -07001853 tcg_gen_nand_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1854 tcg_gen_nand_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
Richard Henderson9940a962010-03-19 13:03:58 -07001855#endif
aurel32f24cb332008-10-21 11:28:59 +00001856}
1857
pbrooka7812ae2008-11-17 14:43:54 +00001858static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001859{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001860 if (TCG_TARGET_HAS_nor_i32) {
1861 tcg_gen_op3_i32(INDEX_op_nor_i32, ret, arg1, arg2);
1862 } else {
1863 tcg_gen_or_i32(ret, arg1, arg2);
1864 tcg_gen_not_i32(ret, ret);
1865 }
aurel32f24cb332008-10-21 11:28:59 +00001866}
1867
pbrooka7812ae2008-11-17 14:43:54 +00001868static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001869{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001870#if TCG_TARGET_REG_BITS == 64
1871 if (TCG_TARGET_HAS_nor_i64) {
1872 tcg_gen_op3_i64(INDEX_op_nor_i64, ret, arg1, arg2);
1873 } else {
1874 tcg_gen_or_i64(ret, arg1, arg2);
1875 tcg_gen_not_i64(ret, ret);
1876 }
1877#else
Richard Henderson32d98fb2010-03-19 13:08:56 -07001878 tcg_gen_nor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1879 tcg_gen_nor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
Richard Henderson32d98fb2010-03-19 13:08:56 -07001880#endif
aurel32f24cb332008-10-21 11:28:59 +00001881}
1882
pbrooka7812ae2008-11-17 14:43:54 +00001883static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001884{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001885 if (TCG_TARGET_HAS_orc_i32) {
1886 tcg_gen_op3_i32(INDEX_op_orc_i32, ret, arg1, arg2);
1887 } else {
1888 TCGv_i32 t0 = tcg_temp_new_i32();
1889 tcg_gen_not_i32(t0, arg2);
1890 tcg_gen_or_i32(ret, arg1, t0);
1891 tcg_temp_free_i32(t0);
1892 }
aurel32f24cb332008-10-21 11:28:59 +00001893}
1894
pbrooka7812ae2008-11-17 14:43:54 +00001895static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel32f24cb332008-10-21 11:28:59 +00001896{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001897#if TCG_TARGET_REG_BITS == 64
1898 if (TCG_TARGET_HAS_orc_i64) {
1899 tcg_gen_op3_i64(INDEX_op_orc_i64, ret, arg1, arg2);
1900 } else {
1901 TCGv_i64 t0 = tcg_temp_new_i64();
1902 tcg_gen_not_i64(t0, arg2);
1903 tcg_gen_or_i64(ret, arg1, t0);
1904 tcg_temp_free_i64(t0);
1905 }
1906#else
Richard Henderson791d1262010-02-16 14:15:28 -08001907 tcg_gen_orc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
1908 tcg_gen_orc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
Richard Henderson791d1262010-02-16 14:15:28 -08001909#endif
aurel32f24cb332008-10-21 11:28:59 +00001910}
1911
pbrooka7812ae2008-11-17 14:43:54 +00001912static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel3215824572008-11-03 07:08:36 +00001913{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001914 if (TCG_TARGET_HAS_rot_i32) {
1915 tcg_gen_op3_i32(INDEX_op_rotl_i32, ret, arg1, arg2);
1916 } else {
1917 TCGv_i32 t0, t1;
aurel3215824572008-11-03 07:08:36 +00001918
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001919 t0 = tcg_temp_new_i32();
1920 t1 = tcg_temp_new_i32();
1921 tcg_gen_shl_i32(t0, arg1, arg2);
1922 tcg_gen_subfi_i32(t1, 32, arg2);
1923 tcg_gen_shr_i32(t1, arg1, t1);
1924 tcg_gen_or_i32(ret, t0, t1);
1925 tcg_temp_free_i32(t0);
1926 tcg_temp_free_i32(t1);
1927 }
aurel3215824572008-11-03 07:08:36 +00001928}
1929
pbrooka7812ae2008-11-17 14:43:54 +00001930static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel3215824572008-11-03 07:08:36 +00001931{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001932 if (TCG_TARGET_HAS_rot_i64) {
1933 tcg_gen_op3_i64(INDEX_op_rotl_i64, ret, arg1, arg2);
1934 } else {
1935 TCGv_i64 t0, t1;
1936 t0 = tcg_temp_new_i64();
1937 t1 = tcg_temp_new_i64();
1938 tcg_gen_shl_i64(t0, arg1, arg2);
1939 tcg_gen_subfi_i64(t1, 64, arg2);
1940 tcg_gen_shr_i64(t1, arg1, t1);
1941 tcg_gen_or_i64(ret, t0, t1);
1942 tcg_temp_free_i64(t0);
1943 tcg_temp_free_i64(t1);
1944 }
aurel3215824572008-11-03 07:08:36 +00001945}
1946
pbrooka7812ae2008-11-17 14:43:54 +00001947static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
aurel3215824572008-11-03 07:08:36 +00001948{
1949 /* some cases can be optimized here */
1950 if (arg2 == 0) {
1951 tcg_gen_mov_i32(ret, arg1);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001952 } else if (TCG_TARGET_HAS_rot_i32) {
aurel32d42f1832009-03-09 18:50:53 +00001953 TCGv_i32 t0 = tcg_const_i32(arg2);
1954 tcg_gen_rotl_i32(ret, arg1, t0);
1955 tcg_temp_free_i32(t0);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001956 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001957 TCGv_i32 t0, t1;
1958 t0 = tcg_temp_new_i32();
1959 t1 = tcg_temp_new_i32();
aurel3215824572008-11-03 07:08:36 +00001960 tcg_gen_shli_i32(t0, arg1, arg2);
1961 tcg_gen_shri_i32(t1, arg1, 32 - arg2);
1962 tcg_gen_or_i32(ret, t0, t1);
pbrooka7812ae2008-11-17 14:43:54 +00001963 tcg_temp_free_i32(t0);
1964 tcg_temp_free_i32(t1);
aurel3215824572008-11-03 07:08:36 +00001965 }
1966}
1967
pbrooka7812ae2008-11-17 14:43:54 +00001968static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
aurel3215824572008-11-03 07:08:36 +00001969{
1970 /* some cases can be optimized here */
1971 if (arg2 == 0) {
1972 tcg_gen_mov_i64(ret, arg1);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001973 } else if (TCG_TARGET_HAS_rot_i64) {
aurel32d42f1832009-03-09 18:50:53 +00001974 TCGv_i64 t0 = tcg_const_i64(arg2);
1975 tcg_gen_rotl_i64(ret, arg1, t0);
1976 tcg_temp_free_i64(t0);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001977 } else {
pbrooka7812ae2008-11-17 14:43:54 +00001978 TCGv_i64 t0, t1;
1979 t0 = tcg_temp_new_i64();
1980 t1 = tcg_temp_new_i64();
aurel3215824572008-11-03 07:08:36 +00001981 tcg_gen_shli_i64(t0, arg1, arg2);
1982 tcg_gen_shri_i64(t1, arg1, 64 - arg2);
1983 tcg_gen_or_i64(ret, t0, t1);
pbrooka7812ae2008-11-17 14:43:54 +00001984 tcg_temp_free_i64(t0);
1985 tcg_temp_free_i64(t1);
aurel3215824572008-11-03 07:08:36 +00001986 }
1987}
1988
pbrooka7812ae2008-11-17 14:43:54 +00001989static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
aurel3215824572008-11-03 07:08:36 +00001990{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001991 if (TCG_TARGET_HAS_rot_i32) {
1992 tcg_gen_op3_i32(INDEX_op_rotr_i32, ret, arg1, arg2);
1993 } else {
1994 TCGv_i32 t0, t1;
aurel3215824572008-11-03 07:08:36 +00001995
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001996 t0 = tcg_temp_new_i32();
1997 t1 = tcg_temp_new_i32();
1998 tcg_gen_shr_i32(t0, arg1, arg2);
1999 tcg_gen_subfi_i32(t1, 32, arg2);
2000 tcg_gen_shl_i32(t1, arg1, t1);
2001 tcg_gen_or_i32(ret, t0, t1);
2002 tcg_temp_free_i32(t0);
2003 tcg_temp_free_i32(t1);
2004 }
aurel3215824572008-11-03 07:08:36 +00002005}
2006
pbrooka7812ae2008-11-17 14:43:54 +00002007static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
aurel3215824572008-11-03 07:08:36 +00002008{
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002009 if (TCG_TARGET_HAS_rot_i64) {
2010 tcg_gen_op3_i64(INDEX_op_rotr_i64, ret, arg1, arg2);
2011 } else {
2012 TCGv_i64 t0, t1;
2013 t0 = tcg_temp_new_i64();
2014 t1 = tcg_temp_new_i64();
2015 tcg_gen_shr_i64(t0, arg1, arg2);
2016 tcg_gen_subfi_i64(t1, 64, arg2);
2017 tcg_gen_shl_i64(t1, arg1, t1);
2018 tcg_gen_or_i64(ret, t0, t1);
2019 tcg_temp_free_i64(t0);
2020 tcg_temp_free_i64(t1);
2021 }
aurel3215824572008-11-03 07:08:36 +00002022}
2023
pbrooka7812ae2008-11-17 14:43:54 +00002024static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
aurel3215824572008-11-03 07:08:36 +00002025{
2026 /* some cases can be optimized here */
2027 if (arg2 == 0) {
2028 tcg_gen_mov_i32(ret, arg1);
2029 } else {
2030 tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
2031 }
2032}
2033
pbrooka7812ae2008-11-17 14:43:54 +00002034static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
aurel3215824572008-11-03 07:08:36 +00002035{
2036 /* some cases can be optimized here */
2037 if (arg2 == 0) {
pbrookde3526b2008-11-03 13:30:50 +00002038 tcg_gen_mov_i64(ret, arg1);
aurel3215824572008-11-03 07:08:36 +00002039 } else {
2040 tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
2041 }
2042}
2043
Richard Hendersonb7767f02011-01-10 19:23:42 -08002044static inline void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1,
Richard Henderson0756e712011-11-01 15:06:43 -07002045 TCGv_i32 arg2, unsigned int ofs,
2046 unsigned int len)
Richard Hendersonb7767f02011-01-10 19:23:42 -08002047{
Richard Hendersondf072772011-10-27 14:15:00 -07002048 uint32_t mask;
2049 TCGv_i32 t1;
2050
2051 if (ofs == 0 && len == 32) {
2052 tcg_gen_mov_i32(ret, arg2);
2053 return;
2054 }
Jan Kiszkaa4773322011-09-29 18:52:11 +02002055 if (TCG_TARGET_HAS_deposit_i32 && TCG_TARGET_deposit_i32_valid(ofs, len)) {
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002056 tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, arg1, arg2, ofs, len);
Richard Hendersondf072772011-10-27 14:15:00 -07002057 return;
2058 }
Richard Hendersonb7767f02011-01-10 19:23:42 -08002059
Richard Hendersondf072772011-10-27 14:15:00 -07002060 mask = (1u << len) - 1;
2061 t1 = tcg_temp_new_i32();
2062
2063 if (ofs + len < 32) {
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002064 tcg_gen_andi_i32(t1, arg2, mask);
2065 tcg_gen_shli_i32(t1, t1, ofs);
Richard Hendersondf072772011-10-27 14:15:00 -07002066 } else {
2067 tcg_gen_shli_i32(t1, arg2, ofs);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002068 }
Richard Hendersondf072772011-10-27 14:15:00 -07002069 tcg_gen_andi_i32(ret, arg1, ~(mask << ofs));
2070 tcg_gen_or_i32(ret, ret, t1);
2071
2072 tcg_temp_free_i32(t1);
Richard Hendersonb7767f02011-01-10 19:23:42 -08002073}
2074
2075static inline void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1,
Richard Henderson0756e712011-11-01 15:06:43 -07002076 TCGv_i64 arg2, unsigned int ofs,
2077 unsigned int len)
Richard Hendersonb7767f02011-01-10 19:23:42 -08002078{
Richard Hendersondf072772011-10-27 14:15:00 -07002079 uint64_t mask;
2080 TCGv_i64 t1;
2081
2082 if (ofs == 0 && len == 64) {
2083 tcg_gen_mov_i64(ret, arg2);
2084 return;
2085 }
Jan Kiszkaa4773322011-09-29 18:52:11 +02002086 if (TCG_TARGET_HAS_deposit_i64 && TCG_TARGET_deposit_i64_valid(ofs, len)) {
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002087 tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, arg1, arg2, ofs, len);
Richard Hendersondf072772011-10-27 14:15:00 -07002088 return;
2089 }
Richard Hendersonb7767f02011-01-10 19:23:42 -08002090
Richard Hendersondf072772011-10-27 14:15:00 -07002091#if TCG_TARGET_REG_BITS == 32
2092 if (ofs >= 32) {
Richard Henderson2f98c9d2011-11-01 15:06:42 -07002093 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
Richard Hendersondf072772011-10-27 14:15:00 -07002094 tcg_gen_deposit_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1),
2095 TCGV_LOW(arg2), ofs - 32, len);
2096 return;
2097 }
2098 if (ofs + len <= 32) {
2099 tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(arg1),
2100 TCGV_LOW(arg2), ofs, len);
Richard Henderson2f98c9d2011-11-01 15:06:42 -07002101 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
Richard Hendersondf072772011-10-27 14:15:00 -07002102 return;
2103 }
2104#endif
2105
2106 mask = (1ull << len) - 1;
2107 t1 = tcg_temp_new_i64();
2108
2109 if (ofs + len < 64) {
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002110 tcg_gen_andi_i64(t1, arg2, mask);
2111 tcg_gen_shli_i64(t1, t1, ofs);
Richard Hendersondf072772011-10-27 14:15:00 -07002112 } else {
2113 tcg_gen_shli_i64(t1, arg2, ofs);
Richard Henderson25c4d9c2011-08-17 14:11:46 -07002114 }
Richard Hendersondf072772011-10-27 14:15:00 -07002115 tcg_gen_andi_i64(ret, arg1, ~(mask << ofs));
2116 tcg_gen_or_i64(ret, ret, t1);
2117
2118 tcg_temp_free_i64(t1);
Richard Hendersonb7767f02011-01-10 19:23:42 -08002119}
2120
bellardc896fe22008-02-01 10:05:41 +00002121/***************************************/
bellardc896fe22008-02-01 10:05:41 +00002122/* QEMU specific operations. Their type depend on the QEMU CPU
2123 type. */
2124#ifndef TARGET_LONG_BITS
2125#error must include QEMU headers
2126#endif
2127
pbrooka7812ae2008-11-17 14:43:54 +00002128#if TARGET_LONG_BITS == 32
2129#define TCGv TCGv_i32
2130#define tcg_temp_new() tcg_temp_new_i32()
2131#define tcg_global_reg_new tcg_global_reg_new_i32
2132#define tcg_global_mem_new tcg_global_mem_new_i32
aurel32df9247b2009-01-01 14:09:05 +00002133#define tcg_temp_local_new() tcg_temp_local_new_i32()
pbrooka7812ae2008-11-17 14:43:54 +00002134#define tcg_temp_free tcg_temp_free_i32
2135#define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
2136#define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
2137#define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
aurel32fe75bcf2009-03-10 08:57:16 +00002138#define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
pbrooka7812ae2008-11-17 14:43:54 +00002139#else
2140#define TCGv TCGv_i64
2141#define tcg_temp_new() tcg_temp_new_i64()
2142#define tcg_global_reg_new tcg_global_reg_new_i64
2143#define tcg_global_mem_new tcg_global_mem_new_i64
aurel32df9247b2009-01-01 14:09:05 +00002144#define tcg_temp_local_new() tcg_temp_local_new_i64()
pbrooka7812ae2008-11-17 14:43:54 +00002145#define tcg_temp_free tcg_temp_free_i64
2146#define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
2147#define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
2148#define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
aurel32fe75bcf2009-03-10 08:57:16 +00002149#define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
pbrooka7812ae2008-11-17 14:43:54 +00002150#endif
2151
bellard7e4597d2008-05-22 16:56:05 +00002152/* debug info: write the PC of the corresponding QEMU CPU instruction */
2153static inline void tcg_gen_debug_insn_start(uint64_t pc)
2154{
2155 /* XXX: must really use a 32 bit size for TCGArg in all cases */
2156#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
pbrookbcb01262008-05-24 02:24:25 +00002157 tcg_gen_op2ii(INDEX_op_debug_insn_start,
2158 (uint32_t)(pc), (uint32_t)(pc >> 32));
bellard7e4597d2008-05-22 16:56:05 +00002159#else
2160 tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
2161#endif
2162}
2163
bellardc896fe22008-02-01 10:05:41 +00002164static inline void tcg_gen_exit_tb(tcg_target_long val)
2165{
pbrookac56dd42008-02-03 19:56:33 +00002166 tcg_gen_op1i(INDEX_op_exit_tb, val);
bellardc896fe22008-02-01 10:05:41 +00002167}
2168
2169static inline void tcg_gen_goto_tb(int idx)
2170{
pbrookac56dd42008-02-03 19:56:33 +00002171 tcg_gen_op1i(INDEX_op_goto_tb, idx);
bellardc896fe22008-02-01 10:05:41 +00002172}
2173
2174#if TCG_TARGET_REG_BITS == 32
pbrookac56dd42008-02-03 19:56:33 +00002175static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002176{
2177#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002178 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002179#else
pbrooka7812ae2008-11-17 14:43:54 +00002180 tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr),
2181 TCGV_HIGH(addr), mem_index);
pbrookac56dd42008-02-03 19:56:33 +00002182 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +00002183#endif
2184}
2185
pbrookac56dd42008-02-03 19:56:33 +00002186static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002187{
2188#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002189 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002190#else
pbrooka7812ae2008-11-17 14:43:54 +00002191 tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr),
2192 TCGV_HIGH(addr), mem_index);
2193 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00002194#endif
2195}
2196
pbrookac56dd42008-02-03 19:56:33 +00002197static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002198{
2199#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002200 tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002201#else
pbrooka7812ae2008-11-17 14:43:54 +00002202 tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr),
2203 TCGV_HIGH(addr), mem_index);
pbrookac56dd42008-02-03 19:56:33 +00002204 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +00002205#endif
2206}
2207
pbrookac56dd42008-02-03 19:56:33 +00002208static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002209{
2210#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002211 tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002212#else
pbrooka7812ae2008-11-17 14:43:54 +00002213 tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr),
2214 TCGV_HIGH(addr), mem_index);
2215 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00002216#endif
2217}
2218
pbrookac56dd42008-02-03 19:56:33 +00002219static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002220{
2221#if TARGET_LONG_BITS == 32
Richard Henderson86feb1c2010-03-19 12:00:26 -07002222 tcg_gen_op3i_i32(INDEX_op_qemu_ld32, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002223#else
Richard Henderson86feb1c2010-03-19 12:00:26 -07002224 tcg_gen_op4i_i32(INDEX_op_qemu_ld32, TCGV_LOW(ret), TCGV_LOW(addr),
pbrooka7812ae2008-11-17 14:43:54 +00002225 TCGV_HIGH(addr), mem_index);
pbrookac56dd42008-02-03 19:56:33 +00002226 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
bellardc896fe22008-02-01 10:05:41 +00002227#endif
2228}
2229
pbrookac56dd42008-02-03 19:56:33 +00002230static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002231{
2232#if TARGET_LONG_BITS == 32
Richard Henderson86feb1c2010-03-19 12:00:26 -07002233 tcg_gen_op3i_i32(INDEX_op_qemu_ld32, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002234#else
Richard Henderson86feb1c2010-03-19 12:00:26 -07002235 tcg_gen_op4i_i32(INDEX_op_qemu_ld32, TCGV_LOW(ret), TCGV_LOW(addr),
pbrooka7812ae2008-11-17 14:43:54 +00002236 TCGV_HIGH(addr), mem_index);
2237 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
bellardc896fe22008-02-01 10:05:41 +00002238#endif
2239}
2240
pbrooka7812ae2008-11-17 14:43:54 +00002241static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002242{
2243#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002244 tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002245#else
pbrooka7812ae2008-11-17 14:43:54 +00002246 tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret),
2247 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
bellardc896fe22008-02-01 10:05:41 +00002248#endif
2249}
2250
pbrookac56dd42008-02-03 19:56:33 +00002251static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002252{
2253#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002254 tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002255#else
pbrooka7812ae2008-11-17 14:43:54 +00002256 tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr),
2257 TCGV_HIGH(addr), mem_index);
bellardc896fe22008-02-01 10:05:41 +00002258#endif
2259}
2260
pbrookac56dd42008-02-03 19:56:33 +00002261static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002262{
2263#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002264 tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002265#else
pbrooka7812ae2008-11-17 14:43:54 +00002266 tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr),
2267 TCGV_HIGH(addr), mem_index);
bellardc896fe22008-02-01 10:05:41 +00002268#endif
2269}
2270
pbrookac56dd42008-02-03 19:56:33 +00002271static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002272{
2273#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002274 tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002275#else
pbrooka7812ae2008-11-17 14:43:54 +00002276 tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr),
2277 TCGV_HIGH(addr), mem_index);
bellardc896fe22008-02-01 10:05:41 +00002278#endif
2279}
2280
pbrooka7812ae2008-11-17 14:43:54 +00002281static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002282{
2283#if TARGET_LONG_BITS == 32
pbrooka7812ae2008-11-17 14:43:54 +00002284 tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr,
2285 mem_index);
bellardc896fe22008-02-01 10:05:41 +00002286#else
pbrooka7812ae2008-11-17 14:43:54 +00002287 tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg),
2288 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
bellardc896fe22008-02-01 10:05:41 +00002289#endif
2290}
2291
Peter Maydellebecf362011-05-27 13:12:13 +01002292#define tcg_gen_ld_ptr(R, A, O) tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
2293#define tcg_gen_discard_ptr(A) tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
blueswir1f8422f52008-02-24 07:45:43 +00002294
bellardc896fe22008-02-01 10:05:41 +00002295#else /* TCG_TARGET_REG_BITS == 32 */
2296
pbrookac56dd42008-02-03 19:56:33 +00002297static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002298{
pbrooka7812ae2008-11-17 14:43:54 +00002299 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002300}
2301
pbrookac56dd42008-02-03 19:56:33 +00002302static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002303{
pbrooka7812ae2008-11-17 14:43:54 +00002304 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002305}
2306
pbrookac56dd42008-02-03 19:56:33 +00002307static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002308{
pbrooka7812ae2008-11-17 14:43:54 +00002309 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002310}
2311
pbrookac56dd42008-02-03 19:56:33 +00002312static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002313{
pbrooka7812ae2008-11-17 14:43:54 +00002314 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002315}
2316
pbrookac56dd42008-02-03 19:56:33 +00002317static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002318{
Richard Henderson3e1dbad2010-05-03 16:30:48 -07002319#if TARGET_LONG_BITS == 32
2320 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
2321#else
pbrooka7812ae2008-11-17 14:43:54 +00002322 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
Richard Henderson3e1dbad2010-05-03 16:30:48 -07002323#endif
bellardc896fe22008-02-01 10:05:41 +00002324}
2325
pbrookac56dd42008-02-03 19:56:33 +00002326static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002327{
Richard Henderson3e1dbad2010-05-03 16:30:48 -07002328#if TARGET_LONG_BITS == 32
2329 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
2330#else
pbrooka7812ae2008-11-17 14:43:54 +00002331 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
Richard Henderson3e1dbad2010-05-03 16:30:48 -07002332#endif
bellardc896fe22008-02-01 10:05:41 +00002333}
2334
pbrooka7812ae2008-11-17 14:43:54 +00002335static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002336{
pbrooka7812ae2008-11-17 14:43:54 +00002337 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002338}
2339
pbrookac56dd42008-02-03 19:56:33 +00002340static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002341{
pbrooka7812ae2008-11-17 14:43:54 +00002342 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002343}
2344
pbrookac56dd42008-02-03 19:56:33 +00002345static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002346{
pbrooka7812ae2008-11-17 14:43:54 +00002347 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002348}
2349
pbrookac56dd42008-02-03 19:56:33 +00002350static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002351{
pbrooka7812ae2008-11-17 14:43:54 +00002352 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002353}
2354
pbrooka7812ae2008-11-17 14:43:54 +00002355static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
bellardc896fe22008-02-01 10:05:41 +00002356{
pbrooka7812ae2008-11-17 14:43:54 +00002357 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
bellardc896fe22008-02-01 10:05:41 +00002358}
2359
Peter Maydellebecf362011-05-27 13:12:13 +01002360#define tcg_gen_ld_ptr(R, A, O) tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
2361#define tcg_gen_discard_ptr(A) tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
blueswir1f8422f52008-02-24 07:45:43 +00002362
bellardc896fe22008-02-01 10:05:41 +00002363#endif /* TCG_TARGET_REG_BITS != 32 */
blueswir1f8422f52008-02-24 07:45:43 +00002364
2365#if TARGET_LONG_BITS == 64
blueswir1f8422f52008-02-24 07:45:43 +00002366#define tcg_gen_movi_tl tcg_gen_movi_i64
2367#define tcg_gen_mov_tl tcg_gen_mov_i64
2368#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
2369#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
2370#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
2371#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
2372#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
2373#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
2374#define tcg_gen_ld_tl tcg_gen_ld_i64
2375#define tcg_gen_st8_tl tcg_gen_st8_i64
2376#define tcg_gen_st16_tl tcg_gen_st16_i64
2377#define tcg_gen_st32_tl tcg_gen_st32_i64
2378#define tcg_gen_st_tl tcg_gen_st_i64
2379#define tcg_gen_add_tl tcg_gen_add_i64
2380#define tcg_gen_addi_tl tcg_gen_addi_i64
2381#define tcg_gen_sub_tl tcg_gen_sub_i64
pbrook390efc52008-05-11 14:35:37 +00002382#define tcg_gen_neg_tl tcg_gen_neg_i64
pbrook10460c82008-11-02 13:26:16 +00002383#define tcg_gen_subfi_tl tcg_gen_subfi_i64
blueswir1f8422f52008-02-24 07:45:43 +00002384#define tcg_gen_subi_tl tcg_gen_subi_i64
2385#define tcg_gen_and_tl tcg_gen_and_i64
2386#define tcg_gen_andi_tl tcg_gen_andi_i64
2387#define tcg_gen_or_tl tcg_gen_or_i64
2388#define tcg_gen_ori_tl tcg_gen_ori_i64
2389#define tcg_gen_xor_tl tcg_gen_xor_i64
2390#define tcg_gen_xori_tl tcg_gen_xori_i64
bellard0b6ce4c2008-05-17 12:40:44 +00002391#define tcg_gen_not_tl tcg_gen_not_i64
blueswir1f8422f52008-02-24 07:45:43 +00002392#define tcg_gen_shl_tl tcg_gen_shl_i64
2393#define tcg_gen_shli_tl tcg_gen_shli_i64
2394#define tcg_gen_shr_tl tcg_gen_shr_i64
2395#define tcg_gen_shri_tl tcg_gen_shri_i64
2396#define tcg_gen_sar_tl tcg_gen_sar_i64
2397#define tcg_gen_sari_tl tcg_gen_sari_i64
blueswir10cf767d2008-03-02 18:20:59 +00002398#define tcg_gen_brcond_tl tcg_gen_brcond_i64
pbrookcb636692008-05-24 02:22:00 +00002399#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
Richard Hendersonbe210ac2010-01-07 10:13:31 -08002400#define tcg_gen_setcond_tl tcg_gen_setcond_i64
Aurelien Jarnoadd1e7e2010-02-08 12:06:05 +01002401#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
thsf730fd22008-05-04 08:14:08 +00002402#define tcg_gen_mul_tl tcg_gen_mul_i64
2403#define tcg_gen_muli_tl tcg_gen_muli_i64
aurel32ab364212009-03-29 01:19:22 +00002404#define tcg_gen_div_tl tcg_gen_div_i64
2405#define tcg_gen_rem_tl tcg_gen_rem_i64
aurel32864951a2009-03-29 14:08:54 +00002406#define tcg_gen_divu_tl tcg_gen_divu_i64
2407#define tcg_gen_remu_tl tcg_gen_remu_i64
blueswir1a768e4b2008-03-16 19:16:37 +00002408#define tcg_gen_discard_tl tcg_gen_discard_i64
blueswir1e4290732008-03-22 08:39:04 +00002409#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
2410#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
2411#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
2412#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
2413#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
2414#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
bellard0b6ce4c2008-05-17 12:40:44 +00002415#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
2416#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
2417#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
2418#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
2419#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
2420#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
aurel32911d79b2009-03-13 09:35:19 +00002421#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
2422#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
2423#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
blueswir1945ca822008-09-21 18:32:28 +00002424#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
aurel32f24cb332008-10-21 11:28:59 +00002425#define tcg_gen_andc_tl tcg_gen_andc_i64
2426#define tcg_gen_eqv_tl tcg_gen_eqv_i64
2427#define tcg_gen_nand_tl tcg_gen_nand_i64
2428#define tcg_gen_nor_tl tcg_gen_nor_i64
2429#define tcg_gen_orc_tl tcg_gen_orc_i64
aurel3215824572008-11-03 07:08:36 +00002430#define tcg_gen_rotl_tl tcg_gen_rotl_i64
2431#define tcg_gen_rotli_tl tcg_gen_rotli_i64
2432#define tcg_gen_rotr_tl tcg_gen_rotr_i64
2433#define tcg_gen_rotri_tl tcg_gen_rotri_i64
Richard Hendersonb7767f02011-01-10 19:23:42 -08002434#define tcg_gen_deposit_tl tcg_gen_deposit_i64
blueswir1a98824a2008-03-13 20:46:42 +00002435#define tcg_const_tl tcg_const_i64
aurel32bdffd4a2008-10-21 11:30:45 +00002436#define tcg_const_local_tl tcg_const_local_i64
blueswir1f8422f52008-02-24 07:45:43 +00002437#else
blueswir1f8422f52008-02-24 07:45:43 +00002438#define tcg_gen_movi_tl tcg_gen_movi_i32
2439#define tcg_gen_mov_tl tcg_gen_mov_i32
2440#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
2441#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
2442#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
2443#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
2444#define tcg_gen_ld32u_tl tcg_gen_ld_i32
2445#define tcg_gen_ld32s_tl tcg_gen_ld_i32
2446#define tcg_gen_ld_tl tcg_gen_ld_i32
2447#define tcg_gen_st8_tl tcg_gen_st8_i32
2448#define tcg_gen_st16_tl tcg_gen_st16_i32
2449#define tcg_gen_st32_tl tcg_gen_st_i32
2450#define tcg_gen_st_tl tcg_gen_st_i32
2451#define tcg_gen_add_tl tcg_gen_add_i32
2452#define tcg_gen_addi_tl tcg_gen_addi_i32
2453#define tcg_gen_sub_tl tcg_gen_sub_i32
pbrook390efc52008-05-11 14:35:37 +00002454#define tcg_gen_neg_tl tcg_gen_neg_i32
aurel3200457342008-11-02 08:23:04 +00002455#define tcg_gen_subfi_tl tcg_gen_subfi_i32
blueswir1f8422f52008-02-24 07:45:43 +00002456#define tcg_gen_subi_tl tcg_gen_subi_i32
2457#define tcg_gen_and_tl tcg_gen_and_i32
2458#define tcg_gen_andi_tl tcg_gen_andi_i32
2459#define tcg_gen_or_tl tcg_gen_or_i32
2460#define tcg_gen_ori_tl tcg_gen_ori_i32
2461#define tcg_gen_xor_tl tcg_gen_xor_i32
2462#define tcg_gen_xori_tl tcg_gen_xori_i32
bellard0b6ce4c2008-05-17 12:40:44 +00002463#define tcg_gen_not_tl tcg_gen_not_i32
blueswir1f8422f52008-02-24 07:45:43 +00002464#define tcg_gen_shl_tl tcg_gen_shl_i32
2465#define tcg_gen_shli_tl tcg_gen_shli_i32
2466#define tcg_gen_shr_tl tcg_gen_shr_i32
2467#define tcg_gen_shri_tl tcg_gen_shri_i32
2468#define tcg_gen_sar_tl tcg_gen_sar_i32
2469#define tcg_gen_sari_tl tcg_gen_sari_i32
blueswir10cf767d2008-03-02 18:20:59 +00002470#define tcg_gen_brcond_tl tcg_gen_brcond_i32
pbrookcb636692008-05-24 02:22:00 +00002471#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
Richard Hendersonbe210ac2010-01-07 10:13:31 -08002472#define tcg_gen_setcond_tl tcg_gen_setcond_i32
Aurelien Jarnoadd1e7e2010-02-08 12:06:05 +01002473#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
thsf730fd22008-05-04 08:14:08 +00002474#define tcg_gen_mul_tl tcg_gen_mul_i32
2475#define tcg_gen_muli_tl tcg_gen_muli_i32
aurel32ab364212009-03-29 01:19:22 +00002476#define tcg_gen_div_tl tcg_gen_div_i32
2477#define tcg_gen_rem_tl tcg_gen_rem_i32
aurel32864951a2009-03-29 14:08:54 +00002478#define tcg_gen_divu_tl tcg_gen_divu_i32
2479#define tcg_gen_remu_tl tcg_gen_remu_i32
blueswir1a768e4b2008-03-16 19:16:37 +00002480#define tcg_gen_discard_tl tcg_gen_discard_i32
blueswir1e4290732008-03-22 08:39:04 +00002481#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
2482#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
2483#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
2484#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
2485#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
2486#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
bellard0b6ce4c2008-05-17 12:40:44 +00002487#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
2488#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
2489#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
2490#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
2491#define tcg_gen_ext32u_tl tcg_gen_mov_i32
2492#define tcg_gen_ext32s_tl tcg_gen_mov_i32
aurel32911d79b2009-03-13 09:35:19 +00002493#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
2494#define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
blueswir1945ca822008-09-21 18:32:28 +00002495#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
aurel32f24cb332008-10-21 11:28:59 +00002496#define tcg_gen_andc_tl tcg_gen_andc_i32
2497#define tcg_gen_eqv_tl tcg_gen_eqv_i32
2498#define tcg_gen_nand_tl tcg_gen_nand_i32
2499#define tcg_gen_nor_tl tcg_gen_nor_i32
2500#define tcg_gen_orc_tl tcg_gen_orc_i32
aurel3215824572008-11-03 07:08:36 +00002501#define tcg_gen_rotl_tl tcg_gen_rotl_i32
2502#define tcg_gen_rotli_tl tcg_gen_rotli_i32
2503#define tcg_gen_rotr_tl tcg_gen_rotr_i32
2504#define tcg_gen_rotri_tl tcg_gen_rotri_i32
Richard Hendersonb7767f02011-01-10 19:23:42 -08002505#define tcg_gen_deposit_tl tcg_gen_deposit_i32
blueswir1a98824a2008-03-13 20:46:42 +00002506#define tcg_const_tl tcg_const_i32
aurel32bdffd4a2008-10-21 11:30:45 +00002507#define tcg_const_local_tl tcg_const_local_i32
blueswir1f8422f52008-02-24 07:45:43 +00002508#endif
pbrook6ddbc6e2008-03-31 03:46:33 +00002509
2510#if TCG_TARGET_REG_BITS == 32
Peter Maydellebecf362011-05-27 13:12:13 +01002511#define tcg_gen_add_ptr(R, A, B) tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), \
2512 TCGV_PTR_TO_NAT(A), \
2513 TCGV_PTR_TO_NAT(B))
2514#define tcg_gen_addi_ptr(R, A, B) tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), \
2515 TCGV_PTR_TO_NAT(A), (B))
2516#define tcg_gen_ext_i32_ptr(R, A) tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
pbrook6ddbc6e2008-03-31 03:46:33 +00002517#else /* TCG_TARGET_REG_BITS == 32 */
Peter Maydellebecf362011-05-27 13:12:13 +01002518#define tcg_gen_add_ptr(R, A, B) tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), \
2519 TCGV_PTR_TO_NAT(A), \
2520 TCGV_PTR_TO_NAT(B))
2521#define tcg_gen_addi_ptr(R, A, B) tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), \
2522 TCGV_PTR_TO_NAT(A), (B))
2523#define tcg_gen_ext_i32_ptr(R, A) tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
pbrook6ddbc6e2008-03-31 03:46:33 +00002524#endif /* TCG_TARGET_REG_BITS != 32 */