aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1 | /* |
| 2 | * PowerPC implementation of KVM hooks |
| 3 | * |
| 4 | * Copyright IBM Corp. 2007 |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 5 | * Copyright (C) 2011 Freescale Semiconductor, Inc. |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 6 | * |
| 7 | * Authors: |
| 8 | * Jerone Young <jyoung5@us.ibm.com> |
| 9 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> |
| 10 | * Hollis Blanchard <hollisb@us.ibm.com> |
| 11 | * |
| 12 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 13 | * See the COPYING file in the top-level directory. |
| 14 | * |
| 15 | */ |
| 16 | |
Peter Maydell | 0d75590 | 2016-01-26 18:16:58 +0000 | [diff] [blame] | 17 | #include "qemu/osdep.h" |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 18 | #include <dirent.h> |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 19 | #include <sys/ioctl.h> |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 20 | #include <sys/vfs.h> |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 21 | |
| 22 | #include <linux/kvm.h> |
| 23 | |
| 24 | #include "qemu-common.h" |
David Gibson | 30f4b05 | 2017-05-12 15:46:11 +1000 | [diff] [blame] | 25 | #include "qapi/error.h" |
Thomas Huth | 072ed5f | 2016-02-18 22:01:38 +0100 | [diff] [blame] | 26 | #include "qemu/error-report.h" |
Paolo Bonzini | 33c1187 | 2016-03-15 16:58:45 +0100 | [diff] [blame] | 27 | #include "cpu.h" |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 28 | #include "cpu-models.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 29 | #include "qemu/timer.h" |
Vincent Palatin | b394662 | 2017-01-10 11:59:55 +0100 | [diff] [blame] | 30 | #include "sysemu/hw_accel.h" |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 31 | #include "kvm_ppc.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 32 | #include "sysemu/cpus.h" |
| 33 | #include "sysemu/device_tree.h" |
David Gibson | d5aea6f | 2013-03-12 00:31:18 +0000 | [diff] [blame] | 34 | #include "mmu-hash64.h" |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 35 | |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 36 | #include "hw/sysbus.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 37 | #include "hw/ppc/spapr.h" |
Bharata B Rao | 7ebaf79 | 2016-09-12 13:27:20 +0530 | [diff] [blame] | 38 | #include "hw/ppc/spapr_cpu_core.h" |
Markus Armbruster | 650d103 | 2019-08-12 07:23:48 +0200 | [diff] [blame] | 39 | #include "hw/hw.h" |
Alexey Kardashevskiy | 98a8b52 | 2014-05-01 20:37:09 +1000 | [diff] [blame] | 40 | #include "hw/ppc/ppc.h" |
Markus Armbruster | ca77ee2 | 2019-08-12 07:23:39 +0200 | [diff] [blame] | 41 | #include "migration/qemu-file-types.h" |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 42 | #include "sysemu/watchdog.h" |
Alexey Kardashevskiy | b36f100 | 2014-02-04 15:12:34 +1100 | [diff] [blame] | 43 | #include "trace.h" |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 44 | #include "exec/gdbstub.h" |
Paolo Bonzini | 4c66375 | 2015-04-08 13:30:58 +0200 | [diff] [blame] | 45 | #include "exec/memattrs.h" |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 46 | #include "exec/ram_addr.h" |
Michael Roth | 2d103aa | 2015-07-02 15:46:14 -0500 | [diff] [blame] | 47 | #include "sysemu/hostmem.h" |
Veronia Bahaa | f348b6d | 2016-03-20 19:16:19 +0200 | [diff] [blame] | 48 | #include "qemu/cutils.h" |
Markus Armbruster | db72581 | 2019-08-12 07:23:50 +0200 | [diff] [blame] | 49 | #include "qemu/main-loop.h" |
Alexey Kardashevskiy | 9c60766 | 2017-03-02 13:36:11 +1100 | [diff] [blame] | 50 | #include "qemu/mmap-alloc.h" |
Sam Bobroff | f3d9f30 | 2017-03-29 16:01:28 +1100 | [diff] [blame] | 51 | #include "elf.h" |
Sam Bobroff | c64abd1 | 2017-03-20 10:46:43 +1100 | [diff] [blame] | 52 | #include "sysemu/kvm_int.h" |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 53 | |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 54 | #define PROC_DEVTREE_CPU "/proc/device-tree/cpus/" |
| 55 | |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 56 | #define DEBUG_RETURN_GUEST 0 |
| 57 | #define DEBUG_RETURN_GDB 1 |
| 58 | |
Jan Kiszka | 94a8d39 | 2011-01-21 21:48:17 +0100 | [diff] [blame] | 59 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
| 60 | KVM_CAP_LAST_INFO |
| 61 | }; |
| 62 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 63 | static int cap_interrupt_unset; |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 64 | static int cap_segstate; |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 65 | static int cap_booke_sregs; |
David Gibson | e97c363 | 2011-09-29 21:39:10 +0000 | [diff] [blame] | 66 | static int cap_ppc_smt; |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 67 | static int cap_ppc_smt_possible; |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 68 | static int cap_spapr_tce; |
Alexey Kardashevskiy | d6ee2a7 | 2017-03-10 12:41:13 +1100 | [diff] [blame] | 69 | static int cap_spapr_tce_64; |
Alexey Kardashevskiy | da95324 | 2014-05-27 15:36:30 +1000 | [diff] [blame] | 70 | static int cap_spapr_multitce; |
Alexey Kardashevskiy | 9bb62a0 | 2014-06-10 15:39:21 +1000 | [diff] [blame] | 71 | static int cap_spapr_vfio; |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 72 | static int cap_hior; |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 73 | static int cap_one_reg; |
Stuart Yoder | 3b96112 | 2013-03-30 06:40:49 +0000 | [diff] [blame] | 74 | static int cap_epr; |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 75 | static int cap_ppc_watchdog; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 76 | static int cap_papr; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 77 | static int cap_htab_fd; |
Alexander Graf | 87a91de | 2014-06-04 12:14:08 +0200 | [diff] [blame] | 78 | static int cap_fixup_hcalls; |
Thomas Huth | bac3bf2 | 2016-09-28 13:16:30 +0200 | [diff] [blame] | 79 | static int cap_htm; /* Hardware transactional memory support */ |
Sam Bobroff | cf1c4cc | 2017-03-20 10:46:44 +1100 | [diff] [blame] | 80 | static int cap_mmu_radix; |
| 81 | static int cap_mmu_hash_v3; |
Cédric Le Goater | 38afd77 | 2019-05-13 10:42:33 +0200 | [diff] [blame] | 82 | static int cap_xive; |
David Gibson | b55d295 | 2017-07-12 17:56:55 +1000 | [diff] [blame] | 83 | static int cap_resize_hpt; |
Daniel Henrique Barboza | c363a37 | 2017-08-09 17:43:46 -0300 | [diff] [blame] | 84 | static int cap_ppc_pvr_compat; |
Suraj Jitindar Singh | 8acc2ae | 2018-01-19 15:59:59 +1100 | [diff] [blame] | 85 | static int cap_ppc_safe_cache; |
| 86 | static int cap_ppc_safe_bounds_check; |
| 87 | static int cap_ppc_safe_indirect_branch; |
Suraj Jitindar Singh | 8ff43ee | 2019-03-01 14:19:12 +1100 | [diff] [blame] | 88 | static int cap_ppc_count_cache_flush_assist; |
Suraj Jitindar Singh | b9a477b | 2018-10-08 14:25:39 +1100 | [diff] [blame] | 89 | static int cap_ppc_nested_kvm_hv; |
Suraj Jitindar Singh | 7d05052 | 2019-03-01 13:43:16 +1100 | [diff] [blame] | 90 | static int cap_large_decr; |
Nicholas Piggin | ec010c0 | 2020-03-26 00:29:03 +1000 | [diff] [blame] | 91 | static int cap_fwnmi; |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 92 | |
Bharat Bhushan | 3c902d4 | 2014-07-14 14:45:35 +0530 | [diff] [blame] | 93 | static uint32_t debug_inst_opcode; |
| 94 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 95 | /* |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 96 | * Check whether we are running with KVM-PR (instead of KVM-HV). This |
Thomas Huth | 96c9cff | 2016-09-29 12:48:06 +0200 | [diff] [blame] | 97 | * should only be used for fallback tests - generally we should use |
| 98 | * explicit capabilities for the features we want, rather than |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 99 | * assuming what is/isn't available depending on the KVM variant. |
| 100 | */ |
Thomas Huth | 96c9cff | 2016-09-29 12:48:06 +0200 | [diff] [blame] | 101 | static bool kvmppc_is_pr(KVMState *ks) |
| 102 | { |
| 103 | /* Assume KVM-PR if the GET_PVINFO capability is available */ |
Greg Kurz | 70a0c19 | 2017-09-14 12:48:04 +0200 | [diff] [blame] | 104 | return kvm_vm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0; |
Thomas Huth | 96c9cff | 2016-09-29 12:48:06 +0200 | [diff] [blame] | 105 | } |
| 106 | |
David Gibson | 165dc3e | 2019-10-30 17:20:35 +0100 | [diff] [blame] | 107 | static int kvm_ppc_register_host_cpu_type(void); |
Suraj Jitindar Singh | 8acc2ae | 2018-01-19 15:59:59 +1100 | [diff] [blame] | 108 | static void kvmppc_get_cpu_characteristics(KVMState *s); |
Suraj Jitindar Singh | 7d05052 | 2019-03-01 13:43:16 +1100 | [diff] [blame] | 109 | static int kvmppc_get_dec_bits(void); |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 110 | |
Marcel Apfelbaum | b16565b | 2015-02-04 17:43:51 +0200 | [diff] [blame] | 111 | int kvm_arch_init(MachineState *ms, KVMState *s) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 112 | { |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 113 | cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ); |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 114 | cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE); |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 115 | cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS); |
Greg Kurz | 6977afd | 2017-09-14 21:25:43 +0200 | [diff] [blame] | 116 | cap_ppc_smt_possible = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 117 | cap_spapr_tce = kvm_check_extension(s, KVM_CAP_SPAPR_TCE); |
Alexey Kardashevskiy | d6ee2a7 | 2017-03-10 12:41:13 +1100 | [diff] [blame] | 118 | cap_spapr_tce_64 = kvm_check_extension(s, KVM_CAP_SPAPR_TCE_64); |
Alexey Kardashevskiy | da95324 | 2014-05-27 15:36:30 +1000 | [diff] [blame] | 119 | cap_spapr_multitce = kvm_check_extension(s, KVM_CAP_SPAPR_MULTITCE); |
Alexey Kardashevskiy | 9ded780 | 2018-02-06 11:08:24 -0700 | [diff] [blame] | 120 | cap_spapr_vfio = kvm_vm_check_extension(s, KVM_CAP_SPAPR_TCE_VFIO); |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 121 | cap_one_reg = kvm_check_extension(s, KVM_CAP_ONE_REG); |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 122 | cap_hior = kvm_check_extension(s, KVM_CAP_PPC_HIOR); |
Stuart Yoder | 3b96112 | 2013-03-30 06:40:49 +0000 | [diff] [blame] | 123 | cap_epr = kvm_check_extension(s, KVM_CAP_PPC_EPR); |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 124 | cap_ppc_watchdog = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_WATCHDOG); |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 125 | /* |
| 126 | * Note: we don't set cap_papr here, because this capability is |
| 127 | * only activated after this by kvmppc_set_papr() |
| 128 | */ |
Greg Kurz | 6977afd | 2017-09-14 21:25:43 +0200 | [diff] [blame] | 129 | cap_htab_fd = kvm_vm_check_extension(s, KVM_CAP_PPC_HTAB_FD); |
Alexander Graf | 87a91de | 2014-06-04 12:14:08 +0200 | [diff] [blame] | 130 | cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL); |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 131 | cap_ppc_smt = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT); |
Thomas Huth | bac3bf2 | 2016-09-28 13:16:30 +0200 | [diff] [blame] | 132 | cap_htm = kvm_vm_check_extension(s, KVM_CAP_PPC_HTM); |
Sam Bobroff | cf1c4cc | 2017-03-20 10:46:44 +1100 | [diff] [blame] | 133 | cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); |
| 134 | cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); |
Cédric Le Goater | 38afd77 | 2019-05-13 10:42:33 +0200 | [diff] [blame] | 135 | cap_xive = kvm_vm_check_extension(s, KVM_CAP_PPC_IRQ_XIVE); |
David Gibson | b55d295 | 2017-07-12 17:56:55 +1000 | [diff] [blame] | 136 | cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT); |
Suraj Jitindar Singh | 8acc2ae | 2018-01-19 15:59:59 +1100 | [diff] [blame] | 137 | kvmppc_get_cpu_characteristics(s); |
Suraj Jitindar Singh | b9a477b | 2018-10-08 14:25:39 +1100 | [diff] [blame] | 138 | cap_ppc_nested_kvm_hv = kvm_vm_check_extension(s, KVM_CAP_PPC_NESTED_HV); |
Suraj Jitindar Singh | 7d05052 | 2019-03-01 13:43:16 +1100 | [diff] [blame] | 139 | cap_large_decr = kvmppc_get_dec_bits(); |
Nicholas Piggin | ec010c0 | 2020-03-26 00:29:03 +1000 | [diff] [blame] | 140 | cap_fwnmi = kvm_vm_check_extension(s, KVM_CAP_PPC_FWNMI); |
Daniel Henrique Barboza | c363a37 | 2017-08-09 17:43:46 -0300 | [diff] [blame] | 141 | /* |
| 142 | * Note: setting it to false because there is not such capability |
| 143 | * in KVM at this moment. |
| 144 | * |
| 145 | * TODO: call kvm_vm_check_extension() with the right capability |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 146 | * after the kernel starts implementing it. |
| 147 | */ |
Daniel Henrique Barboza | c363a37 | 2017-08-09 17:43:46 -0300 | [diff] [blame] | 148 | cap_ppc_pvr_compat = false; |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 149 | |
Shivaprasad G Bhat | 1e8f51e | 2019-07-25 09:15:08 -0500 | [diff] [blame] | 150 | if (!kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL)) { |
| 151 | error_report("KVM: Host kernel doesn't have level irq capability"); |
| 152 | exit(1); |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 153 | } |
| 154 | |
David Gibson | 165dc3e | 2019-10-30 17:20:35 +0100 | [diff] [blame] | 155 | kvm_ppc_register_host_cpu_type(); |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 156 | |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 157 | return 0; |
| 158 | } |
| 159 | |
Paolo Bonzini | 4376c40 | 2019-11-13 11:17:12 +0100 | [diff] [blame] | 160 | int kvm_arch_irqchip_create(KVMState *s) |
Paolo Bonzini | d525ffa | 2016-12-22 16:41:42 +0100 | [diff] [blame] | 161 | { |
| 162 | return 0; |
| 163 | } |
| 164 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 165 | static int kvm_arch_sync_sregs(PowerPCCPU *cpu) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 166 | { |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 167 | CPUPPCState *cenv = &cpu->env; |
| 168 | CPUState *cs = CPU(cpu); |
Alexander Graf | 861bbc80 | 2009-07-17 13:51:43 +0200 | [diff] [blame] | 169 | struct kvm_sregs sregs; |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 170 | int ret; |
| 171 | |
| 172 | if (cenv->excp_model == POWERPC_EXCP_BOOKE) { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 173 | /* |
| 174 | * What we're really trying to say is "if we're on BookE, we |
| 175 | * use the native PVR for now". This is the only sane way to |
| 176 | * check it though, so we potentially confuse users that they |
| 177 | * can run BookE guests on BookS. Let's hope nobody dares |
| 178 | * enough :) |
| 179 | */ |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 180 | return 0; |
| 181 | } else { |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 182 | if (!cap_segstate) { |
Alexander Graf | 64e07be | 2011-04-16 02:00:36 +0200 | [diff] [blame] | 183 | fprintf(stderr, "kvm error: missing PVR setting capability\n"); |
| 184 | return -ENOSYS; |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 185 | } |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 186 | } |
| 187 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 188 | ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 189 | if (ret) { |
| 190 | return ret; |
| 191 | } |
Alexander Graf | 861bbc80 | 2009-07-17 13:51:43 +0200 | [diff] [blame] | 192 | |
| 193 | sregs.pvr = cenv->spr[SPR_PVR]; |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 194 | return kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 195 | } |
| 196 | |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 197 | /* Set up a shared TLB array with KVM */ |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 198 | static int kvm_booke206_tlb_init(PowerPCCPU *cpu) |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 199 | { |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 200 | CPUPPCState *env = &cpu->env; |
| 201 | CPUState *cs = CPU(cpu); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 202 | struct kvm_book3e_206_tlb_params params = {}; |
| 203 | struct kvm_config_tlb cfg = {}; |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 204 | unsigned int entries = 0; |
| 205 | int ret, i; |
| 206 | |
| 207 | if (!kvm_enabled() || |
Andreas Färber | a60f24b | 2012-12-01 05:35:08 +0100 | [diff] [blame] | 208 | !kvm_check_extension(cs->kvm_state, KVM_CAP_SW_TLB)) { |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | assert(ARRAY_SIZE(params.tlb_sizes) == BOOKE206_MAX_TLBN); |
| 213 | |
| 214 | for (i = 0; i < BOOKE206_MAX_TLBN; i++) { |
| 215 | params.tlb_sizes[i] = booke206_tlb_size(env, i); |
| 216 | params.tlb_ways[i] = booke206_tlb_ways(env, i); |
| 217 | entries += params.tlb_sizes[i]; |
| 218 | } |
| 219 | |
| 220 | assert(entries == env->nb_tlb); |
| 221 | assert(sizeof(struct kvm_book3e_206_tlb_entry) == sizeof(ppcmas_tlb_t)); |
| 222 | |
| 223 | env->tlb_dirty = true; |
| 224 | |
| 225 | cfg.array = (uintptr_t)env->tlb.tlbm; |
| 226 | cfg.array_len = sizeof(ppcmas_tlb_t) * entries; |
| 227 | cfg.params = (uintptr_t)¶ms; |
| 228 | cfg.mmu_type = KVM_MMU_FSL_BOOKE_NOHV; |
| 229 | |
Cornelia Huck | 48add81 | 2014-04-09 17:21:57 +0200 | [diff] [blame] | 230 | ret = kvm_vcpu_enable_cap(cs, KVM_CAP_SW_TLB, 0, (uintptr_t)&cfg); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 231 | if (ret < 0) { |
| 232 | fprintf(stderr, "%s: couldn't enable KVM_CAP_SW_TLB: %s\n", |
| 233 | __func__, strerror(-ret)); |
| 234 | return ret; |
| 235 | } |
| 236 | |
| 237 | env->kvm_sw_tlb = true; |
| 238 | return 0; |
| 239 | } |
| 240 | |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 241 | |
| 242 | #if defined(TARGET_PPC64) |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 243 | static void kvm_get_smmu_info(struct kvm_ppc_smmu_info *info, Error **errp) |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 244 | { |
| 245 | int ret; |
| 246 | |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 247 | assert(kvm_state != NULL); |
| 248 | |
| 249 | if (!kvm_check_extension(kvm_state, KVM_CAP_PPC_GET_SMMU_INFO)) { |
Greg Kurz | 71d0f1e | 2018-06-29 11:48:16 +0200 | [diff] [blame] | 250 | error_setg(errp, "KVM doesn't expose the MMU features it supports"); |
| 251 | error_append_hint(errp, "Consider switching to a newer KVM\n"); |
| 252 | return; |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 255 | ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_SMMU_INFO, info); |
Greg Kurz | 71d0f1e | 2018-06-29 11:48:16 +0200 | [diff] [blame] | 256 | if (ret == 0) { |
| 257 | return; |
| 258 | } |
| 259 | |
| 260 | error_setg_errno(errp, -ret, |
| 261 | "KVM failed to provide the MMU features it supports"); |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 262 | } |
| 263 | |
Sam Bobroff | c64abd1 | 2017-03-20 10:46:43 +1100 | [diff] [blame] | 264 | struct ppc_radix_page_info *kvm_get_radix_page_info(void) |
| 265 | { |
Philippe Mathieu-Daudé | 4f7f589 | 2020-01-21 12:03:48 +0100 | [diff] [blame] | 266 | KVMState *s = KVM_STATE(current_accel()); |
Sam Bobroff | c64abd1 | 2017-03-20 10:46:43 +1100 | [diff] [blame] | 267 | struct ppc_radix_page_info *radix_page_info; |
| 268 | struct kvm_ppc_rmmu_info rmmu_info; |
| 269 | int i; |
| 270 | |
| 271 | if (!kvm_check_extension(s, KVM_CAP_PPC_MMU_RADIX)) { |
| 272 | return NULL; |
| 273 | } |
| 274 | if (kvm_vm_ioctl(s, KVM_PPC_GET_RMMU_INFO, &rmmu_info)) { |
| 275 | return NULL; |
| 276 | } |
| 277 | radix_page_info = g_malloc0(sizeof(*radix_page_info)); |
| 278 | radix_page_info->count = 0; |
| 279 | for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { |
| 280 | if (rmmu_info.ap_encodings[i]) { |
| 281 | radix_page_info->entries[i] = rmmu_info.ap_encodings[i]; |
| 282 | radix_page_info->count++; |
| 283 | } |
| 284 | } |
| 285 | return radix_page_info; |
| 286 | } |
| 287 | |
Suraj Jitindar Singh | b4db541 | 2017-03-20 10:46:46 +1100 | [diff] [blame] | 288 | target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, |
| 289 | bool radix, bool gtse, |
| 290 | uint64_t proc_tbl) |
| 291 | { |
| 292 | CPUState *cs = CPU(cpu); |
| 293 | int ret; |
| 294 | uint64_t flags = 0; |
| 295 | struct kvm_ppc_mmuv3_cfg cfg = { |
| 296 | .process_table = proc_tbl, |
| 297 | }; |
| 298 | |
| 299 | if (radix) { |
| 300 | flags |= KVM_PPC_MMUV3_RADIX; |
| 301 | } |
| 302 | if (gtse) { |
| 303 | flags |= KVM_PPC_MMUV3_GTSE; |
| 304 | } |
| 305 | cfg.flags = flags; |
| 306 | ret = kvm_vm_ioctl(cs->kvm_state, KVM_PPC_CONFIGURE_V3_MMU, &cfg); |
| 307 | switch (ret) { |
| 308 | case 0: |
| 309 | return H_SUCCESS; |
| 310 | case -EINVAL: |
| 311 | return H_PARAMETER; |
| 312 | case -ENODEV: |
| 313 | return H_NOT_AVAILABLE; |
| 314 | default: |
| 315 | return H_HARDWARE; |
| 316 | } |
| 317 | } |
| 318 | |
David Gibson | 24c6863 | 2018-06-14 12:11:08 +1000 | [diff] [blame] | 319 | bool kvmppc_hpt_needs_host_contiguous_pages(void) |
| 320 | { |
David Gibson | 24c6863 | 2018-06-14 12:11:08 +1000 | [diff] [blame] | 321 | static struct kvm_ppc_smmu_info smmu_info; |
| 322 | |
| 323 | if (!kvm_enabled()) { |
| 324 | return false; |
| 325 | } |
| 326 | |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 327 | kvm_get_smmu_info(&smmu_info, &error_fatal); |
David Gibson | 24c6863 | 2018-06-14 12:11:08 +1000 | [diff] [blame] | 328 | return !!(smmu_info.flags & KVM_PPC_PAGE_SIZES_REAL); |
| 329 | } |
| 330 | |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 331 | void kvm_check_mmu(PowerPCCPU *cpu, Error **errp) |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 332 | { |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 333 | struct kvm_ppc_smmu_info smmu_info; |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 334 | int iq, ik, jq, jk; |
Greg Kurz | 71d0f1e | 2018-06-29 11:48:16 +0200 | [diff] [blame] | 335 | Error *local_err = NULL; |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 336 | |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 337 | /* For now, we only have anything to check on hash64 MMUs */ |
| 338 | if (!cpu->hash64_opts || !kvm_enabled()) { |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 339 | return; |
| 340 | } |
| 341 | |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 342 | kvm_get_smmu_info(&smmu_info, &local_err); |
Greg Kurz | 71d0f1e | 2018-06-29 11:48:16 +0200 | [diff] [blame] | 343 | if (local_err) { |
| 344 | error_propagate(errp, local_err); |
| 345 | return; |
| 346 | } |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 347 | |
| 348 | if (ppc_hash64_has(cpu, PPC_HASH64_1TSEG) |
| 349 | && !(smmu_info.flags & KVM_PPC_1T_SEGMENTS)) { |
| 350 | error_setg(errp, |
| 351 | "KVM does not support 1TiB segments which guest expects"); |
| 352 | return; |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 353 | } |
| 354 | |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 355 | if (smmu_info.slb_size < cpu->hash64_opts->slb_size) { |
| 356 | error_setg(errp, "KVM only supports %u SLB entries, but guest needs %u", |
| 357 | smmu_info.slb_size, cpu->hash64_opts->slb_size); |
| 358 | return; |
Benjamin Herrenschmidt | 90da0d5 | 2015-10-22 18:30:59 +1100 | [diff] [blame] | 359 | } |
| 360 | |
Alexander Graf | 08215d8 | 2014-05-11 18:37:00 +0200 | [diff] [blame] | 361 | /* |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 362 | * Verify that every pagesize supported by the cpu model is |
| 363 | * supported by KVM with the same encodings |
Alexander Graf | 08215d8 | 2014-05-11 18:37:00 +0200 | [diff] [blame] | 364 | */ |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 365 | for (iq = 0; iq < ARRAY_SIZE(cpu->hash64_opts->sps); iq++) { |
David Gibson | b07c59f | 2018-03-23 13:31:52 +1100 | [diff] [blame] | 366 | PPCHash64SegmentPageSizes *qsps = &cpu->hash64_opts->sps[iq]; |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 367 | struct kvm_ppc_one_seg_page_size *ksps; |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 368 | |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 369 | for (ik = 0; ik < ARRAY_SIZE(smmu_info.sps); ik++) { |
| 370 | if (qsps->page_shift == smmu_info.sps[ik].page_shift) { |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 371 | break; |
| 372 | } |
| 373 | } |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 374 | if (ik >= ARRAY_SIZE(smmu_info.sps)) { |
| 375 | error_setg(errp, "KVM doesn't support for base page shift %u", |
| 376 | qsps->page_shift); |
| 377 | return; |
| 378 | } |
| 379 | |
| 380 | ksps = &smmu_info.sps[ik]; |
| 381 | if (ksps->slb_enc != qsps->slb_enc) { |
| 382 | error_setg(errp, |
| 383 | "KVM uses SLB encoding 0x%x for page shift %u, but guest expects 0x%x", |
| 384 | ksps->slb_enc, ksps->page_shift, qsps->slb_enc); |
| 385 | return; |
| 386 | } |
| 387 | |
| 388 | for (jq = 0; jq < ARRAY_SIZE(qsps->enc); jq++) { |
| 389 | for (jk = 0; jk < ARRAY_SIZE(ksps->enc); jk++) { |
| 390 | if (qsps->enc[jq].page_shift == ksps->enc[jk].page_shift) { |
| 391 | break; |
| 392 | } |
| 393 | } |
| 394 | |
| 395 | if (jk >= ARRAY_SIZE(ksps->enc)) { |
| 396 | error_setg(errp, "KVM doesn't support page shift %u/%u", |
| 397 | qsps->enc[jq].page_shift, qsps->page_shift); |
| 398 | return; |
| 399 | } |
| 400 | if (qsps->enc[jq].pte_enc != ksps->enc[jk].pte_enc) { |
| 401 | error_setg(errp, |
| 402 | "KVM uses PTE encoding 0x%x for page shift %u/%u, but guest expects 0x%x", |
| 403 | ksps->enc[jk].pte_enc, qsps->enc[jq].page_shift, |
| 404 | qsps->page_shift, qsps->enc[jq].pte_enc); |
| 405 | return; |
| 406 | } |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 407 | } |
| 408 | } |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 409 | |
| 410 | if (ppc_hash64_has(cpu, PPC_HASH64_CI_LARGEPAGE)) { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 411 | /* |
| 412 | * Mostly what guest pagesizes we can use are related to the |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 413 | * host pages used to map guest RAM, which is handled in the |
| 414 | * platform code. Cache-Inhibited largepages (64k) however are |
| 415 | * used for I/O, so if they're mapped to the host at all it |
| 416 | * will be a normal mapping, not a special hugepage one used |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 417 | * for RAM. |
| 418 | */ |
Wei Yang | 038adc2 | 2019-10-13 10:11:45 +0800 | [diff] [blame] | 419 | if (qemu_real_host_page_size < 0x10000) { |
David Gibson | e5ca28e | 2018-04-16 16:19:52 +1000 | [diff] [blame] | 420 | error_setg(errp, |
| 421 | "KVM can't supply 64kiB CI pages, which guest expects"); |
| 422 | } |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 423 | } |
| 424 | } |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 425 | #endif /* !defined (TARGET_PPC64) */ |
| 426 | |
Eduardo Habkost | b164e48 | 2013-01-22 18:25:01 -0200 | [diff] [blame] | 427 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
| 428 | { |
Sam Bobroff | 2e886fb | 2017-08-09 15:38:56 +1000 | [diff] [blame] | 429 | return POWERPC_CPU(cpu)->vcpu_id; |
Eduardo Habkost | b164e48 | 2013-01-22 18:25:01 -0200 | [diff] [blame] | 430 | } |
| 431 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 432 | /* |
| 433 | * e500 supports 2 h/w breakpoint and 2 watchpoint. book3s supports |
| 434 | * only 1 watchpoint, so array size of 4 is sufficient for now. |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 435 | */ |
| 436 | #define MAX_HW_BKPTS 4 |
| 437 | |
| 438 | static struct HWBreakpoint { |
| 439 | target_ulong addr; |
| 440 | int type; |
| 441 | } hw_debug_points[MAX_HW_BKPTS]; |
| 442 | |
| 443 | static CPUWatchpoint hw_watchpoint; |
| 444 | |
| 445 | /* Default there is no breakpoint and watchpoint supported */ |
| 446 | static int max_hw_breakpoint; |
| 447 | static int max_hw_watchpoint; |
| 448 | static int nb_hw_breakpoint; |
| 449 | static int nb_hw_watchpoint; |
| 450 | |
| 451 | static void kvmppc_hw_debug_points_init(CPUPPCState *cenv) |
| 452 | { |
| 453 | if (cenv->excp_model == POWERPC_EXCP_BOOKE) { |
| 454 | max_hw_breakpoint = 2; |
| 455 | max_hw_watchpoint = 2; |
| 456 | } |
| 457 | |
| 458 | if ((max_hw_breakpoint + max_hw_watchpoint) > MAX_HW_BKPTS) { |
| 459 | fprintf(stderr, "Error initializing h/w breakpoints\n"); |
| 460 | return; |
| 461 | } |
| 462 | } |
| 463 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 464 | int kvm_arch_init_vcpu(CPUState *cs) |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 465 | { |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 466 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 467 | CPUPPCState *cenv = &cpu->env; |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 468 | int ret; |
| 469 | |
Benjamin Herrenschmidt | 4656e1f | 2012-06-18 19:56:25 +0000 | [diff] [blame] | 470 | /* Synchronize sregs with kvm */ |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 471 | ret = kvm_arch_sync_sregs(cpu); |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 472 | if (ret) { |
Thomas Huth | 388e47c | 2016-02-18 22:01:56 +0100 | [diff] [blame] | 473 | if (ret == -EINVAL) { |
| 474 | error_report("Register sync failed... If you're using kvm-hv.ko," |
| 475 | " only \"-cpu host\" is possible"); |
| 476 | } |
Scott Wood | 5666ca4 | 2011-04-11 18:34:34 -0500 | [diff] [blame] | 477 | return ret; |
| 478 | } |
Alexander Graf | 861bbc80 | 2009-07-17 13:51:43 +0200 | [diff] [blame] | 479 | |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 480 | switch (cenv->mmu_model) { |
| 481 | case POWERPC_MMU_BOOKE206: |
Thomas Huth | 7f516c9 | 2016-09-29 12:48:07 +0200 | [diff] [blame] | 482 | /* This target supports access to KVM's guest TLB */ |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 483 | ret = kvm_booke206_tlb_init(cpu); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 484 | break; |
Thomas Huth | 7f516c9 | 2016-09-29 12:48:07 +0200 | [diff] [blame] | 485 | case POWERPC_MMU_2_07: |
| 486 | if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 487 | /* |
| 488 | * KVM-HV has transactional memory on POWER8 also without |
| 489 | * the KVM_CAP_PPC_HTM extension, so enable it here |
zhaolichang | 136fbf6 | 2020-10-09 14:44:37 +0800 | [diff] [blame] | 490 | * instead as long as it's available to userspace on the |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 491 | * host. |
| 492 | */ |
Sam Bobroff | f3d9f30 | 2017-03-29 16:01:28 +1100 | [diff] [blame] | 493 | if (qemu_getauxval(AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) { |
| 494 | cap_htm = true; |
| 495 | } |
Thomas Huth | 7f516c9 | 2016-09-29 12:48:07 +0200 | [diff] [blame] | 496 | } |
| 497 | break; |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 498 | default: |
| 499 | break; |
| 500 | } |
| 501 | |
Bharat Bhushan | 3c902d4 | 2014-07-14 14:45:35 +0530 | [diff] [blame] | 502 | kvm_get_one_reg(cs, KVM_REG_PPC_DEBUG_INST, &debug_inst_opcode); |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 503 | kvmppc_hw_debug_points_init(cenv); |
Bharat Bhushan | 3c902d4 | 2014-07-14 14:45:35 +0530 | [diff] [blame] | 504 | |
Alexander Graf | 861bbc80 | 2009-07-17 13:51:43 +0200 | [diff] [blame] | 505 | return ret; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 506 | } |
| 507 | |
Liran Alon | b1115c9 | 2019-06-19 19:21:32 +0300 | [diff] [blame] | 508 | int kvm_arch_destroy_vcpu(CPUState *cs) |
| 509 | { |
| 510 | return 0; |
| 511 | } |
| 512 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 513 | static void kvm_sw_tlb_put(PowerPCCPU *cpu) |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 514 | { |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 515 | CPUPPCState *env = &cpu->env; |
| 516 | CPUState *cs = CPU(cpu); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 517 | struct kvm_dirty_tlb dirty_tlb; |
| 518 | unsigned char *bitmap; |
| 519 | int ret; |
| 520 | |
| 521 | if (!env->kvm_sw_tlb) { |
| 522 | return; |
| 523 | } |
| 524 | |
| 525 | bitmap = g_malloc((env->nb_tlb + 7) / 8); |
| 526 | memset(bitmap, 0xFF, (env->nb_tlb + 7) / 8); |
| 527 | |
| 528 | dirty_tlb.bitmap = (uintptr_t)bitmap; |
| 529 | dirty_tlb.num_dirty = env->nb_tlb; |
| 530 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 531 | ret = kvm_vcpu_ioctl(cs, KVM_DIRTY_TLB, &dirty_tlb); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 532 | if (ret) { |
| 533 | fprintf(stderr, "%s: KVM_DIRTY_TLB: %s\n", |
| 534 | __func__, strerror(-ret)); |
| 535 | } |
| 536 | |
| 537 | g_free(bitmap); |
| 538 | } |
| 539 | |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 540 | static void kvm_get_one_spr(CPUState *cs, uint64_t id, int spr) |
| 541 | { |
| 542 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 543 | CPUPPCState *env = &cpu->env; |
| 544 | union { |
| 545 | uint32_t u32; |
| 546 | uint64_t u64; |
| 547 | } val; |
| 548 | struct kvm_one_reg reg = { |
| 549 | .id = id, |
| 550 | .addr = (uintptr_t) &val, |
| 551 | }; |
| 552 | int ret; |
| 553 | |
| 554 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 555 | if (ret != 0) { |
Alexey Kardashevskiy | b36f100 | 2014-02-04 15:12:34 +1100 | [diff] [blame] | 556 | trace_kvm_failed_spr_get(spr, strerror(errno)); |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 557 | } else { |
| 558 | switch (id & KVM_REG_SIZE_MASK) { |
| 559 | case KVM_REG_SIZE_U32: |
| 560 | env->spr[spr] = val.u32; |
| 561 | break; |
| 562 | |
| 563 | case KVM_REG_SIZE_U64: |
| 564 | env->spr[spr] = val.u64; |
| 565 | break; |
| 566 | |
| 567 | default: |
| 568 | /* Don't handle this size yet */ |
| 569 | abort(); |
| 570 | } |
| 571 | } |
| 572 | } |
| 573 | |
| 574 | static void kvm_put_one_spr(CPUState *cs, uint64_t id, int spr) |
| 575 | { |
| 576 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 577 | CPUPPCState *env = &cpu->env; |
| 578 | union { |
| 579 | uint32_t u32; |
| 580 | uint64_t u64; |
| 581 | } val; |
| 582 | struct kvm_one_reg reg = { |
| 583 | .id = id, |
| 584 | .addr = (uintptr_t) &val, |
| 585 | }; |
| 586 | int ret; |
| 587 | |
| 588 | switch (id & KVM_REG_SIZE_MASK) { |
| 589 | case KVM_REG_SIZE_U32: |
| 590 | val.u32 = env->spr[spr]; |
| 591 | break; |
| 592 | |
| 593 | case KVM_REG_SIZE_U64: |
| 594 | val.u64 = env->spr[spr]; |
| 595 | break; |
| 596 | |
| 597 | default: |
| 598 | /* Don't handle this size yet */ |
| 599 | abort(); |
| 600 | } |
| 601 | |
| 602 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 603 | if (ret != 0) { |
Alexey Kardashevskiy | b36f100 | 2014-02-04 15:12:34 +1100 | [diff] [blame] | 604 | trace_kvm_failed_spr_set(spr, strerror(errno)); |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 605 | } |
| 606 | } |
| 607 | |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 608 | static int kvm_put_fp(CPUState *cs) |
| 609 | { |
| 610 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 611 | CPUPPCState *env = &cpu->env; |
| 612 | struct kvm_one_reg reg; |
| 613 | int i; |
| 614 | int ret; |
| 615 | |
| 616 | if (env->insns_flags & PPC_FLOAT) { |
| 617 | uint64_t fpscr = env->fpscr; |
| 618 | bool vsx = !!(env->insns_flags2 & PPC2_VSX); |
| 619 | |
| 620 | reg.id = KVM_REG_PPC_FPSCR; |
| 621 | reg.addr = (uintptr_t)&fpscr; |
| 622 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 623 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 624 | trace_kvm_failed_fpscr_set(strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 625 | return ret; |
| 626 | } |
| 627 | |
| 628 | for (i = 0; i < 32; i++) { |
| 629 | uint64_t vsr[2]; |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 630 | uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); |
| 631 | uint64_t *vsrl = cpu_vsrl_ptr(&cpu->env, i); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 632 | |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 633 | #ifdef HOST_WORDS_BIGENDIAN |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 634 | vsr[0] = float64_val(*fpr); |
| 635 | vsr[1] = *vsrl; |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 636 | #else |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 637 | vsr[0] = *vsrl; |
| 638 | vsr[1] = float64_val(*fpr); |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 639 | #endif |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 640 | reg.addr = (uintptr_t) &vsr; |
| 641 | reg.id = vsx ? KVM_REG_PPC_VSR(i) : KVM_REG_PPC_FPR(i); |
| 642 | |
| 643 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 644 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 645 | trace_kvm_failed_fp_set(vsx ? "VSR" : "FPR", i, |
| 646 | strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 647 | return ret; |
| 648 | } |
| 649 | } |
| 650 | } |
| 651 | |
| 652 | if (env->insns_flags & PPC_ALTIVEC) { |
| 653 | reg.id = KVM_REG_PPC_VSCR; |
| 654 | reg.addr = (uintptr_t)&env->vscr; |
| 655 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 656 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 657 | trace_kvm_failed_vscr_set(strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 658 | return ret; |
| 659 | } |
| 660 | |
| 661 | for (i = 0; i < 32; i++) { |
| 662 | reg.id = KVM_REG_PPC_VR(i); |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 663 | reg.addr = (uintptr_t)cpu_avr_ptr(env, i); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 664 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 665 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 666 | trace_kvm_failed_vr_set(i, strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 667 | return ret; |
| 668 | } |
| 669 | } |
| 670 | } |
| 671 | |
| 672 | return 0; |
| 673 | } |
| 674 | |
| 675 | static int kvm_get_fp(CPUState *cs) |
| 676 | { |
| 677 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 678 | CPUPPCState *env = &cpu->env; |
| 679 | struct kvm_one_reg reg; |
| 680 | int i; |
| 681 | int ret; |
| 682 | |
| 683 | if (env->insns_flags & PPC_FLOAT) { |
| 684 | uint64_t fpscr; |
| 685 | bool vsx = !!(env->insns_flags2 & PPC2_VSX); |
| 686 | |
| 687 | reg.id = KVM_REG_PPC_FPSCR; |
| 688 | reg.addr = (uintptr_t)&fpscr; |
| 689 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 690 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 691 | trace_kvm_failed_fpscr_get(strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 692 | return ret; |
| 693 | } else { |
| 694 | env->fpscr = fpscr; |
| 695 | } |
| 696 | |
| 697 | for (i = 0; i < 32; i++) { |
| 698 | uint64_t vsr[2]; |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 699 | uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); |
| 700 | uint64_t *vsrl = cpu_vsrl_ptr(&cpu->env, i); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 701 | |
| 702 | reg.addr = (uintptr_t) &vsr; |
| 703 | reg.id = vsx ? KVM_REG_PPC_VSR(i) : KVM_REG_PPC_FPR(i); |
| 704 | |
| 705 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 706 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 707 | trace_kvm_failed_fp_get(vsx ? "VSR" : "FPR", i, |
| 708 | strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 709 | return ret; |
| 710 | } else { |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 711 | #ifdef HOST_WORDS_BIGENDIAN |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 712 | *fpr = vsr[0]; |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 713 | if (vsx) { |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 714 | *vsrl = vsr[1]; |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 715 | } |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 716 | #else |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 717 | *fpr = vsr[1]; |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 718 | if (vsx) { |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 719 | *vsrl = vsr[0]; |
Greg Kurz | 3a4b791 | 2016-01-15 16:00:12 +0100 | [diff] [blame] | 720 | } |
| 721 | #endif |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 722 | } |
| 723 | } |
| 724 | } |
| 725 | |
| 726 | if (env->insns_flags & PPC_ALTIVEC) { |
| 727 | reg.id = KVM_REG_PPC_VSCR; |
| 728 | reg.addr = (uintptr_t)&env->vscr; |
| 729 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 730 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 731 | trace_kvm_failed_vscr_get(strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 732 | return ret; |
| 733 | } |
| 734 | |
| 735 | for (i = 0; i < 32; i++) { |
| 736 | reg.id = KVM_REG_PPC_VR(i); |
Mark Cave-Ayland | ef96e3a | 2019-01-02 09:14:22 +0000 | [diff] [blame] | 737 | reg.addr = (uintptr_t)cpu_avr_ptr(env, i); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 738 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 739 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 740 | trace_kvm_failed_vr_get(i, strerror(errno)); |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 741 | return ret; |
| 742 | } |
| 743 | } |
| 744 | } |
| 745 | |
| 746 | return 0; |
| 747 | } |
| 748 | |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 749 | #if defined(TARGET_PPC64) |
| 750 | static int kvm_get_vpa(CPUState *cs) |
| 751 | { |
| 752 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
David Gibson | ce2918c | 2019-03-06 15:35:37 +1100 | [diff] [blame] | 753 | SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 754 | struct kvm_one_reg reg; |
| 755 | int ret; |
| 756 | |
| 757 | reg.id = KVM_REG_PPC_VPA_ADDR; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 758 | reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 759 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 760 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 761 | trace_kvm_failed_vpa_addr_get(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 762 | return ret; |
| 763 | } |
| 764 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 765 | assert((uintptr_t)&spapr_cpu->slb_shadow_size |
| 766 | == ((uintptr_t)&spapr_cpu->slb_shadow_addr + 8)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 767 | reg.id = KVM_REG_PPC_VPA_SLB; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 768 | reg.addr = (uintptr_t)&spapr_cpu->slb_shadow_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 769 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 770 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 771 | trace_kvm_failed_slb_get(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 772 | return ret; |
| 773 | } |
| 774 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 775 | assert((uintptr_t)&spapr_cpu->dtl_size |
| 776 | == ((uintptr_t)&spapr_cpu->dtl_addr + 8)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 777 | reg.id = KVM_REG_PPC_VPA_DTL; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 778 | reg.addr = (uintptr_t)&spapr_cpu->dtl_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 779 | ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); |
| 780 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 781 | trace_kvm_failed_dtl_get(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 782 | return ret; |
| 783 | } |
| 784 | |
| 785 | return 0; |
| 786 | } |
| 787 | |
| 788 | static int kvm_put_vpa(CPUState *cs) |
| 789 | { |
| 790 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
David Gibson | ce2918c | 2019-03-06 15:35:37 +1100 | [diff] [blame] | 791 | SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 792 | struct kvm_one_reg reg; |
| 793 | int ret; |
| 794 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 795 | /* |
| 796 | * SLB shadow or DTL can't be registered unless a master VPA is |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 797 | * registered. That means when restoring state, if a VPA *is* |
| 798 | * registered, we need to set that up first. If not, we need to |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 799 | * deregister the others before deregistering the master VPA |
| 800 | */ |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 801 | assert(spapr_cpu->vpa_addr |
| 802 | || !(spapr_cpu->slb_shadow_addr || spapr_cpu->dtl_addr)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 803 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 804 | if (spapr_cpu->vpa_addr) { |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 805 | reg.id = KVM_REG_PPC_VPA_ADDR; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 806 | reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 807 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 808 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 809 | trace_kvm_failed_vpa_addr_set(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 810 | return ret; |
| 811 | } |
| 812 | } |
| 813 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 814 | assert((uintptr_t)&spapr_cpu->slb_shadow_size |
| 815 | == ((uintptr_t)&spapr_cpu->slb_shadow_addr + 8)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 816 | reg.id = KVM_REG_PPC_VPA_SLB; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 817 | reg.addr = (uintptr_t)&spapr_cpu->slb_shadow_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 818 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 819 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 820 | trace_kvm_failed_slb_set(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 821 | return ret; |
| 822 | } |
| 823 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 824 | assert((uintptr_t)&spapr_cpu->dtl_size |
| 825 | == ((uintptr_t)&spapr_cpu->dtl_addr + 8)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 826 | reg.id = KVM_REG_PPC_VPA_DTL; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 827 | reg.addr = (uintptr_t)&spapr_cpu->dtl_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 828 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 829 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 830 | trace_kvm_failed_dtl_set(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 831 | return ret; |
| 832 | } |
| 833 | |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 834 | if (!spapr_cpu->vpa_addr) { |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 835 | reg.id = KVM_REG_PPC_VPA_ADDR; |
David Gibson | 7388efa | 2018-06-13 16:22:18 +1000 | [diff] [blame] | 836 | reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 837 | ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 838 | if (ret < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 839 | trace_kvm_failed_null_vpa_addr_set(strerror(errno)); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 840 | return ret; |
| 841 | } |
| 842 | } |
| 843 | |
| 844 | return 0; |
| 845 | } |
| 846 | #endif /* TARGET_PPC64 */ |
| 847 | |
David Gibson | e5c0d3c | 2016-03-08 11:33:46 +1100 | [diff] [blame] | 848 | int kvmppc_put_books_sregs(PowerPCCPU *cpu) |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 849 | { |
| 850 | CPUPPCState *env = &cpu->env; |
| 851 | struct kvm_sregs sregs; |
| 852 | int i; |
| 853 | |
| 854 | sregs.pvr = env->spr[SPR_PVR]; |
| 855 | |
Greg Kurz | 1ec26c7 | 2017-09-25 13:00:02 +0200 | [diff] [blame] | 856 | if (cpu->vhyp) { |
| 857 | PPCVirtualHypervisorClass *vhc = |
| 858 | PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); |
| 859 | sregs.u.s.sdr1 = vhc->encode_hpt_for_kvm_pr(cpu->vhyp); |
| 860 | } else { |
| 861 | sregs.u.s.sdr1 = env->spr[SPR_SDR1]; |
| 862 | } |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 863 | |
| 864 | /* Sync SLB */ |
| 865 | #ifdef TARGET_PPC64 |
| 866 | for (i = 0; i < ARRAY_SIZE(env->slb); i++) { |
| 867 | sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid; |
| 868 | if (env->slb[i].esid & SLB_ESID_V) { |
| 869 | sregs.u.s.ppc64.slb[i].slbe |= i; |
| 870 | } |
| 871 | sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid; |
| 872 | } |
| 873 | #endif |
| 874 | |
| 875 | /* Sync SRs */ |
| 876 | for (i = 0; i < 16; i++) { |
| 877 | sregs.u.s.ppc32.sr[i] = env->sr[i]; |
| 878 | } |
| 879 | |
| 880 | /* Sync BATs */ |
| 881 | for (i = 0; i < 8; i++) { |
| 882 | /* Beware. We have to swap upper and lower bits here */ |
| 883 | sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32) |
| 884 | | env->DBAT[1][i]; |
| 885 | sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32) |
| 886 | | env->IBAT[1][i]; |
| 887 | } |
| 888 | |
| 889 | return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs); |
| 890 | } |
| 891 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 892 | int kvm_arch_put_registers(CPUState *cs, int level) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 893 | { |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 894 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 895 | CPUPPCState *env = &cpu->env; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 896 | struct kvm_regs regs; |
| 897 | int ret; |
| 898 | int i; |
| 899 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 900 | ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
| 901 | if (ret < 0) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 902 | return ret; |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 903 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 904 | |
| 905 | regs.ctr = env->ctr; |
| 906 | regs.lr = env->lr; |
Richard Henderson | da91a00 | 2013-02-19 23:52:13 -0800 | [diff] [blame] | 907 | regs.xer = cpu_read_xer(env); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 908 | regs.msr = env->msr; |
| 909 | regs.pc = env->nip; |
| 910 | |
| 911 | regs.srr0 = env->spr[SPR_SRR0]; |
| 912 | regs.srr1 = env->spr[SPR_SRR1]; |
| 913 | |
| 914 | regs.sprg0 = env->spr[SPR_SPRG0]; |
| 915 | regs.sprg1 = env->spr[SPR_SPRG1]; |
| 916 | regs.sprg2 = env->spr[SPR_SPRG2]; |
| 917 | regs.sprg3 = env->spr[SPR_SPRG3]; |
| 918 | regs.sprg4 = env->spr[SPR_SPRG4]; |
| 919 | regs.sprg5 = env->spr[SPR_SPRG5]; |
| 920 | regs.sprg6 = env->spr[SPR_SPRG6]; |
| 921 | regs.sprg7 = env->spr[SPR_SPRG7]; |
| 922 | |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 923 | regs.pid = env->spr[SPR_BOOKE_PID]; |
| 924 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 925 | for (i = 0; i < 32; i++) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 926 | regs.gpr[i] = env->gpr[i]; |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 927 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 928 | |
Alexey Kardashevskiy | 4bddaf5 | 2013-06-15 11:51:51 +1000 | [diff] [blame] | 929 | regs.cr = 0; |
| 930 | for (i = 0; i < 8; i++) { |
| 931 | regs.cr |= (env->crf[i] & 15) << (4 * (7 - i)); |
| 932 | } |
| 933 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 934 | ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 935 | if (ret < 0) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 936 | return ret; |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 937 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 938 | |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 939 | kvm_put_fp(cs); |
| 940 | |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 941 | if (env->tlb_dirty) { |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 942 | kvm_sw_tlb_put(cpu); |
Scott Wood | 93dd5e8 | 2011-08-31 11:26:56 +0000 | [diff] [blame] | 943 | env->tlb_dirty = false; |
| 944 | } |
| 945 | |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 946 | if (cap_segstate && (level >= KVM_PUT_RESET_STATE)) { |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 947 | ret = kvmppc_put_books_sregs(cpu); |
| 948 | if (ret < 0) { |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 949 | return ret; |
| 950 | } |
| 951 | } |
| 952 | |
| 953 | if (cap_hior && (level >= KVM_PUT_RESET_STATE)) { |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 954 | kvm_put_one_spr(cs, KVM_REG_PPC_HIOR, SPR_HIOR); |
| 955 | } |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 956 | |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 957 | if (cap_one_reg) { |
| 958 | int i; |
| 959 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 960 | /* |
| 961 | * We deliberately ignore errors here, for kernels which have |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 962 | * the ONE_REG calls, but don't support the specific |
| 963 | * registers, there's a reasonable chance things will still |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 964 | * work, at least until we try to migrate. |
| 965 | */ |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 966 | for (i = 0; i < 1024; i++) { |
| 967 | uint64_t id = env->spr_cb[i].one_reg_id; |
| 968 | |
| 969 | if (id != 0) { |
| 970 | kvm_put_one_spr(cs, id, i); |
| 971 | } |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 972 | } |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 973 | |
| 974 | #ifdef TARGET_PPC64 |
Alexey Kardashevskiy | 80b3f79 | 2014-06-04 22:51:00 +1000 | [diff] [blame] | 975 | if (msr_ts) { |
| 976 | for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) { |
| 977 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]); |
| 978 | } |
| 979 | for (i = 0; i < ARRAY_SIZE(env->tm_vsr); i++) { |
| 980 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_VSR(i), &env->tm_vsr[i]); |
| 981 | } |
| 982 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_CR, &env->tm_cr); |
| 983 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_LR, &env->tm_lr); |
| 984 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_CTR, &env->tm_ctr); |
| 985 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_FPSCR, &env->tm_fpscr); |
| 986 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_AMR, &env->tm_amr); |
| 987 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_PPR, &env->tm_ppr); |
| 988 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_VRSAVE, &env->tm_vrsave); |
| 989 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_VSCR, &env->tm_vscr); |
| 990 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_DSCR, &env->tm_dscr); |
| 991 | kvm_set_one_reg(cs, KVM_REG_PPC_TM_TAR, &env->tm_tar); |
| 992 | } |
| 993 | |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 994 | if (cap_papr) { |
| 995 | if (kvm_put_vpa(cs) < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 996 | trace_kvm_failed_put_vpa(); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 997 | } |
| 998 | } |
Alexey Kardashevskiy | 98a8b52 | 2014-05-01 20:37:09 +1000 | [diff] [blame] | 999 | |
| 1000 | kvm_set_one_reg(cs, KVM_REG_PPC_TB_OFFSET, &env->tb_env->tb_offset); |
Alexey Kardashevskiy | 972bd57 | 2019-09-23 18:41:10 +1000 | [diff] [blame] | 1001 | |
| 1002 | if (level > KVM_PUT_RUNTIME_STATE) { |
| 1003 | kvm_put_one_spr(cs, KVM_REG_PPC_DPDES, SPR_DPDES); |
| 1004 | } |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 1005 | #endif /* TARGET_PPC64 */ |
David Gibson | f1af19d | 2012-09-12 16:57:09 +0000 | [diff] [blame] | 1006 | } |
| 1007 | |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1008 | return ret; |
| 1009 | } |
| 1010 | |
Bharat Bhushan | c371c2e | 2014-07-14 14:45:36 +0530 | [diff] [blame] | 1011 | static void kvm_sync_excp(CPUPPCState *env, int vector, int ivor) |
| 1012 | { |
| 1013 | env->excp_vectors[vector] = env->spr[ivor] + env->spr[SPR_BOOKE_IVPR]; |
| 1014 | } |
| 1015 | |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 1016 | static int kvmppc_get_booke_sregs(PowerPCCPU *cpu) |
| 1017 | { |
| 1018 | CPUPPCState *env = &cpu->env; |
| 1019 | struct kvm_sregs sregs; |
| 1020 | int ret; |
| 1021 | |
| 1022 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs); |
| 1023 | if (ret < 0) { |
| 1024 | return ret; |
| 1025 | } |
| 1026 | |
| 1027 | if (sregs.u.e.features & KVM_SREGS_E_BASE) { |
| 1028 | env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0; |
| 1029 | env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1; |
| 1030 | env->spr[SPR_BOOKE_ESR] = sregs.u.e.esr; |
| 1031 | env->spr[SPR_BOOKE_DEAR] = sregs.u.e.dear; |
| 1032 | env->spr[SPR_BOOKE_MCSR] = sregs.u.e.mcsr; |
| 1033 | env->spr[SPR_BOOKE_TSR] = sregs.u.e.tsr; |
| 1034 | env->spr[SPR_BOOKE_TCR] = sregs.u.e.tcr; |
| 1035 | env->spr[SPR_DECR] = sregs.u.e.dec; |
| 1036 | env->spr[SPR_TBL] = sregs.u.e.tb & 0xffffffff; |
| 1037 | env->spr[SPR_TBU] = sregs.u.e.tb >> 32; |
| 1038 | env->spr[SPR_VRSAVE] = sregs.u.e.vrsave; |
| 1039 | } |
| 1040 | |
| 1041 | if (sregs.u.e.features & KVM_SREGS_E_ARCH206) { |
| 1042 | env->spr[SPR_BOOKE_PIR] = sregs.u.e.pir; |
| 1043 | env->spr[SPR_BOOKE_MCSRR0] = sregs.u.e.mcsrr0; |
| 1044 | env->spr[SPR_BOOKE_MCSRR1] = sregs.u.e.mcsrr1; |
| 1045 | env->spr[SPR_BOOKE_DECAR] = sregs.u.e.decar; |
| 1046 | env->spr[SPR_BOOKE_IVPR] = sregs.u.e.ivpr; |
| 1047 | } |
| 1048 | |
| 1049 | if (sregs.u.e.features & KVM_SREGS_E_64) { |
| 1050 | env->spr[SPR_BOOKE_EPCR] = sregs.u.e.epcr; |
| 1051 | } |
| 1052 | |
| 1053 | if (sregs.u.e.features & KVM_SREGS_E_SPRG8) { |
| 1054 | env->spr[SPR_BOOKE_SPRG8] = sregs.u.e.sprg8; |
| 1055 | } |
| 1056 | |
| 1057 | if (sregs.u.e.features & KVM_SREGS_E_IVOR) { |
| 1058 | env->spr[SPR_BOOKE_IVOR0] = sregs.u.e.ivor_low[0]; |
| 1059 | kvm_sync_excp(env, POWERPC_EXCP_CRITICAL, SPR_BOOKE_IVOR0); |
| 1060 | env->spr[SPR_BOOKE_IVOR1] = sregs.u.e.ivor_low[1]; |
| 1061 | kvm_sync_excp(env, POWERPC_EXCP_MCHECK, SPR_BOOKE_IVOR1); |
| 1062 | env->spr[SPR_BOOKE_IVOR2] = sregs.u.e.ivor_low[2]; |
| 1063 | kvm_sync_excp(env, POWERPC_EXCP_DSI, SPR_BOOKE_IVOR2); |
| 1064 | env->spr[SPR_BOOKE_IVOR3] = sregs.u.e.ivor_low[3]; |
| 1065 | kvm_sync_excp(env, POWERPC_EXCP_ISI, SPR_BOOKE_IVOR3); |
| 1066 | env->spr[SPR_BOOKE_IVOR4] = sregs.u.e.ivor_low[4]; |
| 1067 | kvm_sync_excp(env, POWERPC_EXCP_EXTERNAL, SPR_BOOKE_IVOR4); |
| 1068 | env->spr[SPR_BOOKE_IVOR5] = sregs.u.e.ivor_low[5]; |
| 1069 | kvm_sync_excp(env, POWERPC_EXCP_ALIGN, SPR_BOOKE_IVOR5); |
| 1070 | env->spr[SPR_BOOKE_IVOR6] = sregs.u.e.ivor_low[6]; |
| 1071 | kvm_sync_excp(env, POWERPC_EXCP_PROGRAM, SPR_BOOKE_IVOR6); |
| 1072 | env->spr[SPR_BOOKE_IVOR7] = sregs.u.e.ivor_low[7]; |
| 1073 | kvm_sync_excp(env, POWERPC_EXCP_FPU, SPR_BOOKE_IVOR7); |
| 1074 | env->spr[SPR_BOOKE_IVOR8] = sregs.u.e.ivor_low[8]; |
| 1075 | kvm_sync_excp(env, POWERPC_EXCP_SYSCALL, SPR_BOOKE_IVOR8); |
| 1076 | env->spr[SPR_BOOKE_IVOR9] = sregs.u.e.ivor_low[9]; |
| 1077 | kvm_sync_excp(env, POWERPC_EXCP_APU, SPR_BOOKE_IVOR9); |
| 1078 | env->spr[SPR_BOOKE_IVOR10] = sregs.u.e.ivor_low[10]; |
| 1079 | kvm_sync_excp(env, POWERPC_EXCP_DECR, SPR_BOOKE_IVOR10); |
| 1080 | env->spr[SPR_BOOKE_IVOR11] = sregs.u.e.ivor_low[11]; |
| 1081 | kvm_sync_excp(env, POWERPC_EXCP_FIT, SPR_BOOKE_IVOR11); |
| 1082 | env->spr[SPR_BOOKE_IVOR12] = sregs.u.e.ivor_low[12]; |
| 1083 | kvm_sync_excp(env, POWERPC_EXCP_WDT, SPR_BOOKE_IVOR12); |
| 1084 | env->spr[SPR_BOOKE_IVOR13] = sregs.u.e.ivor_low[13]; |
| 1085 | kvm_sync_excp(env, POWERPC_EXCP_DTLB, SPR_BOOKE_IVOR13); |
| 1086 | env->spr[SPR_BOOKE_IVOR14] = sregs.u.e.ivor_low[14]; |
| 1087 | kvm_sync_excp(env, POWERPC_EXCP_ITLB, SPR_BOOKE_IVOR14); |
| 1088 | env->spr[SPR_BOOKE_IVOR15] = sregs.u.e.ivor_low[15]; |
| 1089 | kvm_sync_excp(env, POWERPC_EXCP_DEBUG, SPR_BOOKE_IVOR15); |
| 1090 | |
| 1091 | if (sregs.u.e.features & KVM_SREGS_E_SPE) { |
| 1092 | env->spr[SPR_BOOKE_IVOR32] = sregs.u.e.ivor_high[0]; |
| 1093 | kvm_sync_excp(env, POWERPC_EXCP_SPEU, SPR_BOOKE_IVOR32); |
| 1094 | env->spr[SPR_BOOKE_IVOR33] = sregs.u.e.ivor_high[1]; |
| 1095 | kvm_sync_excp(env, POWERPC_EXCP_EFPDI, SPR_BOOKE_IVOR33); |
| 1096 | env->spr[SPR_BOOKE_IVOR34] = sregs.u.e.ivor_high[2]; |
| 1097 | kvm_sync_excp(env, POWERPC_EXCP_EFPRI, SPR_BOOKE_IVOR34); |
| 1098 | } |
| 1099 | |
| 1100 | if (sregs.u.e.features & KVM_SREGS_E_PM) { |
| 1101 | env->spr[SPR_BOOKE_IVOR35] = sregs.u.e.ivor_high[3]; |
| 1102 | kvm_sync_excp(env, POWERPC_EXCP_EPERFM, SPR_BOOKE_IVOR35); |
| 1103 | } |
| 1104 | |
| 1105 | if (sregs.u.e.features & KVM_SREGS_E_PC) { |
| 1106 | env->spr[SPR_BOOKE_IVOR36] = sregs.u.e.ivor_high[4]; |
| 1107 | kvm_sync_excp(env, POWERPC_EXCP_DOORI, SPR_BOOKE_IVOR36); |
| 1108 | env->spr[SPR_BOOKE_IVOR37] = sregs.u.e.ivor_high[5]; |
| 1109 | kvm_sync_excp(env, POWERPC_EXCP_DOORCI, SPR_BOOKE_IVOR37); |
| 1110 | } |
| 1111 | } |
| 1112 | |
| 1113 | if (sregs.u.e.features & KVM_SREGS_E_ARCH206_MMU) { |
| 1114 | env->spr[SPR_BOOKE_MAS0] = sregs.u.e.mas0; |
| 1115 | env->spr[SPR_BOOKE_MAS1] = sregs.u.e.mas1; |
| 1116 | env->spr[SPR_BOOKE_MAS2] = sregs.u.e.mas2; |
| 1117 | env->spr[SPR_BOOKE_MAS3] = sregs.u.e.mas7_3 & 0xffffffff; |
| 1118 | env->spr[SPR_BOOKE_MAS4] = sregs.u.e.mas4; |
| 1119 | env->spr[SPR_BOOKE_MAS6] = sregs.u.e.mas6; |
| 1120 | env->spr[SPR_BOOKE_MAS7] = sregs.u.e.mas7_3 >> 32; |
| 1121 | env->spr[SPR_MMUCFG] = sregs.u.e.mmucfg; |
| 1122 | env->spr[SPR_BOOKE_TLB0CFG] = sregs.u.e.tlbcfg[0]; |
| 1123 | env->spr[SPR_BOOKE_TLB1CFG] = sregs.u.e.tlbcfg[1]; |
| 1124 | } |
| 1125 | |
| 1126 | if (sregs.u.e.features & KVM_SREGS_EXP) { |
| 1127 | env->spr[SPR_BOOKE_EPR] = sregs.u.e.epr; |
| 1128 | } |
| 1129 | |
| 1130 | if (sregs.u.e.features & KVM_SREGS_E_PD) { |
| 1131 | env->spr[SPR_BOOKE_EPLC] = sregs.u.e.eplc; |
| 1132 | env->spr[SPR_BOOKE_EPSC] = sregs.u.e.epsc; |
| 1133 | } |
| 1134 | |
| 1135 | if (sregs.u.e.impl_id == KVM_SREGS_E_IMPL_FSL) { |
| 1136 | env->spr[SPR_E500_SVR] = sregs.u.e.impl.fsl.svr; |
| 1137 | env->spr[SPR_Exxx_MCAR] = sregs.u.e.impl.fsl.mcar; |
| 1138 | env->spr[SPR_HID0] = sregs.u.e.impl.fsl.hid0; |
| 1139 | |
| 1140 | if (sregs.u.e.impl.fsl.features & KVM_SREGS_E_FSL_PIDn) { |
| 1141 | env->spr[SPR_BOOKE_PID1] = sregs.u.e.impl.fsl.pid1; |
| 1142 | env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2; |
| 1143 | } |
| 1144 | } |
| 1145 | |
| 1146 | return 0; |
| 1147 | } |
| 1148 | |
| 1149 | static int kvmppc_get_books_sregs(PowerPCCPU *cpu) |
| 1150 | { |
| 1151 | CPUPPCState *env = &cpu->env; |
| 1152 | struct kvm_sregs sregs; |
| 1153 | int ret; |
| 1154 | int i; |
| 1155 | |
| 1156 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs); |
| 1157 | if (ret < 0) { |
| 1158 | return ret; |
| 1159 | } |
| 1160 | |
David Gibson | e57ca75 | 2017-02-23 11:39:18 +1100 | [diff] [blame] | 1161 | if (!cpu->vhyp) { |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 1162 | ppc_store_sdr1(env, sregs.u.s.sdr1); |
| 1163 | } |
| 1164 | |
| 1165 | /* Sync SLB */ |
| 1166 | #ifdef TARGET_PPC64 |
| 1167 | /* |
| 1168 | * The packed SLB array we get from KVM_GET_SREGS only contains |
| 1169 | * information about valid entries. So we flush our internal copy |
| 1170 | * to get rid of stale ones, then put all valid SLB entries back |
| 1171 | * in. |
| 1172 | */ |
| 1173 | memset(env->slb, 0, sizeof(env->slb)); |
| 1174 | for (i = 0; i < ARRAY_SIZE(env->slb); i++) { |
| 1175 | target_ulong rb = sregs.u.s.ppc64.slb[i].slbe; |
| 1176 | target_ulong rs = sregs.u.s.ppc64.slb[i].slbv; |
| 1177 | /* |
| 1178 | * Only restore valid entries |
| 1179 | */ |
| 1180 | if (rb & SLB_ESID_V) { |
| 1181 | ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs); |
| 1182 | } |
| 1183 | } |
| 1184 | #endif |
| 1185 | |
| 1186 | /* Sync SRs */ |
| 1187 | for (i = 0; i < 16; i++) { |
| 1188 | env->sr[i] = sregs.u.s.ppc32.sr[i]; |
| 1189 | } |
| 1190 | |
| 1191 | /* Sync BATs */ |
| 1192 | for (i = 0; i < 8; i++) { |
| 1193 | env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff; |
| 1194 | env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32; |
| 1195 | env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff; |
| 1196 | env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32; |
| 1197 | } |
| 1198 | |
| 1199 | return 0; |
| 1200 | } |
| 1201 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1202 | int kvm_arch_get_registers(CPUState *cs) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1203 | { |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1204 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 1205 | CPUPPCState *env = &cpu->env; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1206 | struct kvm_regs regs; |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1207 | uint32_t cr; |
Alexander Graf | 138b38b | 2010-11-25 08:20:46 +0100 | [diff] [blame] | 1208 | int i, ret; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1209 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 1210 | ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1211 | if (ret < 0) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1212 | return ret; |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1213 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1214 | |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1215 | cr = regs.cr; |
| 1216 | for (i = 7; i >= 0; i--) { |
| 1217 | env->crf[i] = cr & 15; |
| 1218 | cr >>= 4; |
| 1219 | } |
Alexander Graf | ba5e509 | 2009-12-02 23:19:47 +0100 | [diff] [blame] | 1220 | |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1221 | env->ctr = regs.ctr; |
| 1222 | env->lr = regs.lr; |
Richard Henderson | da91a00 | 2013-02-19 23:52:13 -0800 | [diff] [blame] | 1223 | cpu_write_xer(env, regs.xer); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1224 | env->msr = regs.msr; |
| 1225 | env->nip = regs.pc; |
| 1226 | |
| 1227 | env->spr[SPR_SRR0] = regs.srr0; |
| 1228 | env->spr[SPR_SRR1] = regs.srr1; |
| 1229 | |
| 1230 | env->spr[SPR_SPRG0] = regs.sprg0; |
| 1231 | env->spr[SPR_SPRG1] = regs.sprg1; |
| 1232 | env->spr[SPR_SPRG2] = regs.sprg2; |
| 1233 | env->spr[SPR_SPRG3] = regs.sprg3; |
| 1234 | env->spr[SPR_SPRG4] = regs.sprg4; |
| 1235 | env->spr[SPR_SPRG5] = regs.sprg5; |
| 1236 | env->spr[SPR_SPRG6] = regs.sprg6; |
| 1237 | env->spr[SPR_SPRG7] = regs.sprg7; |
| 1238 | |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1239 | env->spr[SPR_BOOKE_PID] = regs.pid; |
| 1240 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1241 | for (i = 0; i < 32; i++) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1242 | env->gpr[i] = regs.gpr[i]; |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1243 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1244 | |
David Gibson | 70b7984 | 2013-02-20 16:41:51 +0000 | [diff] [blame] | 1245 | kvm_get_fp(cs); |
| 1246 | |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1247 | if (cap_booke_sregs) { |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 1248 | ret = kvmppc_get_booke_sregs(cpu); |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1249 | if (ret < 0) { |
| 1250 | return ret; |
| 1251 | } |
Alexander Graf | fafc0b6 | 2011-05-25 15:04:42 +0200 | [diff] [blame] | 1252 | } |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1253 | |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1254 | if (cap_segstate) { |
David Gibson | a7a00a7 | 2016-03-09 11:58:33 +1100 | [diff] [blame] | 1255 | ret = kvmppc_get_books_sregs(cpu); |
Scott Wood | 90dc881 | 2011-04-29 17:10:23 -0500 | [diff] [blame] | 1256 | if (ret < 0) { |
| 1257 | return ret; |
| 1258 | } |
Alexander Graf | fafc0b6 | 2011-05-25 15:04:42 +0200 | [diff] [blame] | 1259 | } |
Alexander Graf | ba5e509 | 2009-12-02 23:19:47 +0100 | [diff] [blame] | 1260 | |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 1261 | if (cap_hior) { |
| 1262 | kvm_get_one_spr(cs, KVM_REG_PPC_HIOR, SPR_HIOR); |
| 1263 | } |
| 1264 | |
| 1265 | if (cap_one_reg) { |
| 1266 | int i; |
| 1267 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1268 | /* |
| 1269 | * We deliberately ignore errors here, for kernels which have |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 1270 | * the ONE_REG calls, but don't support the specific |
| 1271 | * registers, there's a reasonable chance things will still |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1272 | * work, at least until we try to migrate. |
| 1273 | */ |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 1274 | for (i = 0; i < 1024; i++) { |
| 1275 | uint64_t id = env->spr_cb[i].one_reg_id; |
| 1276 | |
| 1277 | if (id != 0) { |
| 1278 | kvm_get_one_spr(cs, id, i); |
| 1279 | } |
| 1280 | } |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 1281 | |
| 1282 | #ifdef TARGET_PPC64 |
Alexey Kardashevskiy | 80b3f79 | 2014-06-04 22:51:00 +1000 | [diff] [blame] | 1283 | if (msr_ts) { |
| 1284 | for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) { |
| 1285 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]); |
| 1286 | } |
| 1287 | for (i = 0; i < ARRAY_SIZE(env->tm_vsr); i++) { |
| 1288 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_VSR(i), &env->tm_vsr[i]); |
| 1289 | } |
| 1290 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_CR, &env->tm_cr); |
| 1291 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_LR, &env->tm_lr); |
| 1292 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_CTR, &env->tm_ctr); |
| 1293 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_FPSCR, &env->tm_fpscr); |
| 1294 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_AMR, &env->tm_amr); |
| 1295 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_PPR, &env->tm_ppr); |
| 1296 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_VRSAVE, &env->tm_vrsave); |
| 1297 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_VSCR, &env->tm_vscr); |
| 1298 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_DSCR, &env->tm_dscr); |
| 1299 | kvm_get_one_reg(cs, KVM_REG_PPC_TM_TAR, &env->tm_tar); |
| 1300 | } |
| 1301 | |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 1302 | if (cap_papr) { |
| 1303 | if (kvm_get_vpa(cs) < 0) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1304 | trace_kvm_failed_get_vpa(); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 1305 | } |
| 1306 | } |
Alexey Kardashevskiy | 98a8b52 | 2014-05-01 20:37:09 +1000 | [diff] [blame] | 1307 | |
| 1308 | kvm_get_one_reg(cs, KVM_REG_PPC_TB_OFFSET, &env->tb_env->tb_offset); |
Alexey Kardashevskiy | 972bd57 | 2019-09-23 18:41:10 +1000 | [diff] [blame] | 1309 | kvm_get_one_spr(cs, KVM_REG_PPC_DPDES, SPR_DPDES); |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 1310 | #endif |
David Gibson | d67d40e | 2013-02-20 16:41:50 +0000 | [diff] [blame] | 1311 | } |
| 1312 | |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1313 | return 0; |
| 1314 | } |
| 1315 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 1316 | int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level) |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 1317 | { |
| 1318 | unsigned virq = level ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; |
| 1319 | |
| 1320 | if (irq != PPC_INTERRUPT_EXT) { |
| 1321 | return 0; |
| 1322 | } |
| 1323 | |
Shivaprasad G Bhat | 1e8f51e | 2019-07-25 09:15:08 -0500 | [diff] [blame] | 1324 | if (!kvm_enabled() || !cap_interrupt_unset) { |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 1325 | return 0; |
| 1326 | } |
| 1327 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 1328 | kvm_vcpu_ioctl(CPU(cpu), KVM_INTERRUPT, &virq); |
Alexander Graf | fc87e18 | 2010-08-30 13:49:15 +0200 | [diff] [blame] | 1329 | |
| 1330 | return 0; |
| 1331 | } |
| 1332 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1333 | void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1334 | { |
Shivaprasad G Bhat | 1e8f51e | 2019-07-25 09:15:08 -0500 | [diff] [blame] | 1335 | return; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1336 | } |
| 1337 | |
Paolo Bonzini | 4c66375 | 2015-04-08 13:30:58 +0200 | [diff] [blame] | 1338 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1339 | { |
Paolo Bonzini | 4c66375 | 2015-04-08 13:30:58 +0200 | [diff] [blame] | 1340 | return MEMTXATTRS_UNSPECIFIED; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1341 | } |
| 1342 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1343 | int kvm_arch_process_async_events(CPUState *cs) |
Marcelo Tosatti | 0af691d | 2010-05-04 09:45:27 -0300 | [diff] [blame] | 1344 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 1345 | return cs->halted; |
Marcelo Tosatti | 0af691d | 2010-05-04 09:45:27 -0300 | [diff] [blame] | 1346 | } |
| 1347 | |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 1348 | static int kvmppc_handle_halt(PowerPCCPU *cpu) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1349 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 1350 | CPUState *cs = CPU(cpu); |
| 1351 | CPUPPCState *env = &cpu->env; |
| 1352 | |
| 1353 | if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) { |
| 1354 | cs->halted = 1; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 1355 | cs->exception_index = EXCP_HLT; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1356 | } |
| 1357 | |
Jan Kiszka | bb4ea39 | 2011-03-15 12:26:28 +0100 | [diff] [blame] | 1358 | return 0; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1359 | } |
| 1360 | |
| 1361 | /* map dcr access to existing qemu dcr emulation */ |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1362 | static int kvmppc_handle_dcr_read(CPUPPCState *env, |
| 1363 | uint32_t dcrn, uint32_t *data) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1364 | { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1365 | if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1366 | fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn); |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1367 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1368 | |
Jan Kiszka | bb4ea39 | 2011-03-15 12:26:28 +0100 | [diff] [blame] | 1369 | return 0; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1370 | } |
| 1371 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1372 | static int kvmppc_handle_dcr_write(CPUPPCState *env, |
| 1373 | uint32_t dcrn, uint32_t data) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1374 | { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1375 | if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0) { |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1376 | fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn); |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1377 | } |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1378 | |
Jan Kiszka | bb4ea39 | 2011-03-15 12:26:28 +0100 | [diff] [blame] | 1379 | return 0; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1380 | } |
| 1381 | |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1382 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
| 1383 | { |
| 1384 | /* Mixed endian case is not handled */ |
| 1385 | uint32_t sc = debug_inst_opcode; |
| 1386 | |
| 1387 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
| 1388 | sizeof(sc), 0) || |
| 1389 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&sc, sizeof(sc), 1)) { |
| 1390 | return -EINVAL; |
| 1391 | } |
| 1392 | |
| 1393 | return 0; |
| 1394 | } |
| 1395 | |
| 1396 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
| 1397 | { |
| 1398 | uint32_t sc; |
| 1399 | |
| 1400 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&sc, sizeof(sc), 0) || |
| 1401 | sc != debug_inst_opcode || |
| 1402 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
| 1403 | sizeof(sc), 1)) { |
| 1404 | return -EINVAL; |
| 1405 | } |
| 1406 | |
| 1407 | return 0; |
| 1408 | } |
| 1409 | |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 1410 | static int find_hw_breakpoint(target_ulong addr, int type) |
| 1411 | { |
| 1412 | int n; |
| 1413 | |
| 1414 | assert((nb_hw_breakpoint + nb_hw_watchpoint) |
| 1415 | <= ARRAY_SIZE(hw_debug_points)); |
| 1416 | |
| 1417 | for (n = 0; n < nb_hw_breakpoint + nb_hw_watchpoint; n++) { |
| 1418 | if (hw_debug_points[n].addr == addr && |
| 1419 | hw_debug_points[n].type == type) { |
| 1420 | return n; |
| 1421 | } |
| 1422 | } |
| 1423 | |
| 1424 | return -1; |
| 1425 | } |
| 1426 | |
| 1427 | static int find_hw_watchpoint(target_ulong addr, int *flag) |
| 1428 | { |
| 1429 | int n; |
| 1430 | |
| 1431 | n = find_hw_breakpoint(addr, GDB_WATCHPOINT_ACCESS); |
| 1432 | if (n >= 0) { |
| 1433 | *flag = BP_MEM_ACCESS; |
| 1434 | return n; |
| 1435 | } |
| 1436 | |
| 1437 | n = find_hw_breakpoint(addr, GDB_WATCHPOINT_WRITE); |
| 1438 | if (n >= 0) { |
| 1439 | *flag = BP_MEM_WRITE; |
| 1440 | return n; |
| 1441 | } |
| 1442 | |
| 1443 | n = find_hw_breakpoint(addr, GDB_WATCHPOINT_READ); |
| 1444 | if (n >= 0) { |
| 1445 | *flag = BP_MEM_READ; |
| 1446 | return n; |
| 1447 | } |
| 1448 | |
| 1449 | return -1; |
| 1450 | } |
| 1451 | |
| 1452 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
| 1453 | target_ulong len, int type) |
| 1454 | { |
| 1455 | if ((nb_hw_breakpoint + nb_hw_watchpoint) >= ARRAY_SIZE(hw_debug_points)) { |
| 1456 | return -ENOBUFS; |
| 1457 | } |
| 1458 | |
| 1459 | hw_debug_points[nb_hw_breakpoint + nb_hw_watchpoint].addr = addr; |
| 1460 | hw_debug_points[nb_hw_breakpoint + nb_hw_watchpoint].type = type; |
| 1461 | |
| 1462 | switch (type) { |
| 1463 | case GDB_BREAKPOINT_HW: |
| 1464 | if (nb_hw_breakpoint >= max_hw_breakpoint) { |
| 1465 | return -ENOBUFS; |
| 1466 | } |
| 1467 | |
| 1468 | if (find_hw_breakpoint(addr, type) >= 0) { |
| 1469 | return -EEXIST; |
| 1470 | } |
| 1471 | |
| 1472 | nb_hw_breakpoint++; |
| 1473 | break; |
| 1474 | |
| 1475 | case GDB_WATCHPOINT_WRITE: |
| 1476 | case GDB_WATCHPOINT_READ: |
| 1477 | case GDB_WATCHPOINT_ACCESS: |
| 1478 | if (nb_hw_watchpoint >= max_hw_watchpoint) { |
| 1479 | return -ENOBUFS; |
| 1480 | } |
| 1481 | |
| 1482 | if (find_hw_breakpoint(addr, type) >= 0) { |
| 1483 | return -EEXIST; |
| 1484 | } |
| 1485 | |
| 1486 | nb_hw_watchpoint++; |
| 1487 | break; |
| 1488 | |
| 1489 | default: |
| 1490 | return -ENOSYS; |
| 1491 | } |
| 1492 | |
| 1493 | return 0; |
| 1494 | } |
| 1495 | |
| 1496 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, |
| 1497 | target_ulong len, int type) |
| 1498 | { |
| 1499 | int n; |
| 1500 | |
| 1501 | n = find_hw_breakpoint(addr, type); |
| 1502 | if (n < 0) { |
| 1503 | return -ENOENT; |
| 1504 | } |
| 1505 | |
| 1506 | switch (type) { |
| 1507 | case GDB_BREAKPOINT_HW: |
| 1508 | nb_hw_breakpoint--; |
| 1509 | break; |
| 1510 | |
| 1511 | case GDB_WATCHPOINT_WRITE: |
| 1512 | case GDB_WATCHPOINT_READ: |
| 1513 | case GDB_WATCHPOINT_ACCESS: |
| 1514 | nb_hw_watchpoint--; |
| 1515 | break; |
| 1516 | |
| 1517 | default: |
| 1518 | return -ENOSYS; |
| 1519 | } |
| 1520 | hw_debug_points[n] = hw_debug_points[nb_hw_breakpoint + nb_hw_watchpoint]; |
| 1521 | |
| 1522 | return 0; |
| 1523 | } |
| 1524 | |
| 1525 | void kvm_arch_remove_all_hw_breakpoints(void) |
| 1526 | { |
| 1527 | nb_hw_breakpoint = nb_hw_watchpoint = 0; |
| 1528 | } |
| 1529 | |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1530 | void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) |
| 1531 | { |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 1532 | int n; |
| 1533 | |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1534 | /* Software Breakpoint updates */ |
| 1535 | if (kvm_sw_breakpoints_active(cs)) { |
| 1536 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; |
| 1537 | } |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 1538 | |
| 1539 | assert((nb_hw_breakpoint + nb_hw_watchpoint) |
| 1540 | <= ARRAY_SIZE(hw_debug_points)); |
| 1541 | assert((nb_hw_breakpoint + nb_hw_watchpoint) <= ARRAY_SIZE(dbg->arch.bp)); |
| 1542 | |
| 1543 | if (nb_hw_breakpoint + nb_hw_watchpoint > 0) { |
| 1544 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; |
| 1545 | memset(dbg->arch.bp, 0, sizeof(dbg->arch.bp)); |
| 1546 | for (n = 0; n < nb_hw_breakpoint + nb_hw_watchpoint; n++) { |
| 1547 | switch (hw_debug_points[n].type) { |
| 1548 | case GDB_BREAKPOINT_HW: |
| 1549 | dbg->arch.bp[n].type = KVMPPC_DEBUG_BREAKPOINT; |
| 1550 | break; |
| 1551 | case GDB_WATCHPOINT_WRITE: |
| 1552 | dbg->arch.bp[n].type = KVMPPC_DEBUG_WATCH_WRITE; |
| 1553 | break; |
| 1554 | case GDB_WATCHPOINT_READ: |
| 1555 | dbg->arch.bp[n].type = KVMPPC_DEBUG_WATCH_READ; |
| 1556 | break; |
| 1557 | case GDB_WATCHPOINT_ACCESS: |
| 1558 | dbg->arch.bp[n].type = KVMPPC_DEBUG_WATCH_WRITE | |
| 1559 | KVMPPC_DEBUG_WATCH_READ; |
| 1560 | break; |
| 1561 | default: |
| 1562 | cpu_abort(cs, "Unsupported breakpoint type\n"); |
| 1563 | } |
| 1564 | dbg->arch.bp[n].addr = hw_debug_points[n].addr; |
| 1565 | } |
| 1566 | } |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1567 | } |
| 1568 | |
Fabiano Rosas | 2cbd158 | 2019-02-28 19:57:57 -0300 | [diff] [blame] | 1569 | static int kvm_handle_hw_breakpoint(CPUState *cs, |
| 1570 | struct kvm_debug_exit_arch *arch_info) |
| 1571 | { |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1572 | int handle = DEBUG_RETURN_GUEST; |
Fabiano Rosas | 2cbd158 | 2019-02-28 19:57:57 -0300 | [diff] [blame] | 1573 | int n; |
| 1574 | int flag = 0; |
| 1575 | |
| 1576 | if (nb_hw_breakpoint + nb_hw_watchpoint > 0) { |
| 1577 | if (arch_info->status & KVMPPC_DEBUG_BREAKPOINT) { |
| 1578 | n = find_hw_breakpoint(arch_info->address, GDB_BREAKPOINT_HW); |
| 1579 | if (n >= 0) { |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1580 | handle = DEBUG_RETURN_GDB; |
Fabiano Rosas | 2cbd158 | 2019-02-28 19:57:57 -0300 | [diff] [blame] | 1581 | } |
| 1582 | } else if (arch_info->status & (KVMPPC_DEBUG_WATCH_READ | |
| 1583 | KVMPPC_DEBUG_WATCH_WRITE)) { |
| 1584 | n = find_hw_watchpoint(arch_info->address, &flag); |
| 1585 | if (n >= 0) { |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1586 | handle = DEBUG_RETURN_GDB; |
Fabiano Rosas | 2cbd158 | 2019-02-28 19:57:57 -0300 | [diff] [blame] | 1587 | cs->watchpoint_hit = &hw_watchpoint; |
| 1588 | hw_watchpoint.vaddr = hw_debug_points[n].addr; |
| 1589 | hw_watchpoint.flags = flag; |
| 1590 | } |
| 1591 | } |
| 1592 | } |
| 1593 | return handle; |
| 1594 | } |
| 1595 | |
Fabiano Rosas | 468e3a1 | 2019-02-28 19:57:58 -0300 | [diff] [blame] | 1596 | static int kvm_handle_singlestep(void) |
| 1597 | { |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1598 | return DEBUG_RETURN_GDB; |
Fabiano Rosas | 468e3a1 | 2019-02-28 19:57:58 -0300 | [diff] [blame] | 1599 | } |
| 1600 | |
| 1601 | static int kvm_handle_sw_breakpoint(void) |
| 1602 | { |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1603 | return DEBUG_RETURN_GDB; |
Fabiano Rosas | 468e3a1 | 2019-02-28 19:57:58 -0300 | [diff] [blame] | 1604 | } |
| 1605 | |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1606 | static int kvm_handle_debug(PowerPCCPU *cpu, struct kvm_run *run) |
| 1607 | { |
| 1608 | CPUState *cs = CPU(cpu); |
| 1609 | CPUPPCState *env = &cpu->env; |
| 1610 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1611 | |
Bharat Bhushan | 88365d1 | 2014-07-14 14:45:37 +0530 | [diff] [blame] | 1612 | if (cs->singlestep_enabled) { |
Fabiano Rosas | 468e3a1 | 2019-02-28 19:57:58 -0300 | [diff] [blame] | 1613 | return kvm_handle_singlestep(); |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1614 | } |
| 1615 | |
Fabiano Rosas | 468e3a1 | 2019-02-28 19:57:58 -0300 | [diff] [blame] | 1616 | if (arch_info->status) { |
| 1617 | return kvm_handle_hw_breakpoint(cs, arch_info); |
| 1618 | } |
| 1619 | |
| 1620 | if (kvm_find_sw_breakpoint(cs, arch_info->address)) { |
| 1621 | return kvm_handle_sw_breakpoint(); |
| 1622 | } |
| 1623 | |
| 1624 | /* |
| 1625 | * QEMU is not able to handle debug exception, so inject |
| 1626 | * program exception to guest; |
| 1627 | * Yes program exception NOT debug exception !! |
| 1628 | * When QEMU is using debug resources then debug exception must |
| 1629 | * be always set. To achieve this we set MSR_DE and also set |
| 1630 | * MSRP_DEP so guest cannot change MSR_DE. |
| 1631 | * When emulating debug resource for guest we want guest |
| 1632 | * to control MSR_DE (enable/disable debug interrupt on need). |
| 1633 | * Supporting both configurations are NOT possible. |
| 1634 | * So the result is that we cannot share debug resources |
| 1635 | * between QEMU and Guest on BOOKE architecture. |
| 1636 | * In the current design QEMU gets the priority over guest, |
| 1637 | * this means that if QEMU is using debug resources then guest |
| 1638 | * cannot use them; |
| 1639 | * For software breakpoint QEMU uses a privileged instruction; |
| 1640 | * So there cannot be any reason that we are here for guest |
| 1641 | * set debug exception, only possibility is guest executed a |
| 1642 | * privileged / illegal instruction and that's why we are |
| 1643 | * injecting a program interrupt. |
| 1644 | */ |
| 1645 | cpu_synchronize_state(cs); |
| 1646 | /* |
| 1647 | * env->nip is PC, so increment this by 4 to use |
| 1648 | * ppc_cpu_do_interrupt(), which set srr0 = env->nip - 4. |
| 1649 | */ |
| 1650 | env->nip += 4; |
| 1651 | cs->exception_index = POWERPC_EXCP_PROGRAM; |
| 1652 | env->error_code = POWERPC_EXCP_INVAL; |
| 1653 | ppc_cpu_do_interrupt(cs); |
| 1654 | |
Fabiano Rosas | 6e0552a | 2020-01-10 12:13:42 -0300 | [diff] [blame] | 1655 | return DEBUG_RETURN_GUEST; |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1656 | } |
| 1657 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1658 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1659 | { |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1660 | PowerPCCPU *cpu = POWERPC_CPU(cs); |
| 1661 | CPUPPCState *env = &cpu->env; |
Jan Kiszka | bb4ea39 | 2011-03-15 12:26:28 +0100 | [diff] [blame] | 1662 | int ret; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1663 | |
Jan Kiszka | 4b8523e | 2015-06-18 18:47:23 +0200 | [diff] [blame] | 1664 | qemu_mutex_lock_iothread(); |
| 1665 | |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1666 | switch (run->exit_reason) { |
| 1667 | case KVM_EXIT_DCR: |
| 1668 | if (run->dcr.is_write) { |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1669 | trace_kvm_handle_dcr_write(); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1670 | ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data); |
| 1671 | } else { |
Boxuan Li | 228152c2 | 2019-05-01 01:28:42 +0800 | [diff] [blame] | 1672 | trace_kvm_handle_dcr_read(); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1673 | ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data); |
| 1674 | } |
| 1675 | break; |
| 1676 | case KVM_EXIT_HLT: |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1677 | trace_kvm_handle_halt(); |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 1678 | ret = kvmppc_handle_halt(cpu); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1679 | break; |
David Gibson | c6304a4 | 2013-03-13 15:53:27 +0000 | [diff] [blame] | 1680 | #if defined(TARGET_PPC64) |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 1681 | case KVM_EXIT_PAPR_HCALL: |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1682 | trace_kvm_handle_papr_hcall(); |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 1683 | run->papr_hcall.ret = spapr_hypercall(cpu, |
Andreas Färber | aa100fa | 2012-05-03 06:13:14 +0200 | [diff] [blame] | 1684 | run->papr_hcall.nr, |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 1685 | run->papr_hcall.args); |
David Gibson | 78e8fde | 2012-08-06 18:44:45 +0000 | [diff] [blame] | 1686 | ret = 0; |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 1687 | break; |
| 1688 | #endif |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 1689 | case KVM_EXIT_EPR: |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1690 | trace_kvm_handle_epr(); |
Alexander Graf | 933b19e | 2014-02-14 09:15:21 +0100 | [diff] [blame] | 1691 | run->epr.epr = ldl_phys(cs->as, env->mpic_iack); |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 1692 | ret = 0; |
| 1693 | break; |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 1694 | case KVM_EXIT_WATCHDOG: |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1695 | trace_kvm_handle_watchdog_expiry(); |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 1696 | watchdog_perform_action(); |
| 1697 | ret = 0; |
| 1698 | break; |
| 1699 | |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1700 | case KVM_EXIT_DEBUG: |
Greg Kurz | 8d83cbf | 2019-04-05 10:05:24 +0200 | [diff] [blame] | 1701 | trace_kvm_handle_debug_exception(); |
Bharat Bhushan | 8a0548f | 2014-07-14 14:45:38 +0530 | [diff] [blame] | 1702 | if (kvm_handle_debug(cpu, run)) { |
| 1703 | ret = EXCP_DEBUG; |
| 1704 | break; |
| 1705 | } |
| 1706 | /* re-enter, this exception was guest-internal */ |
| 1707 | ret = 0; |
| 1708 | break; |
| 1709 | |
Aravinda Prasad | 9ac703a | 2020-01-31 00:14:19 +0530 | [diff] [blame] | 1710 | #if defined(TARGET_PPC64) |
| 1711 | case KVM_EXIT_NMI: |
| 1712 | trace_kvm_handle_nmi_exception(); |
| 1713 | ret = kvm_handle_nmi(cpu, run); |
| 1714 | break; |
| 1715 | #endif |
| 1716 | |
Jan Kiszka | 73aaec4 | 2011-01-21 21:48:06 +0100 | [diff] [blame] | 1717 | default: |
| 1718 | fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason); |
| 1719 | ret = -1; |
| 1720 | break; |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1721 | } |
| 1722 | |
Jan Kiszka | 4b8523e | 2015-06-18 18:47:23 +0200 | [diff] [blame] | 1723 | qemu_mutex_unlock_iothread(); |
aurel32 | d76d165 | 2008-12-16 10:43:58 +0000 | [diff] [blame] | 1724 | return ret; |
| 1725 | } |
| 1726 | |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 1727 | int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) |
| 1728 | { |
| 1729 | CPUState *cs = CPU(cpu); |
| 1730 | uint32_t bits = tsr_bits; |
| 1731 | struct kvm_one_reg reg = { |
| 1732 | .id = KVM_REG_PPC_OR_TSR, |
| 1733 | .addr = (uintptr_t) &bits, |
| 1734 | }; |
| 1735 | |
| 1736 | return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 1737 | } |
| 1738 | |
| 1739 | int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) |
| 1740 | { |
| 1741 | |
| 1742 | CPUState *cs = CPU(cpu); |
| 1743 | uint32_t bits = tsr_bits; |
| 1744 | struct kvm_one_reg reg = { |
| 1745 | .id = KVM_REG_PPC_CLEAR_TSR, |
| 1746 | .addr = (uintptr_t) &bits, |
| 1747 | }; |
| 1748 | |
| 1749 | return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 1750 | } |
| 1751 | |
| 1752 | int kvmppc_set_tcr(PowerPCCPU *cpu) |
| 1753 | { |
| 1754 | CPUState *cs = CPU(cpu); |
| 1755 | CPUPPCState *env = &cpu->env; |
| 1756 | uint32_t tcr = env->spr[SPR_BOOKE_TCR]; |
| 1757 | |
| 1758 | struct kvm_one_reg reg = { |
| 1759 | .id = KVM_REG_PPC_TCR, |
| 1760 | .addr = (uintptr_t) &tcr, |
| 1761 | }; |
| 1762 | |
| 1763 | return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); |
| 1764 | } |
| 1765 | |
| 1766 | int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu) |
| 1767 | { |
| 1768 | CPUState *cs = CPU(cpu); |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 1769 | int ret; |
| 1770 | |
| 1771 | if (!kvm_enabled()) { |
| 1772 | return -1; |
| 1773 | } |
| 1774 | |
| 1775 | if (!cap_ppc_watchdog) { |
| 1776 | printf("warning: KVM does not support watchdog"); |
| 1777 | return -1; |
| 1778 | } |
| 1779 | |
Cornelia Huck | 48add81 | 2014-04-09 17:21:57 +0200 | [diff] [blame] | 1780 | ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_BOOKE_WATCHDOG, 0); |
Bharat Bhushan | 31f2cb8 | 2013-02-24 18:16:21 +0000 | [diff] [blame] | 1781 | if (ret < 0) { |
| 1782 | fprintf(stderr, "%s: couldn't enable KVM_CAP_PPC_BOOKE_WATCHDOG: %s\n", |
| 1783 | __func__, strerror(-ret)); |
| 1784 | return ret; |
| 1785 | } |
| 1786 | |
| 1787 | return ret; |
| 1788 | } |
| 1789 | |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1790 | static int read_cpuinfo(const char *field, char *value, int len) |
| 1791 | { |
| 1792 | FILE *f; |
| 1793 | int ret = -1; |
| 1794 | int field_len = strlen(field); |
| 1795 | char line[512]; |
| 1796 | |
| 1797 | f = fopen("/proc/cpuinfo", "r"); |
| 1798 | if (!f) { |
| 1799 | return -1; |
| 1800 | } |
| 1801 | |
| 1802 | do { |
Nikunj A Dadhania | ef95144 | 2014-07-09 16:08:37 +0530 | [diff] [blame] | 1803 | if (!fgets(line, sizeof(line), f)) { |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1804 | break; |
| 1805 | } |
| 1806 | if (!strncmp(line, field, field_len)) { |
Jim Meyering | ae21506 | 2012-10-04 13:09:52 +0200 | [diff] [blame] | 1807 | pstrcpy(value, len, line); |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1808 | ret = 0; |
| 1809 | break; |
| 1810 | } |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1811 | } while (*line); |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1812 | |
| 1813 | fclose(f); |
| 1814 | |
| 1815 | return ret; |
| 1816 | } |
| 1817 | |
| 1818 | uint32_t kvmppc_get_tbfreq(void) |
| 1819 | { |
| 1820 | char line[512]; |
| 1821 | char *ns; |
Rutuja Shah | 73bcb24 | 2016-03-21 21:32:30 +0530 | [diff] [blame] | 1822 | uint32_t retval = NANOSECONDS_PER_SECOND; |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1823 | |
| 1824 | if (read_cpuinfo("timebase", line, sizeof(line))) { |
| 1825 | return retval; |
| 1826 | } |
| 1827 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1828 | ns = strchr(line, ':'); |
| 1829 | if (!ns) { |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1830 | return retval; |
| 1831 | } |
| 1832 | |
| 1833 | ns++; |
| 1834 | |
Shraddha Barke | f9b8e7f | 2015-09-25 14:07:58 +0530 | [diff] [blame] | 1835 | return atoi(ns); |
Alexander Graf | dc333cd | 2010-02-09 17:37:05 +0100 | [diff] [blame] | 1836 | } |
Gleb Natapov | 4513d92 | 2010-05-10 11:21:34 +0300 | [diff] [blame] | 1837 | |
Nikunj A Dadhania | ef95144 | 2014-07-09 16:08:37 +0530 | [diff] [blame] | 1838 | bool kvmppc_get_host_serial(char **value) |
| 1839 | { |
| 1840 | return g_file_get_contents("/proc/device-tree/system-id", value, NULL, |
| 1841 | NULL); |
| 1842 | } |
| 1843 | |
| 1844 | bool kvmppc_get_host_model(char **value) |
| 1845 | { |
| 1846 | return g_file_get_contents("/proc/device-tree/model", value, NULL, NULL); |
| 1847 | } |
| 1848 | |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1849 | /* Try to find a device tree node for a CPU with clock-frequency property */ |
| 1850 | static int kvmppc_find_cpu_dt(char *buf, int buf_len) |
| 1851 | { |
| 1852 | struct dirent *dirp; |
| 1853 | DIR *dp; |
| 1854 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1855 | dp = opendir(PROC_DEVTREE_CPU); |
| 1856 | if (!dp) { |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1857 | printf("Can't open directory " PROC_DEVTREE_CPU "\n"); |
| 1858 | return -1; |
| 1859 | } |
| 1860 | |
| 1861 | buf[0] = '\0'; |
| 1862 | while ((dirp = readdir(dp)) != NULL) { |
| 1863 | FILE *f; |
| 1864 | snprintf(buf, buf_len, "%s%s/clock-frequency", PROC_DEVTREE_CPU, |
| 1865 | dirp->d_name); |
| 1866 | f = fopen(buf, "r"); |
| 1867 | if (f) { |
| 1868 | snprintf(buf, buf_len, "%s%s", PROC_DEVTREE_CPU, dirp->d_name); |
| 1869 | fclose(f); |
| 1870 | break; |
| 1871 | } |
| 1872 | buf[0] = '\0'; |
| 1873 | } |
| 1874 | closedir(dp); |
| 1875 | if (buf[0] == '\0') { |
| 1876 | printf("Unknown host!\n"); |
| 1877 | return -1; |
| 1878 | } |
| 1879 | |
| 1880 | return 0; |
| 1881 | } |
| 1882 | |
Sukadev Bhattiprolu | 7d94a30 | 2015-11-13 18:13:07 -0800 | [diff] [blame] | 1883 | static uint64_t kvmppc_read_int_dt(const char *filename) |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1884 | { |
David Gibson | 9bc884b | 2011-10-10 18:31:00 +0000 | [diff] [blame] | 1885 | union { |
| 1886 | uint32_t v32; |
| 1887 | uint64_t v64; |
| 1888 | } u; |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1889 | FILE *f; |
| 1890 | int len; |
| 1891 | |
Sukadev Bhattiprolu | 7d94a30 | 2015-11-13 18:13:07 -0800 | [diff] [blame] | 1892 | f = fopen(filename, "rb"); |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1893 | if (!f) { |
| 1894 | return -1; |
| 1895 | } |
| 1896 | |
David Gibson | 9bc884b | 2011-10-10 18:31:00 +0000 | [diff] [blame] | 1897 | len = fread(&u, 1, sizeof(u), f); |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1898 | fclose(f); |
| 1899 | switch (len) { |
David Gibson | 9bc884b | 2011-10-10 18:31:00 +0000 | [diff] [blame] | 1900 | case 4: |
| 1901 | /* property is a 32-bit quantity */ |
| 1902 | return be32_to_cpu(u.v32); |
| 1903 | case 8: |
| 1904 | return be64_to_cpu(u.v64); |
Alexander Graf | eadaada | 2011-07-21 02:29:15 +0200 | [diff] [blame] | 1905 | } |
| 1906 | |
| 1907 | return 0; |
| 1908 | } |
| 1909 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1910 | /* |
| 1911 | * Read a CPU node property from the host device tree that's a single |
Sukadev Bhattiprolu | 7d94a30 | 2015-11-13 18:13:07 -0800 | [diff] [blame] | 1912 | * integer (32-bit or 64-bit). Returns 0 if anything goes wrong |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1913 | * (can't find or open the property, or doesn't understand the format) |
| 1914 | */ |
Sukadev Bhattiprolu | 7d94a30 | 2015-11-13 18:13:07 -0800 | [diff] [blame] | 1915 | static uint64_t kvmppc_read_int_cpu_dt(const char *propname) |
| 1916 | { |
| 1917 | char buf[PATH_MAX], *tmp; |
| 1918 | uint64_t val; |
| 1919 | |
| 1920 | if (kvmppc_find_cpu_dt(buf, sizeof(buf))) { |
| 1921 | return -1; |
| 1922 | } |
| 1923 | |
| 1924 | tmp = g_strdup_printf("%s/%s", buf, propname); |
| 1925 | val = kvmppc_read_int_dt(tmp); |
| 1926 | g_free(tmp); |
| 1927 | |
| 1928 | return val; |
| 1929 | } |
| 1930 | |
David Gibson | 9bc884b | 2011-10-10 18:31:00 +0000 | [diff] [blame] | 1931 | uint64_t kvmppc_get_clockfreq(void) |
| 1932 | { |
| 1933 | return kvmppc_read_int_cpu_dt("clock-frequency"); |
| 1934 | } |
| 1935 | |
Suraj Jitindar Singh | 7d05052 | 2019-03-01 13:43:16 +1100 | [diff] [blame] | 1936 | static int kvmppc_get_dec_bits(void) |
| 1937 | { |
| 1938 | int nr_bits = kvmppc_read_int_cpu_dt("ibm,dec-bits"); |
| 1939 | |
| 1940 | if (nr_bits > 0) { |
| 1941 | return nr_bits; |
| 1942 | } |
| 1943 | return 0; |
| 1944 | } |
| 1945 | |
Stuart Yoder | 1a61a9a | 2013-01-03 12:37:02 +0000 | [diff] [blame] | 1946 | static int kvmppc_get_pvinfo(CPUPPCState *env, struct kvm_ppc_pvinfo *pvinfo) |
Richard Henderson | db70b31 | 2019-03-22 19:07:57 -0700 | [diff] [blame] | 1947 | { |
| 1948 | CPUState *cs = env_cpu(env); |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1949 | |
Alexander Graf | 6fd33a7 | 2014-07-14 19:17:35 +0200 | [diff] [blame] | 1950 | if (kvm_vm_check_extension(cs->kvm_state, KVM_CAP_PPC_GET_PVINFO) && |
Stuart Yoder | 1a61a9a | 2013-01-03 12:37:02 +0000 | [diff] [blame] | 1951 | !kvm_vm_ioctl(cs->kvm_state, KVM_PPC_GET_PVINFO, pvinfo)) { |
| 1952 | return 0; |
| 1953 | } |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1954 | |
Stuart Yoder | 1a61a9a | 2013-01-03 12:37:02 +0000 | [diff] [blame] | 1955 | return 1; |
| 1956 | } |
| 1957 | |
| 1958 | int kvmppc_get_hasidle(CPUPPCState *env) |
| 1959 | { |
| 1960 | struct kvm_ppc_pvinfo pvinfo; |
| 1961 | |
| 1962 | if (!kvmppc_get_pvinfo(env, &pvinfo) && |
| 1963 | (pvinfo.flags & KVM_PPC_PVINFO_FLAGS_EV_IDLE)) { |
| 1964 | return 1; |
| 1965 | } |
| 1966 | |
| 1967 | return 0; |
| 1968 | } |
| 1969 | |
| 1970 | int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) |
| 1971 | { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 1972 | uint32_t *hc = (uint32_t *)buf; |
Stuart Yoder | 1a61a9a | 2013-01-03 12:37:02 +0000 | [diff] [blame] | 1973 | struct kvm_ppc_pvinfo pvinfo; |
| 1974 | |
| 1975 | if (!kvmppc_get_pvinfo(env, &pvinfo)) { |
| 1976 | memcpy(buf, pvinfo.hcall, buf_len); |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1977 | return 0; |
| 1978 | } |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1979 | |
| 1980 | /* |
Alexander Graf | d13fc32 | 2014-06-11 12:19:03 +0200 | [diff] [blame] | 1981 | * Fallback to always fail hypercalls regardless of endianness: |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1982 | * |
Alexander Graf | d13fc32 | 2014-06-11 12:19:03 +0200 | [diff] [blame] | 1983 | * tdi 0,r0,72 (becomes b .+8 in wrong endian, nop in good endian) |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1984 | * li r3, -1 |
Alexander Graf | d13fc32 | 2014-06-11 12:19:03 +0200 | [diff] [blame] | 1985 | * b .+8 (becomes nop in wrong endian) |
| 1986 | * bswap32(li r3, -1) |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1987 | */ |
| 1988 | |
Alexander Graf | d13fc32 | 2014-06-11 12:19:03 +0200 | [diff] [blame] | 1989 | hc[0] = cpu_to_be32(0x08000048); |
| 1990 | hc[1] = cpu_to_be32(0x3860ffff); |
| 1991 | hc[2] = cpu_to_be32(0x48000008); |
| 1992 | hc[3] = cpu_to_be32(bswap32(0x3860ffff)); |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1993 | |
Alexey Kardashevskiy | 0ddbd05 | 2016-03-21 13:14:02 +1100 | [diff] [blame] | 1994 | return 1; |
Alexander Graf | 45024f0 | 2010-08-03 15:22:42 +0200 | [diff] [blame] | 1995 | } |
| 1996 | |
David Gibson | 026bfd8 | 2015-05-07 15:33:59 +1000 | [diff] [blame] | 1997 | static inline int kvmppc_enable_hcall(KVMState *s, target_ulong hcall) |
| 1998 | { |
| 1999 | return kvm_vm_enable_cap(s, KVM_CAP_PPC_ENABLE_HCALL, 0, hcall, 1); |
| 2000 | } |
| 2001 | |
| 2002 | void kvmppc_enable_logical_ci_hcalls(void) |
| 2003 | { |
| 2004 | /* |
| 2005 | * FIXME: it would be nice if we could detect the cases where |
| 2006 | * we're using a device which requires the in kernel |
| 2007 | * implementation of these hcalls, but the kernel lacks them and |
| 2008 | * produce a warning. |
| 2009 | */ |
| 2010 | kvmppc_enable_hcall(kvm_state, H_LOGICAL_CI_LOAD); |
| 2011 | kvmppc_enable_hcall(kvm_state, H_LOGICAL_CI_STORE); |
| 2012 | } |
| 2013 | |
Alexey Kardashevskiy | ef9971d | 2015-09-08 11:25:13 +1000 | [diff] [blame] | 2014 | void kvmppc_enable_set_mode_hcall(void) |
| 2015 | { |
| 2016 | kvmppc_enable_hcall(kvm_state, H_SET_MODE); |
| 2017 | } |
| 2018 | |
Nathan Whitehorn | 5145ad4 | 2016-08-30 01:02:47 +0000 | [diff] [blame] | 2019 | void kvmppc_enable_clear_ref_mod_hcalls(void) |
| 2020 | { |
| 2021 | kvmppc_enable_hcall(kvm_state, H_CLEAR_REF); |
| 2022 | kvmppc_enable_hcall(kvm_state, H_CLEAR_MOD); |
| 2023 | } |
| 2024 | |
Suraj Jitindar Singh | 68f9f70 | 2019-03-06 17:06:08 +1100 | [diff] [blame] | 2025 | void kvmppc_enable_h_page_init(void) |
| 2026 | { |
| 2027 | kvmppc_enable_hcall(kvm_state, H_PAGE_INIT); |
| 2028 | } |
| 2029 | |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 2030 | void kvmppc_set_papr(PowerPCCPU *cpu) |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 2031 | { |
Andreas Färber | 1bc2265 | 2012-10-31 06:06:49 +0100 | [diff] [blame] | 2032 | CPUState *cs = CPU(cpu); |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 2033 | int ret; |
| 2034 | |
David Gibson | da20aed | 2018-04-05 16:02:51 +1000 | [diff] [blame] | 2035 | if (!kvm_enabled()) { |
| 2036 | return; |
| 2037 | } |
| 2038 | |
Cornelia Huck | 48add81 | 2014-04-09 17:21:57 +0200 | [diff] [blame] | 2039 | ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_PAPR, 0); |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 2040 | if (ret) { |
Thomas Huth | 072ed5f | 2016-02-18 22:01:38 +0100 | [diff] [blame] | 2041 | error_report("This vCPU type or KVM version does not support PAPR"); |
| 2042 | exit(1); |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 2043 | } |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 2044 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2045 | /* |
| 2046 | * Update the capability flag so we sync the right information |
| 2047 | * with kvm |
| 2048 | */ |
David Gibson | 9b00ea4 | 2013-04-07 19:08:22 +0000 | [diff] [blame] | 2049 | cap_papr = 1; |
Alexander Graf | f61b4be | 2011-08-09 17:57:37 +0200 | [diff] [blame] | 2050 | } |
| 2051 | |
David Gibson | d6e166c | 2016-10-28 22:09:37 +1100 | [diff] [blame] | 2052 | int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr) |
Alexey Kardashevskiy | 6db5bb0 | 2014-05-23 12:26:58 +1000 | [diff] [blame] | 2053 | { |
David Gibson | d6e166c | 2016-10-28 22:09:37 +1100 | [diff] [blame] | 2054 | return kvm_set_one_reg(CPU(cpu), KVM_REG_PPC_ARCH_COMPAT, &compat_pvr); |
Alexey Kardashevskiy | 6db5bb0 | 2014-05-23 12:26:58 +1000 | [diff] [blame] | 2055 | } |
| 2056 | |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 2057 | void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy) |
| 2058 | { |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 2059 | CPUState *cs = CPU(cpu); |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 2060 | int ret; |
| 2061 | |
Cornelia Huck | 48add81 | 2014-04-09 17:21:57 +0200 | [diff] [blame] | 2062 | ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_EPR, 0, mpic_proxy); |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 2063 | if (ret && mpic_proxy) { |
Thomas Huth | 072ed5f | 2016-02-18 22:01:38 +0100 | [diff] [blame] | 2064 | error_report("This KVM version does not support EPR"); |
| 2065 | exit(1); |
Alexander Graf | 5b95b8b | 2013-01-17 11:54:38 +0100 | [diff] [blame] | 2066 | } |
| 2067 | } |
| 2068 | |
Nicholas Piggin | ec010c0 | 2020-03-26 00:29:03 +1000 | [diff] [blame] | 2069 | bool kvmppc_get_fwnmi(void) |
| 2070 | { |
| 2071 | return cap_fwnmi; |
| 2072 | } |
| 2073 | |
Laurent Vivier | aef92d8 | 2020-07-24 10:35:33 +0200 | [diff] [blame] | 2074 | int kvmppc_set_fwnmi(PowerPCCPU *cpu) |
Aravinda Prasad | 9d953ce | 2020-01-31 00:14:18 +0530 | [diff] [blame] | 2075 | { |
Aravinda Prasad | 9d953ce | 2020-01-31 00:14:18 +0530 | [diff] [blame] | 2076 | CPUState *cs = CPU(cpu); |
| 2077 | |
| 2078 | return kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0); |
| 2079 | } |
| 2080 | |
David Gibson | e97c363 | 2011-09-29 21:39:10 +0000 | [diff] [blame] | 2081 | int kvmppc_smt_threads(void) |
| 2082 | { |
| 2083 | return cap_ppc_smt ? cap_ppc_smt : 1; |
| 2084 | } |
| 2085 | |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 2086 | int kvmppc_set_smt_threads(int smt) |
| 2087 | { |
| 2088 | int ret; |
| 2089 | |
| 2090 | ret = kvm_vm_enable_cap(kvm_state, KVM_CAP_PPC_SMT, 0, smt, 0); |
| 2091 | if (!ret) { |
| 2092 | cap_ppc_smt = smt; |
| 2093 | } |
| 2094 | return ret; |
| 2095 | } |
| 2096 | |
Vladimir Sementsov-Ogievskiy | 0c11568 | 2019-12-05 20:46:21 +0300 | [diff] [blame] | 2097 | void kvmppc_error_append_smt_possible_hint(Error *const *errp) |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 2098 | { |
| 2099 | int i; |
| 2100 | GString *g; |
| 2101 | char *s; |
| 2102 | |
| 2103 | assert(kvm_enabled()); |
| 2104 | if (cap_ppc_smt_possible) { |
| 2105 | g = g_string_new("Available VSMT modes:"); |
| 2106 | for (i = 63; i >= 0; i--) { |
| 2107 | if ((1UL << i) & cap_ppc_smt_possible) { |
| 2108 | g_string_append_printf(g, " %lu", (1UL << i)); |
| 2109 | } |
| 2110 | } |
| 2111 | s = g_string_free(g, false); |
Markus Armbruster | 1a639fd | 2019-12-18 08:36:27 +0100 | [diff] [blame] | 2112 | error_append_hint(errp, "%s.\n", s); |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 2113 | g_free(s); |
| 2114 | } else { |
Markus Armbruster | 1a639fd | 2019-12-18 08:36:27 +0100 | [diff] [blame] | 2115 | error_append_hint(errp, |
Sam Bobroff | fa98fbf | 2017-08-18 15:50:22 +1000 | [diff] [blame] | 2116 | "This KVM seems to be too old to support VSMT.\n"); |
| 2117 | } |
| 2118 | } |
| 2119 | |
| 2120 | |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2121 | #ifdef TARGET_PPC64 |
David Gibson | 6a84737 | 2019-11-28 16:12:06 +1100 | [diff] [blame] | 2122 | uint64_t kvmppc_vrma_limit(unsigned int hash_shift) |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2123 | { |
David Gibson | f36951c | 2013-04-07 19:08:18 +0000 | [diff] [blame] | 2124 | struct kvm_ppc_smmu_info info; |
| 2125 | long rampagesize, best_page_shift; |
| 2126 | int i; |
| 2127 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2128 | /* |
| 2129 | * Find the largest hardware supported page size that's less than |
| 2130 | * or equal to the (logical) backing page size of guest RAM |
| 2131 | */ |
Greg Kurz | ab25696 | 2018-06-29 11:48:32 +0200 | [diff] [blame] | 2132 | kvm_get_smmu_info(&info, &error_fatal); |
David Hildenbrand | 905b7ee | 2019-04-17 13:31:43 +0200 | [diff] [blame] | 2133 | rampagesize = qemu_minrampagesize(); |
David Gibson | f36951c | 2013-04-07 19:08:18 +0000 | [diff] [blame] | 2134 | best_page_shift = 0; |
| 2135 | |
| 2136 | for (i = 0; i < KVM_PPC_PAGE_SIZES_MAX_SZ; i++) { |
| 2137 | struct kvm_ppc_one_seg_page_size *sps = &info.sps[i]; |
| 2138 | |
| 2139 | if (!sps->page_shift) { |
| 2140 | continue; |
| 2141 | } |
| 2142 | |
| 2143 | if ((sps->page_shift > best_page_shift) |
| 2144 | && ((1UL << sps->page_shift) <= rampagesize)) { |
| 2145 | best_page_shift = sps->page_shift; |
| 2146 | } |
| 2147 | } |
| 2148 | |
David Gibson | 6a84737 | 2019-11-28 16:12:06 +1100 | [diff] [blame] | 2149 | return 1ULL << (best_page_shift + hash_shift - 7); |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2150 | } |
| 2151 | #endif |
| 2152 | |
Alexey Kardashevskiy | da95324 | 2014-05-27 15:36:30 +1000 | [diff] [blame] | 2153 | bool kvmppc_spapr_use_multitce(void) |
| 2154 | { |
| 2155 | return cap_spapr_multitce; |
| 2156 | } |
| 2157 | |
Alexey Kardashevskiy | 3dc410a | 2017-03-27 16:22:19 +1100 | [diff] [blame] | 2158 | int kvmppc_spapr_enable_inkernel_multitce(void) |
| 2159 | { |
| 2160 | int ret; |
| 2161 | |
| 2162 | ret = kvm_vm_enable_cap(kvm_state, KVM_CAP_PPC_ENABLE_HCALL, 0, |
| 2163 | H_PUT_TCE_INDIRECT, 1); |
| 2164 | if (!ret) { |
| 2165 | ret = kvm_vm_enable_cap(kvm_state, KVM_CAP_PPC_ENABLE_HCALL, 0, |
| 2166 | H_STUFF_TCE, 1); |
| 2167 | } |
| 2168 | |
| 2169 | return ret; |
| 2170 | } |
| 2171 | |
Alexey Kardashevskiy | d6ee2a7 | 2017-03-10 12:41:13 +1100 | [diff] [blame] | 2172 | void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, |
| 2173 | uint64_t bus_offset, uint32_t nb_table, |
| 2174 | int *pfd, bool need_vfio) |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2175 | { |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2176 | long len; |
| 2177 | int fd; |
| 2178 | void *table; |
| 2179 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2180 | /* |
| 2181 | * Must set fd to -1 so we don't try to munmap when called for |
David Gibson | b5aec39 | 2012-02-27 17:18:07 +0000 | [diff] [blame] | 2182 | * destroying the table, which the upper layers -will- do |
| 2183 | */ |
| 2184 | *pfd = -1; |
David Gibson | 6a81dd1 | 2015-09-30 13:42:55 +1000 | [diff] [blame] | 2185 | if (!cap_spapr_tce || (need_vfio && !cap_spapr_vfio)) { |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2186 | return NULL; |
| 2187 | } |
| 2188 | |
Alexey Kardashevskiy | d6ee2a7 | 2017-03-10 12:41:13 +1100 | [diff] [blame] | 2189 | if (cap_spapr_tce_64) { |
| 2190 | struct kvm_create_spapr_tce_64 args = { |
| 2191 | .liobn = liobn, |
| 2192 | .page_shift = page_shift, |
| 2193 | .offset = bus_offset >> page_shift, |
| 2194 | .size = nb_table, |
| 2195 | .flags = 0 |
| 2196 | }; |
| 2197 | fd = kvm_vm_ioctl(kvm_state, KVM_CREATE_SPAPR_TCE_64, &args); |
| 2198 | if (fd < 0) { |
| 2199 | fprintf(stderr, |
| 2200 | "KVM: Failed to create TCE64 table for liobn 0x%x\n", |
| 2201 | liobn); |
| 2202 | return NULL; |
| 2203 | } |
| 2204 | } else if (cap_spapr_tce) { |
| 2205 | uint64_t window_size = (uint64_t) nb_table << page_shift; |
| 2206 | struct kvm_create_spapr_tce args = { |
| 2207 | .liobn = liobn, |
| 2208 | .window_size = window_size, |
| 2209 | }; |
| 2210 | if ((window_size != args.window_size) || bus_offset) { |
| 2211 | return NULL; |
| 2212 | } |
| 2213 | fd = kvm_vm_ioctl(kvm_state, KVM_CREATE_SPAPR_TCE, &args); |
| 2214 | if (fd < 0) { |
| 2215 | fprintf(stderr, "KVM: Failed to create TCE table for liobn 0x%x\n", |
| 2216 | liobn); |
| 2217 | return NULL; |
| 2218 | } |
| 2219 | } else { |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2220 | return NULL; |
| 2221 | } |
| 2222 | |
Alexey Kardashevskiy | d6ee2a7 | 2017-03-10 12:41:13 +1100 | [diff] [blame] | 2223 | len = nb_table * sizeof(uint64_t); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2224 | /* FIXME: round this up to page size */ |
| 2225 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2226 | table = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2227 | if (table == MAP_FAILED) { |
David Gibson | b5aec39 | 2012-02-27 17:18:07 +0000 | [diff] [blame] | 2228 | fprintf(stderr, "KVM: Failed to map TCE table for liobn 0x%x\n", |
| 2229 | liobn); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2230 | close(fd); |
| 2231 | return NULL; |
| 2232 | } |
| 2233 | |
| 2234 | *pfd = fd; |
| 2235 | return table; |
| 2236 | } |
| 2237 | |
Alexey Kardashevskiy | 523e7b8 | 2014-05-27 15:36:35 +1000 | [diff] [blame] | 2238 | int kvmppc_remove_spapr_tce(void *table, int fd, uint32_t nb_table) |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2239 | { |
| 2240 | long len; |
| 2241 | |
| 2242 | if (fd < 0) { |
| 2243 | return -1; |
| 2244 | } |
| 2245 | |
Alexey Kardashevskiy | 523e7b8 | 2014-05-27 15:36:35 +1000 | [diff] [blame] | 2246 | len = nb_table * sizeof(uint64_t); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2247 | if ((munmap(table, len) < 0) || |
| 2248 | (close(fd) < 0)) { |
David Gibson | b5aec39 | 2012-02-27 17:18:07 +0000 | [diff] [blame] | 2249 | fprintf(stderr, "KVM: Unexpected error removing TCE table: %s", |
| 2250 | strerror(errno)); |
David Gibson | 0f5cb29 | 2011-09-29 21:39:12 +0000 | [diff] [blame] | 2251 | /* Leak the table */ |
| 2252 | } |
| 2253 | |
| 2254 | return 0; |
| 2255 | } |
| 2256 | |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2257 | int kvmppc_reset_htab(int shift_hint) |
| 2258 | { |
| 2259 | uint32_t shift = shift_hint; |
| 2260 | |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2261 | if (!kvm_enabled()) { |
| 2262 | /* Full emulation, tell caller to allocate htab itself */ |
| 2263 | return 0; |
| 2264 | } |
Greg Kurz | 6977afd | 2017-09-14 21:25:43 +0200 | [diff] [blame] | 2265 | if (kvm_vm_check_extension(kvm_state, KVM_CAP_PPC_ALLOC_HTAB)) { |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2266 | int ret; |
| 2267 | ret = kvm_vm_ioctl(kvm_state, KVM_PPC_ALLOCATE_HTAB, &shift); |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2268 | if (ret == -ENOTTY) { |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2269 | /* |
| 2270 | * At least some versions of PR KVM advertise the |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2271 | * capability, but don't implement the ioctl(). Oops. |
| 2272 | * Return 0 so that we allocate the htab in qemu, as is |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2273 | * correct for PR. |
| 2274 | */ |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2275 | return 0; |
| 2276 | } else if (ret < 0) { |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2277 | return ret; |
| 2278 | } |
| 2279 | return shift; |
| 2280 | } |
| 2281 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2282 | /* |
| 2283 | * We have a kernel that predates the htab reset calls. For PR |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2284 | * KVM, we need to allocate the htab ourselves, for an HV KVM of |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2285 | * this era, it has allocated a 16MB fixed size hash table |
| 2286 | * already. |
| 2287 | */ |
Thomas Huth | 96c9cff | 2016-09-29 12:48:06 +0200 | [diff] [blame] | 2288 | if (kvmppc_is_pr(kvm_state)) { |
David Gibson | ace9a2c | 2012-09-19 21:08:42 +0000 | [diff] [blame] | 2289 | /* PR - tell caller to allocate htab */ |
| 2290 | return 0; |
| 2291 | } else { |
| 2292 | /* HV - assume 16MB kernel allocated htab */ |
| 2293 | return 24; |
| 2294 | } |
David Gibson | 7f763a5 | 2012-09-12 16:57:12 +0000 | [diff] [blame] | 2295 | } |
| 2296 | |
David Gibson | a1e9858 | 2011-10-12 22:40:32 +0000 | [diff] [blame] | 2297 | static inline uint32_t mfpvr(void) |
| 2298 | { |
| 2299 | uint32_t pvr; |
| 2300 | |
| 2301 | asm ("mfpvr %0" |
| 2302 | : "=r"(pvr)); |
| 2303 | return pvr; |
| 2304 | } |
| 2305 | |
David Gibson | a734258 | 2011-10-17 18:15:41 +0000 | [diff] [blame] | 2306 | static void alter_insns(uint64_t *word, uint64_t flags, bool on) |
| 2307 | { |
| 2308 | if (on) { |
| 2309 | *word |= flags; |
| 2310 | } else { |
| 2311 | *word &= ~flags; |
| 2312 | } |
| 2313 | } |
| 2314 | |
Andreas Färber | 2985b86 | 2013-01-06 08:31:30 +0000 | [diff] [blame] | 2315 | static void kvmppc_host_cpu_class_init(ObjectClass *oc, void *data) |
| 2316 | { |
| 2317 | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
David Gibson | 0cbad81 | 2013-04-07 19:08:19 +0000 | [diff] [blame] | 2318 | uint32_t dcache_size = kvmppc_read_int_cpu_dt("d-cache-size"); |
| 2319 | uint32_t icache_size = kvmppc_read_int_cpu_dt("i-cache-size"); |
David Gibson | a1e9858 | 2011-10-12 22:40:32 +0000 | [diff] [blame] | 2320 | |
Andreas Färber | cfe34f4 | 2013-02-17 23:16:41 +0000 | [diff] [blame] | 2321 | /* Now fix up the class with information we can query from the host */ |
Alexey Kardashevskiy | 3bc9ccc | 2013-09-27 18:05:03 +1000 | [diff] [blame] | 2322 | pcc->pvr = mfpvr(); |
David Gibson | a734258 | 2011-10-17 18:15:41 +0000 | [diff] [blame] | 2323 | |
David Gibson | 3f2ca48 | 2017-12-11 17:41:34 +1100 | [diff] [blame] | 2324 | alter_insns(&pcc->insns_flags, PPC_ALTIVEC, |
| 2325 | qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC); |
| 2326 | alter_insns(&pcc->insns_flags2, PPC2_VSX, |
| 2327 | qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_VSX); |
| 2328 | alter_insns(&pcc->insns_flags2, PPC2_DFP, |
| 2329 | qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_DFP); |
David Gibson | 0cbad81 | 2013-04-07 19:08:19 +0000 | [diff] [blame] | 2330 | |
| 2331 | if (dcache_size != -1) { |
| 2332 | pcc->l1_dcache_size = dcache_size; |
| 2333 | } |
| 2334 | |
| 2335 | if (icache_size != -1) { |
| 2336 | pcc->l1_icache_size = icache_size; |
| 2337 | } |
Sam Bobroff | c64abd1 | 2017-03-20 10:46:43 +1100 | [diff] [blame] | 2338 | |
| 2339 | #if defined(TARGET_PPC64) |
| 2340 | pcc->radix_page_info = kvm_get_radix_page_info(); |
David Gibson | 5f3066d | 2017-05-10 11:19:16 +1000 | [diff] [blame] | 2341 | |
| 2342 | if ((pcc->pvr & 0xffffff00) == CPU_POWERPC_POWER9_DD1) { |
| 2343 | /* |
| 2344 | * POWER9 DD1 has some bugs which make it not really ISA 3.00 |
| 2345 | * compliant. More importantly, advertising ISA 3.00 |
| 2346 | * architected mode may prevent guests from activating |
| 2347 | * necessary DD1 workarounds. |
| 2348 | */ |
| 2349 | pcc->pcr_supported &= ~(PCR_COMPAT_3_00 | PCR_COMPAT_2_07 |
| 2350 | | PCR_COMPAT_2_06 | PCR_COMPAT_2_05); |
| 2351 | } |
Sam Bobroff | c64abd1 | 2017-03-20 10:46:43 +1100 | [diff] [blame] | 2352 | #endif /* defined(TARGET_PPC64) */ |
David Gibson | a1e9858 | 2011-10-12 22:40:32 +0000 | [diff] [blame] | 2353 | } |
| 2354 | |
Stuart Yoder | 3b96112 | 2013-03-30 06:40:49 +0000 | [diff] [blame] | 2355 | bool kvmppc_has_cap_epr(void) |
| 2356 | { |
| 2357 | return cap_epr; |
| 2358 | } |
| 2359 | |
Alexander Graf | 87a91de | 2014-06-04 12:14:08 +0200 | [diff] [blame] | 2360 | bool kvmppc_has_cap_fixup_hcalls(void) |
| 2361 | { |
| 2362 | return cap_fixup_hcalls; |
| 2363 | } |
| 2364 | |
Thomas Huth | bac3bf2 | 2016-09-28 13:16:30 +0200 | [diff] [blame] | 2365 | bool kvmppc_has_cap_htm(void) |
| 2366 | { |
| 2367 | return cap_htm; |
| 2368 | } |
| 2369 | |
Sam Bobroff | cf1c4cc | 2017-03-20 10:46:44 +1100 | [diff] [blame] | 2370 | bool kvmppc_has_cap_mmu_radix(void) |
| 2371 | { |
| 2372 | return cap_mmu_radix; |
| 2373 | } |
| 2374 | |
| 2375 | bool kvmppc_has_cap_mmu_hash_v3(void) |
| 2376 | { |
| 2377 | return cap_mmu_hash_v3; |
| 2378 | } |
| 2379 | |
Suraj Jitindar Singh | 072f416 | 2018-06-12 15:16:29 +1000 | [diff] [blame] | 2380 | static bool kvmppc_power8_host(void) |
| 2381 | { |
| 2382 | bool ret = false; |
| 2383 | #ifdef TARGET_PPC64 |
| 2384 | { |
| 2385 | uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr(); |
| 2386 | ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) || |
| 2387 | (base_pvr == CPU_POWERPC_POWER8NVL_BASE) || |
| 2388 | (base_pvr == CPU_POWERPC_POWER8_BASE); |
| 2389 | } |
| 2390 | #endif /* TARGET_PPC64 */ |
| 2391 | return ret; |
| 2392 | } |
| 2393 | |
Suraj Jitindar Singh | 8fea704 | 2018-05-11 16:25:07 +1000 | [diff] [blame] | 2394 | static int parse_cap_ppc_safe_cache(struct kvm_ppc_cpu_char c) |
| 2395 | { |
Suraj Jitindar Singh | 072f416 | 2018-06-12 15:16:29 +1000 | [diff] [blame] | 2396 | bool l1d_thread_priv_req = !kvmppc_power8_host(); |
| 2397 | |
Suraj Jitindar Singh | 8fea704 | 2018-05-11 16:25:07 +1000 | [diff] [blame] | 2398 | if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) { |
| 2399 | return 2; |
Suraj Jitindar Singh | 072f416 | 2018-06-12 15:16:29 +1000 | [diff] [blame] | 2400 | } else if ((!l1d_thread_priv_req || |
| 2401 | c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRIV) && |
Suraj Jitindar Singh | 8fea704 | 2018-05-11 16:25:07 +1000 | [diff] [blame] | 2402 | (c.character & c.character_mask |
| 2403 | & (H_CPU_CHAR_L1D_FLUSH_ORI30 | H_CPU_CHAR_L1D_FLUSH_TRIG2))) { |
| 2404 | return 1; |
| 2405 | } |
| 2406 | |
| 2407 | return 0; |
| 2408 | } |
| 2409 | |
| 2410 | static int parse_cap_ppc_safe_bounds_check(struct kvm_ppc_cpu_char c) |
| 2411 | { |
| 2412 | if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR) { |
| 2413 | return 2; |
| 2414 | } else if (c.character & c.character_mask & H_CPU_CHAR_SPEC_BAR_ORI31) { |
| 2415 | return 1; |
| 2416 | } |
| 2417 | |
| 2418 | return 0; |
| 2419 | } |
| 2420 | |
| 2421 | static int parse_cap_ppc_safe_indirect_branch(struct kvm_ppc_cpu_char c) |
| 2422 | { |
Suraj Jitindar Singh | 399b289 | 2019-03-01 14:19:11 +1100 | [diff] [blame] | 2423 | if ((~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_FLUSH_COUNT_CACHE) && |
| 2424 | (~c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) && |
| 2425 | (~c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED)) { |
| 2426 | return SPAPR_CAP_FIXED_NA; |
| 2427 | } else if (c.behaviour & c.behaviour_mask & H_CPU_BEHAV_FLUSH_COUNT_CACHE) { |
| 2428 | return SPAPR_CAP_WORKAROUND; |
| 2429 | } else if (c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) { |
Suraj Jitindar Singh | 8fea704 | 2018-05-11 16:25:07 +1000 | [diff] [blame] | 2430 | return SPAPR_CAP_FIXED_CCD; |
| 2431 | } else if (c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED) { |
| 2432 | return SPAPR_CAP_FIXED_IBS; |
| 2433 | } |
| 2434 | |
| 2435 | return 0; |
| 2436 | } |
| 2437 | |
Suraj Jitindar Singh | 8ff43ee | 2019-03-01 14:19:12 +1100 | [diff] [blame] | 2438 | static int parse_cap_ppc_count_cache_flush_assist(struct kvm_ppc_cpu_char c) |
| 2439 | { |
| 2440 | if (c.character & c.character_mask & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) { |
| 2441 | return 1; |
| 2442 | } |
| 2443 | return 0; |
| 2444 | } |
| 2445 | |
Cédric Le Goater | 38afd77 | 2019-05-13 10:42:33 +0200 | [diff] [blame] | 2446 | bool kvmppc_has_cap_xive(void) |
| 2447 | { |
| 2448 | return cap_xive; |
| 2449 | } |
| 2450 | |
Suraj Jitindar Singh | 8acc2ae | 2018-01-19 15:59:59 +1100 | [diff] [blame] | 2451 | static void kvmppc_get_cpu_characteristics(KVMState *s) |
| 2452 | { |
| 2453 | struct kvm_ppc_cpu_char c; |
| 2454 | int ret; |
| 2455 | |
| 2456 | /* Assume broken */ |
| 2457 | cap_ppc_safe_cache = 0; |
| 2458 | cap_ppc_safe_bounds_check = 0; |
| 2459 | cap_ppc_safe_indirect_branch = 0; |
| 2460 | |
| 2461 | ret = kvm_vm_check_extension(s, KVM_CAP_PPC_GET_CPU_CHAR); |
| 2462 | if (!ret) { |
| 2463 | return; |
| 2464 | } |
| 2465 | ret = kvm_vm_ioctl(s, KVM_PPC_GET_CPU_CHAR, &c); |
| 2466 | if (ret < 0) { |
| 2467 | return; |
| 2468 | } |
Suraj Jitindar Singh | 8fea704 | 2018-05-11 16:25:07 +1000 | [diff] [blame] | 2469 | |
| 2470 | cap_ppc_safe_cache = parse_cap_ppc_safe_cache(c); |
| 2471 | cap_ppc_safe_bounds_check = parse_cap_ppc_safe_bounds_check(c); |
| 2472 | cap_ppc_safe_indirect_branch = parse_cap_ppc_safe_indirect_branch(c); |
Suraj Jitindar Singh | 8ff43ee | 2019-03-01 14:19:12 +1100 | [diff] [blame] | 2473 | cap_ppc_count_cache_flush_assist = |
| 2474 | parse_cap_ppc_count_cache_flush_assist(c); |
Suraj Jitindar Singh | 8acc2ae | 2018-01-19 15:59:59 +1100 | [diff] [blame] | 2475 | } |
| 2476 | |
| 2477 | int kvmppc_get_cap_safe_cache(void) |
| 2478 | { |
| 2479 | return cap_ppc_safe_cache; |
| 2480 | } |
| 2481 | |
| 2482 | int kvmppc_get_cap_safe_bounds_check(void) |
| 2483 | { |
| 2484 | return cap_ppc_safe_bounds_check; |
| 2485 | } |
| 2486 | |
| 2487 | int kvmppc_get_cap_safe_indirect_branch(void) |
| 2488 | { |
| 2489 | return cap_ppc_safe_indirect_branch; |
| 2490 | } |
| 2491 | |
Suraj Jitindar Singh | 8ff43ee | 2019-03-01 14:19:12 +1100 | [diff] [blame] | 2492 | int kvmppc_get_cap_count_cache_flush_assist(void) |
| 2493 | { |
| 2494 | return cap_ppc_count_cache_flush_assist; |
| 2495 | } |
| 2496 | |
Suraj Jitindar Singh | b9a477b | 2018-10-08 14:25:39 +1100 | [diff] [blame] | 2497 | bool kvmppc_has_cap_nested_kvm_hv(void) |
| 2498 | { |
| 2499 | return !!cap_ppc_nested_kvm_hv; |
| 2500 | } |
| 2501 | |
| 2502 | int kvmppc_set_cap_nested_kvm_hv(int enable) |
| 2503 | { |
| 2504 | return kvm_vm_enable_cap(kvm_state, KVM_CAP_PPC_NESTED_HV, 0, enable); |
| 2505 | } |
| 2506 | |
Alexey Kardashevskiy | 9ded780 | 2018-02-06 11:08:24 -0700 | [diff] [blame] | 2507 | bool kvmppc_has_cap_spapr_vfio(void) |
| 2508 | { |
| 2509 | return cap_spapr_vfio; |
| 2510 | } |
| 2511 | |
Suraj Jitindar Singh | 7d05052 | 2019-03-01 13:43:16 +1100 | [diff] [blame] | 2512 | int kvmppc_get_cap_large_decr(void) |
| 2513 | { |
| 2514 | return cap_large_decr; |
| 2515 | } |
| 2516 | |
| 2517 | int kvmppc_enable_cap_large_decr(PowerPCCPU *cpu, int enable) |
| 2518 | { |
| 2519 | CPUState *cs = CPU(cpu); |
| 2520 | uint64_t lpcr; |
| 2521 | |
| 2522 | kvm_get_one_reg(cs, KVM_REG_PPC_LPCR_64, &lpcr); |
| 2523 | /* Do we need to modify the LPCR? */ |
| 2524 | if (!!(lpcr & LPCR_LD) != !!enable) { |
| 2525 | if (enable) { |
| 2526 | lpcr |= LPCR_LD; |
| 2527 | } else { |
| 2528 | lpcr &= ~LPCR_LD; |
| 2529 | } |
| 2530 | kvm_set_one_reg(cs, KVM_REG_PPC_LPCR_64, &lpcr); |
| 2531 | kvm_get_one_reg(cs, KVM_REG_PPC_LPCR_64, &lpcr); |
| 2532 | |
| 2533 | if (!!(lpcr & LPCR_LD) != !!enable) { |
| 2534 | return -1; |
| 2535 | } |
| 2536 | } |
| 2537 | |
| 2538 | return 0; |
| 2539 | } |
| 2540 | |
Thomas Huth | 52b2519 | 2016-06-07 17:39:38 +0200 | [diff] [blame] | 2541 | PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) |
| 2542 | { |
| 2543 | uint32_t host_pvr = mfpvr(); |
| 2544 | PowerPCCPUClass *pvr_pcc; |
| 2545 | |
| 2546 | pvr_pcc = ppc_cpu_class_by_pvr(host_pvr); |
| 2547 | if (pvr_pcc == NULL) { |
| 2548 | pvr_pcc = ppc_cpu_class_by_pvr_mask(host_pvr); |
| 2549 | } |
| 2550 | |
| 2551 | return pvr_pcc; |
| 2552 | } |
| 2553 | |
David Gibson | 165dc3e | 2019-10-30 17:20:35 +0100 | [diff] [blame] | 2554 | static void pseries_machine_class_fixup(ObjectClass *oc, void *opaque) |
| 2555 | { |
| 2556 | MachineClass *mc = MACHINE_CLASS(oc); |
| 2557 | |
| 2558 | mc->default_cpu_type = TYPE_HOST_POWERPC_CPU; |
| 2559 | } |
| 2560 | |
| 2561 | static int kvm_ppc_register_host_cpu_type(void) |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2562 | { |
| 2563 | TypeInfo type_info = { |
| 2564 | .name = TYPE_HOST_POWERPC_CPU, |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2565 | .class_init = kvmppc_host_cpu_class_init, |
| 2566 | }; |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2567 | PowerPCCPUClass *pvr_pcc; |
Greg Kurz | 92e926e | 2017-07-05 10:49:52 +0200 | [diff] [blame] | 2568 | ObjectClass *oc; |
Alexey Kardashevskiy | 5b79b1c | 2014-04-12 03:34:25 +1000 | [diff] [blame] | 2569 | DeviceClass *dc; |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 2570 | int i; |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2571 | |
Thomas Huth | 52b2519 | 2016-06-07 17:39:38 +0200 | [diff] [blame] | 2572 | pvr_pcc = kvm_ppc_get_host_cpu_class(); |
Alexey Kardashevskiy | 3bc9ccc | 2013-09-27 18:05:03 +1000 | [diff] [blame] | 2573 | if (pvr_pcc == NULL) { |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2574 | return -1; |
| 2575 | } |
| 2576 | type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc)); |
| 2577 | type_register(&type_info); |
David Gibson | 165dc3e | 2019-10-30 17:20:35 +0100 | [diff] [blame] | 2578 | /* override TCG default cpu type with 'host' cpu model */ |
| 2579 | object_class_foreach(pseries_machine_class_fixup, TYPE_SPAPR_MACHINE, |
| 2580 | false, NULL); |
Alexey Kardashevskiy | 5b79b1c | 2014-04-12 03:34:25 +1000 | [diff] [blame] | 2581 | |
Greg Kurz | 92e926e | 2017-07-05 10:49:52 +0200 | [diff] [blame] | 2582 | oc = object_class_by_name(type_info.name); |
| 2583 | g_assert(oc); |
| 2584 | |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 2585 | /* |
| 2586 | * Update generic CPU family class alias (e.g. on a POWER8NVL host, |
| 2587 | * we want "POWER8" to be a "family" alias that points to the current |
| 2588 | * host CPU type, too) |
| 2589 | */ |
| 2590 | dc = DEVICE_CLASS(ppc_cpu_get_family_class(pvr_pcc)); |
| 2591 | for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { |
Igor Mammedov | c5354f5 | 2017-08-30 15:24:30 +0200 | [diff] [blame] | 2592 | if (strcasecmp(ppc_cpu_aliases[i].alias, dc->desc) == 0) { |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 2593 | char *suffix; |
| 2594 | |
| 2595 | ppc_cpu_aliases[i].model = g_strdup(object_class_get_name(oc)); |
Igor Mammedov | c913706 | 2017-08-30 15:24:29 +0200 | [diff] [blame] | 2596 | suffix = strstr(ppc_cpu_aliases[i].model, POWERPC_CPU_TYPE_SUFFIX); |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 2597 | if (suffix) { |
| 2598 | *suffix = 0; |
| 2599 | } |
Thomas Huth | 715d4b9 | 2017-01-31 14:11:58 +0100 | [diff] [blame] | 2600 | break; |
| 2601 | } |
| 2602 | } |
| 2603 | |
Andreas Färber | 5ba4576 | 2013-02-23 11:22:12 +0000 | [diff] [blame] | 2604 | return 0; |
| 2605 | } |
| 2606 | |
David Gibson | feaa64c | 2013-09-26 16:18:35 +1000 | [diff] [blame] | 2607 | int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function) |
| 2608 | { |
| 2609 | struct kvm_rtas_token_args args = { |
| 2610 | .token = token, |
| 2611 | }; |
| 2612 | |
| 2613 | if (!kvm_check_extension(kvm_state, KVM_CAP_PPC_RTAS)) { |
| 2614 | return -ENOENT; |
| 2615 | } |
| 2616 | |
Cédric Le Goater | 7701aee | 2019-06-15 10:12:52 +0200 | [diff] [blame] | 2617 | strncpy(args.name, function, sizeof(args.name) - 1); |
David Gibson | feaa64c | 2013-09-26 16:18:35 +1000 | [diff] [blame] | 2618 | |
| 2619 | return kvm_vm_ioctl(kvm_state, KVM_PPC_RTAS_DEFINE_TOKEN, &args); |
| 2620 | } |
David Gibson | 12b1143 | 2012-04-04 15:02:05 +1000 | [diff] [blame] | 2621 | |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2622 | int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp) |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2623 | { |
| 2624 | struct kvm_get_htab_fd s = { |
| 2625 | .flags = write ? KVM_GET_HTAB_WRITE : 0, |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2626 | .start_index = index, |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2627 | }; |
Greg Kurz | 82be8e7 | 2017-09-15 15:16:10 +0200 | [diff] [blame] | 2628 | int ret; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2629 | |
| 2630 | if (!cap_htab_fd) { |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2631 | error_setg(errp, "KVM version doesn't support %s the HPT", |
| 2632 | write ? "writing" : "reading"); |
Greg Kurz | 82be8e7 | 2017-09-15 15:16:10 +0200 | [diff] [blame] | 2633 | return -ENOTSUP; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2634 | } |
| 2635 | |
Greg Kurz | 82be8e7 | 2017-09-15 15:16:10 +0200 | [diff] [blame] | 2636 | ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s); |
| 2637 | if (ret < 0) { |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2638 | error_setg(errp, "Unable to open fd for %s HPT %s KVM: %s", |
| 2639 | write ? "writing" : "reading", write ? "to" : "from", |
| 2640 | strerror(errno)); |
Greg Kurz | 82be8e7 | 2017-09-15 15:16:10 +0200 | [diff] [blame] | 2641 | return -errno; |
| 2642 | } |
| 2643 | |
| 2644 | return ret; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2645 | } |
| 2646 | |
| 2647 | int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns) |
| 2648 | { |
Alex Bligh | bc72ad6 | 2013-08-21 16:03:08 +0100 | [diff] [blame] | 2649 | int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2650 | uint8_t buf[bufsize]; |
| 2651 | ssize_t rc; |
| 2652 | |
| 2653 | do { |
| 2654 | rc = read(fd, buf, bufsize); |
| 2655 | if (rc < 0) { |
| 2656 | fprintf(stderr, "Error reading data from KVM HTAB fd: %s\n", |
| 2657 | strerror(errno)); |
| 2658 | return rc; |
| 2659 | } else if (rc) { |
Cédric Le Goater | e094c4c | 2014-11-03 16:14:50 +0100 | [diff] [blame] | 2660 | uint8_t *buffer = buf; |
| 2661 | ssize_t n = rc; |
| 2662 | while (n) { |
| 2663 | struct kvm_get_htab_header *head = |
| 2664 | (struct kvm_get_htab_header *) buffer; |
| 2665 | size_t chunksize = sizeof(*head) + |
| 2666 | HASH_PTE_SIZE_64 * head->n_valid; |
| 2667 | |
| 2668 | qemu_put_be32(f, head->index); |
| 2669 | qemu_put_be16(f, head->n_valid); |
| 2670 | qemu_put_be16(f, head->n_invalid); |
| 2671 | qemu_put_buffer(f, (void *)(head + 1), |
| 2672 | HASH_PTE_SIZE_64 * head->n_valid); |
| 2673 | |
| 2674 | buffer += chunksize; |
| 2675 | n -= chunksize; |
| 2676 | } |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2677 | } |
| 2678 | } while ((rc != 0) |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2679 | && ((max_ns < 0) || |
| 2680 | ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) < max_ns))); |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2681 | |
| 2682 | return (rc == 0) ? 1 : 0; |
| 2683 | } |
| 2684 | |
| 2685 | int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, |
Greg Kurz | 0a06e4d | 2020-10-26 13:40:47 +0100 | [diff] [blame] | 2686 | uint16_t n_valid, uint16_t n_invalid, Error **errp) |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2687 | { |
| 2688 | struct kvm_get_htab_header *buf; |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2689 | size_t chunksize = sizeof(*buf) + n_valid * HASH_PTE_SIZE_64; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2690 | ssize_t rc; |
| 2691 | |
| 2692 | buf = alloca(chunksize); |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2693 | buf->index = index; |
| 2694 | buf->n_valid = n_valid; |
| 2695 | buf->n_invalid = n_invalid; |
| 2696 | |
David Gibson | c995e94 | 2019-03-21 21:47:25 +1100 | [diff] [blame] | 2697 | qemu_get_buffer(f, (void *)(buf + 1), HASH_PTE_SIZE_64 * n_valid); |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2698 | |
| 2699 | rc = write(fd, buf, chunksize); |
| 2700 | if (rc < 0) { |
Greg Kurz | 0a06e4d | 2020-10-26 13:40:47 +0100 | [diff] [blame] | 2701 | error_setg_errno(errp, errno, "Error writing the KVM hash table"); |
| 2702 | return -errno; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2703 | } |
| 2704 | if (rc != chunksize) { |
| 2705 | /* We should never get a short write on a single chunk */ |
Greg Kurz | 0a06e4d | 2020-10-26 13:40:47 +0100 | [diff] [blame] | 2706 | error_setg(errp, "Short write while restoring the KVM hash table"); |
| 2707 | return -ENOSPC; |
Alexey Kardashevskiy | e68cb8b | 2013-07-18 14:33:03 -0500 | [diff] [blame] | 2708 | } |
| 2709 | return 0; |
| 2710 | } |
| 2711 | |
Andreas Färber | 20d695a | 2012-10-31 06:57:49 +0100 | [diff] [blame] | 2712 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
Gleb Natapov | 4513d92 | 2010-05-10 11:21:34 +0300 | [diff] [blame] | 2713 | { |
| 2714 | return true; |
| 2715 | } |
Jan Kiszka | a1b87fe | 2011-02-01 22:15:51 +0100 | [diff] [blame] | 2716 | |
Scott Wood | 8216966 | 2013-06-12 17:26:54 +1000 | [diff] [blame] | 2717 | void kvm_arch_init_irq_routing(KVMState *s) |
| 2718 | { |
| 2719 | } |
Greg Kurz | c65f9a0 | 2013-12-11 14:15:34 +0100 | [diff] [blame] | 2720 | |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2721 | void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n) |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2722 | { |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2723 | int fd, rc; |
| 2724 | int i; |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2725 | |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2726 | fd = kvmppc_get_htab_fd(false, ptex, &error_abort); |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2727 | |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2728 | i = 0; |
| 2729 | while (i < n) { |
| 2730 | struct kvm_get_htab_header *hdr; |
| 2731 | int m = n < HPTES_PER_GROUP ? n : HPTES_PER_GROUP; |
| 2732 | char buf[sizeof(*hdr) + m * HASH_PTE_SIZE_64]; |
| 2733 | |
| 2734 | rc = read(fd, buf, sizeof(buf)); |
| 2735 | if (rc < 0) { |
| 2736 | hw_error("kvmppc_read_hptes: Unable to read HPTEs"); |
| 2737 | } |
| 2738 | |
| 2739 | hdr = (struct kvm_get_htab_header *)buf; |
| 2740 | while ((i < n) && ((char *)hdr < (buf + rc))) { |
Alexey Kardashevskiy | a36593e | 2018-01-11 15:08:32 +1100 | [diff] [blame] | 2741 | int invalid = hdr->n_invalid, valid = hdr->n_valid; |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2742 | |
| 2743 | if (hdr->index != (ptex + i)) { |
| 2744 | hw_error("kvmppc_read_hptes: Unexpected HPTE index %"PRIu32 |
| 2745 | " != (%"HWADDR_PRIu" + %d", hdr->index, ptex, i); |
| 2746 | } |
| 2747 | |
Alexey Kardashevskiy | a36593e | 2018-01-11 15:08:32 +1100 | [diff] [blame] | 2748 | if (n - i < valid) { |
| 2749 | valid = n - i; |
| 2750 | } |
| 2751 | memcpy(hptes + i, hdr + 1, HASH_PTE_SIZE_64 * valid); |
| 2752 | i += valid; |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2753 | |
| 2754 | if ((n - i) < invalid) { |
| 2755 | invalid = n - i; |
| 2756 | } |
| 2757 | memset(hptes + i, 0, invalid * HASH_PTE_SIZE_64); |
Alexey Kardashevskiy | a36593e | 2018-01-11 15:08:32 +1100 | [diff] [blame] | 2758 | i += invalid; |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2759 | |
| 2760 | hdr = (struct kvm_get_htab_header *) |
| 2761 | ((char *)(hdr + 1) + HASH_PTE_SIZE_64 * hdr->n_valid); |
| 2762 | } |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2763 | } |
| 2764 | |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2765 | close(fd); |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2766 | } |
| 2767 | |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2768 | void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) |
Aneesh Kumar K.V | 7c43bca | 2014-02-20 18:52:24 +0100 | [diff] [blame] | 2769 | { |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2770 | int fd, rc; |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2771 | struct { |
| 2772 | struct kvm_get_htab_header hdr; |
| 2773 | uint64_t pte0; |
| 2774 | uint64_t pte1; |
| 2775 | } buf; |
Aneesh Kumar K.V | c138593 | 2014-02-20 18:52:38 +0100 | [diff] [blame] | 2776 | |
Greg Kurz | 14b0d74 | 2017-09-15 15:16:20 +0200 | [diff] [blame] | 2777 | fd = kvmppc_get_htab_fd(true, 0 /* Ignored */, &error_abort); |
Aneesh Kumar K.V | c138593 | 2014-02-20 18:52:38 +0100 | [diff] [blame] | 2778 | |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2779 | buf.hdr.n_valid = 1; |
| 2780 | buf.hdr.n_invalid = 0; |
| 2781 | buf.hdr.index = ptex; |
| 2782 | buf.pte0 = cpu_to_be64(pte0); |
| 2783 | buf.pte1 = cpu_to_be64(pte1); |
| 2784 | |
| 2785 | rc = write(fd, &buf, sizeof(buf)); |
| 2786 | if (rc != sizeof(buf)) { |
| 2787 | hw_error("kvmppc_write_hpte: Unable to update KVM HPT"); |
Aneesh Kumar K.V | c138593 | 2014-02-20 18:52:38 +0100 | [diff] [blame] | 2788 | } |
David Gibson | 1ad9f0a | 2017-02-27 15:34:19 +1100 | [diff] [blame] | 2789 | close(fd); |
Aneesh Kumar K.V | c138593 | 2014-02-20 18:52:38 +0100 | [diff] [blame] | 2790 | } |
Frank Blaschka | 9e03a04 | 2015-01-09 09:04:40 +0100 | [diff] [blame] | 2791 | |
| 2792 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
Pavel Fedin | dc9f06c | 2015-10-15 16:44:52 +0300 | [diff] [blame] | 2793 | uint64_t address, uint32_t data, PCIDevice *dev) |
Frank Blaschka | 9e03a04 | 2015-01-09 09:04:40 +0100 | [diff] [blame] | 2794 | { |
| 2795 | return 0; |
| 2796 | } |
Eric Auger | 1850b6b | 2015-06-02 14:56:23 +0100 | [diff] [blame] | 2797 | |
Peter Xu | 38d8749 | 2016-07-14 13:56:31 +0800 | [diff] [blame] | 2798 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, |
| 2799 | int vector, PCIDevice *dev) |
| 2800 | { |
| 2801 | return 0; |
| 2802 | } |
| 2803 | |
| 2804 | int kvm_arch_release_virq_post(int virq) |
| 2805 | { |
| 2806 | return 0; |
| 2807 | } |
| 2808 | |
Eric Auger | 1850b6b | 2015-06-02 14:56:23 +0100 | [diff] [blame] | 2809 | int kvm_arch_msi_data_to_gsi(uint32_t data) |
| 2810 | { |
| 2811 | return data & 0xffff; |
| 2812 | } |
Thomas Huth | 4d9392b | 2015-09-17 10:49:41 +0200 | [diff] [blame] | 2813 | |
Aravinda Prasad | 9ac703a | 2020-01-31 00:14:19 +0530 | [diff] [blame] | 2814 | #if defined(TARGET_PPC64) |
| 2815 | int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run) |
| 2816 | { |
Ganesh Goudar | 211a778 | 2020-04-08 22:39:44 +0530 | [diff] [blame] | 2817 | uint16_t flags = run->flags & KVM_RUN_PPC_NMI_DISP_MASK; |
Aravinda Prasad | 81fe70e | 2020-01-31 00:14:20 +0530 | [diff] [blame] | 2818 | |
Aravinda Prasad | 9ac703a | 2020-01-31 00:14:19 +0530 | [diff] [blame] | 2819 | cpu_synchronize_state(CPU(cpu)); |
| 2820 | |
Ganesh Goudar | 211a778 | 2020-04-08 22:39:44 +0530 | [diff] [blame] | 2821 | spapr_mce_req_event(cpu, flags == KVM_RUN_PPC_NMI_DISP_FULLY_RECOV); |
Aravinda Prasad | 9ac703a | 2020-01-31 00:14:19 +0530 | [diff] [blame] | 2822 | |
| 2823 | return 0; |
| 2824 | } |
| 2825 | #endif |
| 2826 | |
Thomas Huth | 4d9392b | 2015-09-17 10:49:41 +0200 | [diff] [blame] | 2827 | int kvmppc_enable_hwrng(void) |
| 2828 | { |
| 2829 | if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRNG)) { |
| 2830 | return -1; |
| 2831 | } |
| 2832 | |
| 2833 | return kvmppc_enable_hcall(kvm_state, H_RANDOM); |
| 2834 | } |
David Gibson | 30f4b05 | 2017-05-12 15:46:11 +1000 | [diff] [blame] | 2835 | |
| 2836 | void kvmppc_check_papr_resize_hpt(Error **errp) |
| 2837 | { |
| 2838 | if (!kvm_enabled()) { |
David Gibson | b55d295 | 2017-07-12 17:56:55 +1000 | [diff] [blame] | 2839 | return; /* No KVM, we're good */ |
| 2840 | } |
| 2841 | |
| 2842 | if (cap_resize_hpt) { |
| 2843 | return; /* Kernel has explicit support, we're good */ |
| 2844 | } |
| 2845 | |
| 2846 | /* Otherwise fallback on looking for PR KVM */ |
| 2847 | if (kvmppc_is_pr(kvm_state)) { |
David Gibson | 30f4b05 | 2017-05-12 15:46:11 +1000 | [diff] [blame] | 2848 | return; |
| 2849 | } |
| 2850 | |
David Gibson | 30f4b05 | 2017-05-12 15:46:11 +1000 | [diff] [blame] | 2851 | error_setg(errp, |
| 2852 | "Hash page table resizing not available with this KVM version"); |
| 2853 | } |
David Gibson | b55d295 | 2017-07-12 17:56:55 +1000 | [diff] [blame] | 2854 | |
| 2855 | int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong flags, int shift) |
| 2856 | { |
| 2857 | CPUState *cs = CPU(cpu); |
| 2858 | struct kvm_ppc_resize_hpt rhpt = { |
| 2859 | .flags = flags, |
| 2860 | .shift = shift, |
| 2861 | }; |
| 2862 | |
| 2863 | if (!cap_resize_hpt) { |
| 2864 | return -ENOSYS; |
| 2865 | } |
| 2866 | |
| 2867 | return kvm_vm_ioctl(cs->kvm_state, KVM_PPC_RESIZE_HPT_PREPARE, &rhpt); |
| 2868 | } |
| 2869 | |
| 2870 | int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift) |
| 2871 | { |
| 2872 | CPUState *cs = CPU(cpu); |
| 2873 | struct kvm_ppc_resize_hpt rhpt = { |
| 2874 | .flags = flags, |
| 2875 | .shift = shift, |
| 2876 | }; |
| 2877 | |
| 2878 | if (!cap_resize_hpt) { |
| 2879 | return -ENOSYS; |
| 2880 | } |
| 2881 | |
| 2882 | return kvm_vm_ioctl(cs->kvm_state, KVM_PPC_RESIZE_HPT_COMMIT, &rhpt); |
| 2883 | } |
| 2884 | |
Daniel Henrique Barboza | c363a37 | 2017-08-09 17:43:46 -0300 | [diff] [blame] | 2885 | /* |
| 2886 | * This is a helper function to detect a post migration scenario |
| 2887 | * in which a guest, running as KVM-HV, freezes in cpu_post_load because |
| 2888 | * the guest kernel can't handle a PVR value other than the actual host |
| 2889 | * PVR in KVM_SET_SREGS, even if pvr_match() returns true. |
| 2890 | * |
| 2891 | * If we don't have cap_ppc_pvr_compat and we're not running in PR |
| 2892 | * (so, we're HV), return true. The workaround itself is done in |
| 2893 | * cpu_post_load. |
| 2894 | * |
| 2895 | * The order here is important: we'll only check for KVM PR as a |
| 2896 | * fallback if the guest kernel can't handle the situation itself. |
| 2897 | * We need to avoid as much as possible querying the running KVM type |
| 2898 | * in QEMU level. |
| 2899 | */ |
| 2900 | bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu) |
| 2901 | { |
| 2902 | CPUState *cs = CPU(cpu); |
| 2903 | |
| 2904 | if (!kvm_enabled()) { |
| 2905 | return false; |
| 2906 | } |
| 2907 | |
| 2908 | if (cap_ppc_pvr_compat) { |
| 2909 | return false; |
| 2910 | } |
| 2911 | |
| 2912 | return !kvmppc_is_pr(cs->kvm_state); |
| 2913 | } |
Nikunj A Dadhania | a84f717 | 2018-09-04 14:54:18 +0530 | [diff] [blame] | 2914 | |
| 2915 | void kvmppc_set_reg_ppc_online(PowerPCCPU *cpu, unsigned int online) |
| 2916 | { |
| 2917 | CPUState *cs = CPU(cpu); |
| 2918 | |
| 2919 | if (kvm_enabled()) { |
| 2920 | kvm_set_one_reg(cs, KVM_REG_PPC_ONLINE, &online); |
| 2921 | } |
| 2922 | } |
Greg Kurz | 9723295 | 2019-06-14 13:09:17 +0200 | [diff] [blame] | 2923 | |
| 2924 | void kvmppc_set_reg_tb_offset(PowerPCCPU *cpu, int64_t tb_offset) |
| 2925 | { |
| 2926 | CPUState *cs = CPU(cpu); |
| 2927 | |
| 2928 | if (kvm_enabled()) { |
| 2929 | kvm_set_one_reg(cs, KVM_REG_PPC_TB_OFFSET, &tb_offset); |
| 2930 | } |
| 2931 | } |