Philippe Mathieu-Daudé | 87e0331 | 2017-07-28 19:46:05 -0300 | [diff] [blame] | 1 | # See docs/devel/tracing.txt for syntax documentation. |
Daniel P. Berrange | f0b9e35 | 2016-06-16 09:40:07 +0100 | [diff] [blame] | 2 | |
| 3 | # hw/sparc/sun4m.c |
| 4 | sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
| 5 | sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" |
| 6 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
| 7 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
| 8 | |
Mark Cave-Ayland | ba51ef2 | 2018-01-08 18:16:34 +0000 | [diff] [blame] | 9 | # hw/sparc/sun4m_iommu.c |
| 10 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" |
| 11 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" |
| 12 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 |
| 13 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x" |
| 14 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x" |
| 15 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x" |
| 16 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" |
| 17 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 |
| 18 | |
Daniel P. Berrange | f0b9e35 | 2016-06-16 09:40:07 +0100 | [diff] [blame] | 19 | # hw/sparc/leon3.c |
| 20 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
| 21 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" |