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Laurent Vivierfa2ba3b2019-10-26 18:45:42 +02001/*
2 * QEMU Macintosh Nubus
3 *
4 * Copyright (c) 2013-2018 Laurent Vivier <laurent@vivier.eu>
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 */
10
Mark Cave-Ayland5d1fa7e2021-09-24 08:37:49 +010011/*
12 * References:
13 * Nubus Specification (TI)
14 * http://www.bitsavers.org/pdf/ti/nubus/2242825-0001_NuBus_Spec1983.pdf
15 *
16 * Designing Cards and Drivers for the Macintosh Family (Apple)
17 */
18
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020019#include "qemu/osdep.h"
20#include "hw/nubus/nubus.h"
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020021#include "qapi/error.h"
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010022#include "trace.h"
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020023
24
25static NubusBus *nubus_find(void)
26{
27 /* Returns NULL unless there is exactly one nubus device */
28 return NUBUS_BUS(object_resolve_path_type("", TYPE_NUBUS_BUS, NULL));
29}
30
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010031static MemTxResult nubus_slot_write(void *opaque, hwaddr addr, uint64_t val,
32 unsigned size, MemTxAttrs attrs)
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020033{
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010034 trace_nubus_slot_write(addr, val, size);
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010035 return MEMTX_DECODE_ERROR;
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020036}
37
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010038static MemTxResult nubus_slot_read(void *opaque, hwaddr addr, uint64_t *data,
39 unsigned size, MemTxAttrs attrs)
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020040{
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010041 trace_nubus_slot_read(addr, size);
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010042 return MEMTX_DECODE_ERROR;
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020043}
44
45static const MemoryRegionOps nubus_slot_ops = {
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010046 .read_with_attrs = nubus_slot_read,
47 .write_with_attrs = nubus_slot_write,
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020048 .endianness = DEVICE_BIG_ENDIAN,
49 .valid = {
50 .min_access_size = 1,
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010051 .max_access_size = 4,
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020052 },
53};
54
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010055static MemTxResult nubus_super_slot_write(void *opaque, hwaddr addr,
56 uint64_t val, unsigned size,
57 MemTxAttrs attrs)
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020058{
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010059 trace_nubus_super_slot_write(addr, val, size);
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010060 return MEMTX_DECODE_ERROR;
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020061}
62
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010063static MemTxResult nubus_super_slot_read(void *opaque, hwaddr addr,
64 uint64_t *data, unsigned size,
65 MemTxAttrs attrs)
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020066{
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010067 trace_nubus_super_slot_read(addr, size);
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010068 return MEMTX_DECODE_ERROR;
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020069}
70
71static const MemoryRegionOps nubus_super_slot_ops = {
Mark Cave-Ayland1d3d62d2021-09-24 08:37:56 +010072 .read_with_attrs = nubus_super_slot_read,
73 .write_with_attrs = nubus_super_slot_write,
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020074 .endianness = DEVICE_BIG_ENDIAN,
75 .valid = {
76 .min_access_size = 1,
Mark Cave-Aylandce0e6a22021-09-24 08:37:55 +010077 .max_access_size = 4,
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020078 },
79};
80
Mark Cave-Ayland62437f92021-09-24 08:38:00 +010081static void nubus_unrealize(BusState *bus)
82{
83 NubusBus *nubus = NUBUS_BUS(bus);
84
85 address_space_destroy(&nubus->nubus_as);
86}
87
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020088static void nubus_realize(BusState *bus, Error **errp)
89{
Mark Cave-Ayland62437f92021-09-24 08:38:00 +010090 NubusBus *nubus = NUBUS_BUS(bus);
91
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020092 if (!nubus_find()) {
93 error_setg(errp, "at most one %s device is permitted", TYPE_NUBUS_BUS);
94 return;
95 }
Mark Cave-Ayland62437f92021-09-24 08:38:00 +010096
97 address_space_init(&nubus->nubus_as, &nubus->nubus_mr, "nubus");
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +020098}
99
100static void nubus_init(Object *obj)
101{
102 NubusBus *nubus = NUBUS_BUS(obj);
103
Mark Cave-Ayland62437f92021-09-24 08:38:00 +0100104 memory_region_init(&nubus->nubus_mr, obj, "nubus", 0x100000000);
105
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200106 memory_region_init_io(&nubus->super_slot_io, obj, &nubus_super_slot_ops,
107 nubus, "nubus-super-slots",
Mark Cave-Ayland03deab92021-09-24 08:37:52 +0100108 (NUBUS_SUPER_SLOT_NB + 1) * NUBUS_SUPER_SLOT_SIZE);
Mark Cave-Ayland62437f92021-09-24 08:38:00 +0100109 memory_region_add_subregion(&nubus->nubus_mr, 0x0, &nubus->super_slot_io);
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200110
111 memory_region_init_io(&nubus->slot_io, obj, &nubus_slot_ops,
112 nubus, "nubus-slots",
113 NUBUS_SLOT_NB * NUBUS_SLOT_SIZE);
Mark Cave-Ayland62437f92021-09-24 08:38:00 +0100114 memory_region_add_subregion(&nubus->nubus_mr,
115 (NUBUS_SUPER_SLOT_NB + 1) *
116 NUBUS_SUPER_SLOT_SIZE, &nubus->slot_io);
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200117
Mark Cave-Ayland03deab92021-09-24 08:37:52 +0100118 nubus->slot_available_mask = MAKE_64BIT_MASK(NUBUS_FIRST_SLOT,
119 NUBUS_SLOT_NB);
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200120}
121
Mark Cave-Aylandc0ad4ea2021-09-24 08:37:54 +0100122static char *nubus_get_dev_path(DeviceState *dev)
123{
124 NubusDevice *nd = NUBUS_DEVICE(dev);
125 BusState *bus = qdev_get_parent_bus(dev);
126 char *p = qdev_get_dev_path(bus->parent);
127
128 if (p) {
129 char *ret = g_strdup_printf("%s/%s/%02x", p, bus->name, nd->slot);
130 g_free(p);
131 return ret;
132 } else {
133 return g_strdup_printf("%s/%02x", bus->name, nd->slot);
134 }
135}
136
Mark Cave-Aylandc10a5762021-09-24 08:37:53 +0100137static bool nubus_check_address(BusState *bus, DeviceState *dev, Error **errp)
138{
139 NubusDevice *nd = NUBUS_DEVICE(dev);
140 NubusBus *nubus = NUBUS_BUS(bus);
141
142 if (nd->slot == -1) {
143 /* No slot specified, find first available free slot */
144 int s = ctz32(nubus->slot_available_mask);
145 if (s != 32) {
146 nd->slot = s;
147 } else {
148 error_setg(errp, "Cannot register nubus card, no free slot "
149 "available");
150 return false;
151 }
152 } else {
153 /* Slot specified, make sure the slot is available */
154 if (!(nubus->slot_available_mask & BIT(nd->slot))) {
155 error_setg(errp, "Cannot register nubus card, slot %d is "
156 "unavailable or already occupied", nd->slot);
157 return false;
158 }
159 }
160
161 nubus->slot_available_mask &= ~BIT(nd->slot);
162 return true;
163}
164
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200165static void nubus_class_init(ObjectClass *oc, void *data)
166{
167 BusClass *bc = BUS_CLASS(oc);
168
169 bc->realize = nubus_realize;
Mark Cave-Ayland62437f92021-09-24 08:38:00 +0100170 bc->unrealize = nubus_unrealize;
Mark Cave-Aylandc10a5762021-09-24 08:37:53 +0100171 bc->check_address = nubus_check_address;
Mark Cave-Aylandc0ad4ea2021-09-24 08:37:54 +0100172 bc->get_dev_path = nubus_get_dev_path;
Laurent Vivierfa2ba3b2019-10-26 18:45:42 +0200173}
174
175static const TypeInfo nubus_bus_info = {
176 .name = TYPE_NUBUS_BUS,
177 .parent = TYPE_BUS,
178 .instance_size = sizeof(NubusBus),
179 .instance_init = nubus_init,
180 .class_init = nubus_class_init,
181};
182
183static void nubus_register_types(void)
184{
185 type_register_static(&nubus_bus_info);
186}
187
188type_init(nubus_register_types)