blob: b2d5327dbf4e007996ce0deee6b91207adaca18a [file] [log] [blame]
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001/*
2 * Channel subsystem base support.
3 *
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
9 * directory.
10 */
11
Peter Maydell96154952016-01-26 18:17:00 +000012#include "qemu/osdep.h"
Halil Pasicc1755b12016-01-27 13:24:17 +010013#include "qapi/error.h"
Cornelia Huck06e686e2016-04-01 13:42:04 +020014#include "qapi/visitor.h"
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000015#include "qemu/bitops.h"
Halil Pasic8ed179c2017-05-18 13:14:05 +020016#include "qemu/error-report.h"
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +010017#include "exec/address-spaces.h"
Paolo Bonzinibd3f16a2015-12-04 12:06:26 +010018#include "hw/s390x/ioinst.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020019#include "hw/qdev-properties.h"
Paolo Bonzinibd3f16a2015-12-04 12:06:26 +010020#include "hw/s390x/css.h"
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000021#include "trace.h"
Cornelia Huck03cf0772013-07-15 17:45:03 +020022#include "hw/s390x/s390_flic.h"
Halil Pasic517ff122017-07-03 23:34:14 +020023#include "hw/s390x/s390-virtio-ccw.h"
Cornelia Huck8fadea22019-05-07 17:47:33 +020024#include "hw/s390x/s390-ccw.h"
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000025
Paolo Bonzinia55ae462024-05-09 19:00:34 +020026bool css_migration_enabled = true;
27
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000028typedef struct CrwContainer {
29 CRW crw;
30 QTAILQ_ENTRY(CrwContainer) sibling;
31} CrwContainer;
32
Halil Pasic457af622017-07-11 16:54:38 +020033static const VMStateDescription vmstate_crw = {
34 .name = "s390_crw",
35 .version_id = 1,
36 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +110037 .fields = (const VMStateField[]) {
Halil Pasic457af622017-07-11 16:54:38 +020038 VMSTATE_UINT16(flags, CRW),
39 VMSTATE_UINT16(rsid, CRW),
40 VMSTATE_END_OF_LIST()
41 },
42};
43
44static const VMStateDescription vmstate_crw_container = {
45 .name = "s390_crw_container",
46 .version_id = 1,
47 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +110048 .fields = (const VMStateField[]) {
Halil Pasic457af622017-07-11 16:54:38 +020049 VMSTATE_STRUCT(crw, CrwContainer, 0, vmstate_crw, CRW),
50 VMSTATE_END_OF_LIST()
51 },
52};
53
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000054typedef struct ChpInfo {
55 uint8_t in_use;
56 uint8_t type;
57 uint8_t is_virtual;
58} ChpInfo;
59
Halil Pasic457af622017-07-11 16:54:38 +020060static const VMStateDescription vmstate_chp_info = {
61 .name = "s390_chp_info",
62 .version_id = 1,
63 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +110064 .fields = (const VMStateField[]) {
Halil Pasic457af622017-07-11 16:54:38 +020065 VMSTATE_UINT8(in_use, ChpInfo),
66 VMSTATE_UINT8(type, ChpInfo),
67 VMSTATE_UINT8(is_virtual, ChpInfo),
68 VMSTATE_END_OF_LIST()
69 }
70};
71
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +000072typedef struct SubchSet {
73 SubchDev *sch[MAX_SCHID + 1];
74 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
75 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
76} SubchSet;
77
Halil Pasic517ff122017-07-03 23:34:14 +020078static const VMStateDescription vmstate_scsw = {
79 .name = "s390_scsw",
80 .version_id = 1,
81 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +110082 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +020083 VMSTATE_UINT16(flags, SCSW),
84 VMSTATE_UINT16(ctrl, SCSW),
85 VMSTATE_UINT32(cpa, SCSW),
86 VMSTATE_UINT8(dstat, SCSW),
87 VMSTATE_UINT8(cstat, SCSW),
88 VMSTATE_UINT16(count, SCSW),
89 VMSTATE_END_OF_LIST()
90 }
91};
92
93static const VMStateDescription vmstate_pmcw = {
94 .name = "s390_pmcw",
95 .version_id = 1,
96 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +110097 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +020098 VMSTATE_UINT32(intparm, PMCW),
99 VMSTATE_UINT16(flags, PMCW),
100 VMSTATE_UINT16(devno, PMCW),
101 VMSTATE_UINT8(lpm, PMCW),
102 VMSTATE_UINT8(pnom, PMCW),
103 VMSTATE_UINT8(lpum, PMCW),
104 VMSTATE_UINT8(pim, PMCW),
105 VMSTATE_UINT16(mbi, PMCW),
106 VMSTATE_UINT8(pom, PMCW),
107 VMSTATE_UINT8(pam, PMCW),
108 VMSTATE_UINT8_ARRAY(chpid, PMCW, 8),
109 VMSTATE_UINT32(chars, PMCW),
110 VMSTATE_END_OF_LIST()
111 }
112};
113
114static const VMStateDescription vmstate_schib = {
115 .name = "s390_schib",
116 .version_id = 1,
117 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100118 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200119 VMSTATE_STRUCT(pmcw, SCHIB, 0, vmstate_pmcw, PMCW),
120 VMSTATE_STRUCT(scsw, SCHIB, 0, vmstate_scsw, SCSW),
121 VMSTATE_UINT64(mba, SCHIB),
122 VMSTATE_UINT8_ARRAY(mda, SCHIB, 4),
123 VMSTATE_END_OF_LIST()
124 }
125};
126
127
128static const VMStateDescription vmstate_ccw1 = {
129 .name = "s390_ccw1",
130 .version_id = 1,
131 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100132 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200133 VMSTATE_UINT8(cmd_code, CCW1),
134 VMSTATE_UINT8(flags, CCW1),
135 VMSTATE_UINT16(count, CCW1),
136 VMSTATE_UINT32(cda, CCW1),
137 VMSTATE_END_OF_LIST()
138 }
139};
140
141static const VMStateDescription vmstate_ciw = {
142 .name = "s390_ciw",
143 .version_id = 1,
144 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100145 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200146 VMSTATE_UINT8(type, CIW),
147 VMSTATE_UINT8(command, CIW),
148 VMSTATE_UINT16(count, CIW),
149 VMSTATE_END_OF_LIST()
150 }
151};
152
153static const VMStateDescription vmstate_sense_id = {
154 .name = "s390_sense_id",
155 .version_id = 1,
156 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100157 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200158 VMSTATE_UINT8(reserved, SenseId),
159 VMSTATE_UINT16(cu_type, SenseId),
160 VMSTATE_UINT8(cu_model, SenseId),
161 VMSTATE_UINT16(dev_type, SenseId),
162 VMSTATE_UINT8(dev_model, SenseId),
163 VMSTATE_UINT8(unused, SenseId),
164 VMSTATE_STRUCT_ARRAY(ciw, SenseId, MAX_CIWS, 0, vmstate_ciw, CIW),
165 VMSTATE_END_OF_LIST()
166 }
167};
168
Halil Pasicff443fe2017-07-11 16:54:39 +0200169static const VMStateDescription vmstate_orb = {
170 .name = "s390_orb",
171 .version_id = 1,
172 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100173 .fields = (const VMStateField[]) {
Halil Pasicff443fe2017-07-11 16:54:39 +0200174 VMSTATE_UINT32(intparm, ORB),
175 VMSTATE_UINT16(ctrl0, ORB),
176 VMSTATE_UINT8(lpm, ORB),
177 VMSTATE_UINT8(ctrl1, ORB),
178 VMSTATE_UINT32(cpa, ORB),
179 VMSTATE_END_OF_LIST()
180 }
181};
182
183static bool vmstate_schdev_orb_needed(void *opaque)
184{
Paolo Bonzinia55ae462024-05-09 19:00:34 +0200185 return css_migration_enabled;
Halil Pasicff443fe2017-07-11 16:54:39 +0200186}
187
188static const VMStateDescription vmstate_schdev_orb = {
189 .name = "s390_subch_dev/orb",
190 .version_id = 1,
191 .minimum_version_id = 1,
192 .needed = vmstate_schdev_orb_needed,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100193 .fields = (const VMStateField[]) {
Halil Pasicff443fe2017-07-11 16:54:39 +0200194 VMSTATE_STRUCT(orb, SubchDev, 1, vmstate_orb, ORB),
195 VMSTATE_END_OF_LIST()
196 }
197};
198
Halil Pasic517ff122017-07-03 23:34:14 +0200199static int subch_dev_post_load(void *opaque, int version_id);
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100200static int subch_dev_pre_save(void *opaque);
Halil Pasic517ff122017-07-03 23:34:14 +0200201
202const char err_hint_devno[] = "Devno mismatch, tried to load wrong section!"
203 " Likely reason: some sequences of plug and unplug can break"
204 " migration for machine versions prior to 2.7 (known design flaw).";
205
206const VMStateDescription vmstate_subch_dev = {
207 .name = "s390_subch_dev",
208 .version_id = 1,
209 .minimum_version_id = 1,
210 .post_load = subch_dev_post_load,
211 .pre_save = subch_dev_pre_save,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100212 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200213 VMSTATE_UINT8_EQUAL(cssid, SubchDev, "Bug!"),
214 VMSTATE_UINT8_EQUAL(ssid, SubchDev, "Bug!"),
215 VMSTATE_UINT16(migrated_schid, SubchDev),
216 VMSTATE_UINT16_EQUAL(devno, SubchDev, err_hint_devno),
217 VMSTATE_BOOL(thinint_active, SubchDev),
218 VMSTATE_STRUCT(curr_status, SubchDev, 0, vmstate_schib, SCHIB),
219 VMSTATE_UINT8_ARRAY(sense_data, SubchDev, 32),
220 VMSTATE_UINT64(channel_prog, SubchDev),
221 VMSTATE_STRUCT(last_cmd, SubchDev, 0, vmstate_ccw1, CCW1),
222 VMSTATE_BOOL(last_cmd_valid, SubchDev),
223 VMSTATE_STRUCT(id, SubchDev, 0, vmstate_sense_id, SenseId),
224 VMSTATE_BOOL(ccw_fmt_1, SubchDev),
225 VMSTATE_UINT8(ccw_no_data_cnt, SubchDev),
226 VMSTATE_END_OF_LIST()
Halil Pasicff443fe2017-07-11 16:54:39 +0200227 },
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100228 .subsections = (const VMStateDescription * const []) {
Halil Pasicff443fe2017-07-11 16:54:39 +0200229 &vmstate_schdev_orb,
230 NULL
Halil Pasic517ff122017-07-03 23:34:14 +0200231 }
232};
233
234typedef struct IndAddrPtrTmp {
235 IndAddr **parent;
236 uint64_t addr;
237 int32_t len;
238} IndAddrPtrTmp;
239
240static int post_load_ind_addr(void *opaque, int version_id)
241{
242 IndAddrPtrTmp *ptmp = opaque;
243 IndAddr **ind_addr = ptmp->parent;
244
245 if (ptmp->len != 0) {
246 *ind_addr = get_indicator(ptmp->addr, ptmp->len);
247 } else {
248 *ind_addr = NULL;
249 }
250 return 0;
251}
252
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100253static int pre_save_ind_addr(void *opaque)
Halil Pasic517ff122017-07-03 23:34:14 +0200254{
255 IndAddrPtrTmp *ptmp = opaque;
256 IndAddr *ind_addr = *(ptmp->parent);
257
258 if (ind_addr != NULL) {
259 ptmp->len = ind_addr->len;
260 ptmp->addr = ind_addr->addr;
261 } else {
262 ptmp->len = 0;
263 ptmp->addr = 0L;
264 }
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100265
266 return 0;
Halil Pasic517ff122017-07-03 23:34:14 +0200267}
268
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100269static const VMStateDescription vmstate_ind_addr_tmp = {
Halil Pasic517ff122017-07-03 23:34:14 +0200270 .name = "s390_ind_addr_tmp",
271 .pre_save = pre_save_ind_addr,
272 .post_load = post_load_ind_addr,
273
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100274 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200275 VMSTATE_INT32(len, IndAddrPtrTmp),
276 VMSTATE_UINT64(addr, IndAddrPtrTmp),
277 VMSTATE_END_OF_LIST()
278 }
279};
280
281const VMStateDescription vmstate_ind_addr = {
282 .name = "s390_ind_addr_tmp",
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100283 .fields = (const VMStateField[]) {
Halil Pasic517ff122017-07-03 23:34:14 +0200284 VMSTATE_WITH_TMP(IndAddr*, IndAddrPtrTmp, vmstate_ind_addr_tmp),
285 VMSTATE_END_OF_LIST()
286 }
287};
288
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000289typedef struct CssImage {
290 SubchSet *sch_set[MAX_SSID + 1];
291 ChpInfo chpids[MAX_CHPID + 1];
292} CssImage;
293
Halil Pasic457af622017-07-11 16:54:38 +0200294static const VMStateDescription vmstate_css_img = {
295 .name = "s390_css_img",
296 .version_id = 1,
297 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100298 .fields = (const VMStateField[]) {
Halil Pasic457af622017-07-11 16:54:38 +0200299 /* Subchannel sets have no relevant state. */
300 VMSTATE_STRUCT_ARRAY(chpids, CssImage, MAX_CHPID + 1, 0,
301 vmstate_chp_info, ChpInfo),
302 VMSTATE_END_OF_LIST()
303 }
304
305};
306
Cornelia Huck03cf0772013-07-15 17:45:03 +0200307typedef struct IoAdapter {
308 uint32_t id;
309 uint8_t type;
310 uint8_t isc;
Fei Li1497c162017-03-07 04:07:44 +0100311 uint8_t flags;
Cornelia Huck03cf0772013-07-15 17:45:03 +0200312} IoAdapter;
313
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000314typedef struct ChannelSubSys {
315 QTAILQ_HEAD(, CrwContainer) pending_crws;
Song Shan Gongc81b4f82016-01-19 02:55:00 +0100316 bool sei_pending;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000317 bool do_crw_mchk;
318 bool crws_lost;
319 uint8_t max_cssid;
320 uint8_t max_ssid;
321 bool chnmon_active;
322 uint64_t chnmon_area;
323 CssImage *css[MAX_CSSID + 1];
324 uint8_t default_cssid;
Halil Pasic457af622017-07-11 16:54:38 +0200325 /* don't migrate, see css_register_io_adapters */
Fei Lidde522b2016-11-24 11:10:39 +0100326 IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
Halil Pasic457af622017-07-11 16:54:38 +0200327 /* don't migrate, see get_indicator and IndAddrPtrTmp */
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800328 QTAILQ_HEAD(, IndAddr) indicator_addresses;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000329} ChannelSubSys;
330
Halil Pasic457af622017-07-11 16:54:38 +0200331static const VMStateDescription vmstate_css = {
332 .name = "s390_css",
333 .version_id = 1,
334 .minimum_version_id = 1,
Richard Hendersonb9b59a32023-12-21 14:16:31 +1100335 .fields = (const VMStateField[]) {
Halil Pasic457af622017-07-11 16:54:38 +0200336 VMSTATE_QTAILQ_V(pending_crws, ChannelSubSys, 1, vmstate_crw_container,
337 CrwContainer, sibling),
338 VMSTATE_BOOL(sei_pending, ChannelSubSys),
339 VMSTATE_BOOL(do_crw_mchk, ChannelSubSys),
340 VMSTATE_BOOL(crws_lost, ChannelSubSys),
341 /* These were kind of migrated by virtio */
342 VMSTATE_UINT8(max_cssid, ChannelSubSys),
343 VMSTATE_UINT8(max_ssid, ChannelSubSys),
344 VMSTATE_BOOL(chnmon_active, ChannelSubSys),
345 VMSTATE_UINT64(chnmon_area, ChannelSubSys),
346 VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(css, ChannelSubSys, MAX_CSSID + 1,
347 0, vmstate_css_img, CssImage),
348 VMSTATE_UINT8(default_cssid, ChannelSubSys),
349 VMSTATE_END_OF_LIST()
350 }
351};
352
Eduardo Habkostbc994b72016-02-16 18:59:06 -0200353static ChannelSubSys channel_subsys = {
354 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
355 .do_crw_mchk = true,
356 .sei_pending = false,
Eduardo Habkostbc994b72016-02-16 18:59:06 -0200357 .crws_lost = false,
358 .chnmon_active = false,
Eduardo Habkostbc994b72016-02-16 18:59:06 -0200359 .indicator_addresses =
360 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
361};
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000362
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100363static int subch_dev_pre_save(void *opaque)
Halil Pasic517ff122017-07-03 23:34:14 +0200364{
365 SubchDev *s = opaque;
366
367 /* Prepare remote_schid for save */
368 s->migrated_schid = s->schid;
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100369
370 return 0;
Halil Pasic517ff122017-07-03 23:34:14 +0200371}
372
373static int subch_dev_post_load(void *opaque, int version_id)
374{
375
376 SubchDev *s = opaque;
377
378 /* Re-assign the subchannel to remote_schid if necessary */
379 if (s->migrated_schid != s->schid) {
380 if (css_find_subch(true, s->cssid, s->ssid, s->schid) == s) {
381 /*
382 * Cleanup the slot before moving to s->migrated_schid provided
383 * it still belongs to us, i.e. it was not changed by previous
384 * invocation of this function.
385 */
386 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, NULL);
387 }
388 /* It's OK to re-assign without a prior de-assign. */
389 s->schid = s->migrated_schid;
390 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
391 }
392
Paolo Bonzinia55ae462024-05-09 19:00:34 +0200393 if (css_migration_enabled) {
Halil Pasic457af622017-07-11 16:54:38 +0200394 /* No compat voodoo to do ;) */
395 return 0;
396 }
Halil Pasic517ff122017-07-03 23:34:14 +0200397 /*
398 * Hack alert. If we don't migrate the channel subsystem status
399 * we still need to find out if the guest enabled mss/mcss-e.
400 * If the subchannel is enabled, it certainly was able to access it,
401 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
402 * values. This is not watertight, but better than nothing.
403 */
404 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
405 if (s->ssid) {
406 channel_subsys.max_ssid = MAX_SSID;
407 }
408 if (s->cssid != channel_subsys.default_cssid) {
409 channel_subsys.max_cssid = MAX_CSSID;
410 }
411 }
412 return 0;
413}
414
Halil Pasice9965832017-07-11 16:54:40 +0200415void css_register_vmstate(void)
416{
Paolo Bonzinia55ae462024-05-09 19:00:34 +0200417 if (css_migration_enabled) {
418 vmstate_register(NULL, 0, &vmstate_css, &channel_subsys);
419 }
Halil Pasice9965832017-07-11 16:54:40 +0200420}
421
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800422IndAddr *get_indicator(hwaddr ind_addr, int len)
423{
424 IndAddr *indicator;
425
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200426 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800427 if (indicator->addr == ind_addr) {
428 indicator->refcnt++;
429 return indicator;
430 }
431 }
432 indicator = g_new0(IndAddr, 1);
433 indicator->addr = ind_addr;
434 indicator->len = len;
435 indicator->refcnt = 1;
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200436 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800437 indicator, sibling);
438 return indicator;
439}
440
441static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
442 bool do_map)
443{
444 S390FLICState *fs = s390_get_flic();
David Hildenbrand67628082018-01-29 13:56:23 +0100445 S390FLICStateClass *fsc = s390_get_flic_class(fs);
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800446
447 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
448}
449
450void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
451{
452 assert(indicator->refcnt > 0);
453 indicator->refcnt--;
454 if (indicator->refcnt > 0) {
455 return;
456 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200457 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
Yi Min Zhaoa28d8392016-01-27 16:05:26 +0800458 if (indicator->map) {
459 s390_io_adapter_map(adapter, indicator->map, false);
460 }
461 g_free(indicator);
462}
463
464int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
465{
466 int ret;
467
468 if (indicator->map) {
469 return 0; /* already mapped is not an error */
470 }
471 indicator->map = indicator->addr;
472 ret = s390_io_adapter_map(adapter, indicator->map, true);
473 if ((ret != 0) && (ret != -ENOSYS)) {
474 goto out_err;
475 }
476 return 0;
477
478out_err:
479 indicator->map = 0;
480 return ret;
481}
482
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000483int css_create_css_image(uint8_t cssid, bool default_image)
484{
485 trace_css_new_image(cssid, default_image ? "(default)" : "");
Cornelia Huck882b3b92016-08-15 11:10:28 +0200486 /* 255 is reserved */
487 if (cssid == 255) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000488 return -EINVAL;
489 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200490 if (channel_subsys.css[cssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000491 return -EBUSY;
492 }
Marc-André Lureau96f64aa2017-10-06 20:49:21 -0300493 channel_subsys.css[cssid] = g_new0(CssImage, 1);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000494 if (default_image) {
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200495 channel_subsys.default_cssid = cssid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000496 }
497 return 0;
498}
499
Fei Lidde522b2016-11-24 11:10:39 +0100500uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
Cornelia Huck03cf0772013-07-15 17:45:03 +0200501{
Fei Lidde522b2016-11-24 11:10:39 +0100502 if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
503 !channel_subsys.io_adapters[type][isc]) {
504 return -1;
505 }
506
507 return channel_subsys.io_adapters[type][isc]->id;
508}
509
510/**
511 * css_register_io_adapters: Register I/O adapters per ISC during init
512 *
513 * @swap: an indication if byte swap is needed.
514 * @maskable: an indication if the adapter is subject to the mask operation.
Fei Li1497c162017-03-07 04:07:44 +0100515 * @flags: further characteristics of the adapter.
516 * e.g. suppressible, an indication if the adapter is subject to AIS.
Fei Lidde522b2016-11-24 11:10:39 +0100517 * @errp: location to store error information.
518 */
519void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
Fei Li1497c162017-03-07 04:07:44 +0100520 uint8_t flags, Error **errp)
Fei Lidde522b2016-11-24 11:10:39 +0100521{
522 uint32_t id;
523 int ret, isc;
Cornelia Huck03cf0772013-07-15 17:45:03 +0200524 IoAdapter *adapter;
Cornelia Huck03cf0772013-07-15 17:45:03 +0200525 S390FLICState *fs = s390_get_flic();
David Hildenbrand67628082018-01-29 13:56:23 +0100526 S390FLICStateClass *fsc = s390_get_flic_class(fs);
Cornelia Huck03cf0772013-07-15 17:45:03 +0200527
Fei Lidde522b2016-11-24 11:10:39 +0100528 /*
529 * Disallow multiple registrations for the same device type.
530 * Report an error if registering for an already registered type.
531 */
532 if (channel_subsys.io_adapters[type][0]) {
533 error_setg(errp, "Adapters for type %d already registered", type);
534 }
535
536 for (isc = 0; isc <= MAX_ISC; isc++) {
537 id = (type << 3) | isc;
Fei Li1497c162017-03-07 04:07:44 +0100538 ret = fsc->register_io_adapter(fs, id, isc, swap, maskable, flags);
Fei Lidde522b2016-11-24 11:10:39 +0100539 if (ret == 0) {
540 adapter = g_new0(IoAdapter, 1);
541 adapter->id = id;
542 adapter->isc = isc;
543 adapter->type = type;
Fei Li1497c162017-03-07 04:07:44 +0100544 adapter->flags = flags;
Fei Lidde522b2016-11-24 11:10:39 +0100545 channel_subsys.io_adapters[type][isc] = adapter;
546 } else {
547 error_setg_errno(errp, -ret, "Unexpected error %d when "
548 "registering adapter %d", ret, id);
Cornelia Huck03cf0772013-07-15 17:45:03 +0200549 break;
550 }
Fei Lidde522b2016-11-24 11:10:39 +0100551 }
552
553 /*
554 * No need to free registered adapters in kvm: kvm will clean up
555 * when the machine goes away.
556 */
557 if (ret) {
558 for (isc--; isc >= 0; isc--) {
559 g_free(channel_subsys.io_adapters[type][isc]);
560 channel_subsys.io_adapters[type][isc] = NULL;
Cornelia Huck03cf0772013-07-15 17:45:03 +0200561 }
562 }
Fei Lidde522b2016-11-24 11:10:39 +0100563
Cornelia Huck03cf0772013-07-15 17:45:03 +0200564}
565
Halil Pasicc1755b12016-01-27 13:24:17 +0100566static void css_clear_io_interrupt(uint16_t subchannel_id,
567 uint16_t subchannel_nr)
568{
569 Error *err = NULL;
570 static bool no_clear_irq;
571 S390FLICState *fs = s390_get_flic();
David Hildenbrand67628082018-01-29 13:56:23 +0100572 S390FLICStateClass *fsc = s390_get_flic_class(fs);
Halil Pasicc1755b12016-01-27 13:24:17 +0100573 int r;
574
575 if (unlikely(no_clear_irq)) {
576 return;
577 }
578 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
579 switch (r) {
580 case 0:
581 break;
582 case -ENOSYS:
583 no_clear_irq = true;
584 /*
585 * Ignore unavailability, as the user can't do anything
586 * about it anyway.
587 */
588 break;
589 default:
590 error_setg_errno(&err, -r, "unexpected error condition");
591 error_propagate(&error_abort, err);
592 }
593}
594
595static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000596{
Eduardo Habkost562f5e02016-02-16 18:59:05 -0200597 if (channel_subsys.max_cssid > 0) {
Halil Pasicc1755b12016-01-27 13:24:17 +0100598 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000599 }
Halil Pasicc1755b12016-01-27 13:24:17 +0100600 return (ssid << 1) | 1;
601}
602
603uint16_t css_build_subchannel_id(SubchDev *sch)
604{
605 return css_do_build_subchannel_id(sch->cssid, sch->ssid);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000606}
607
Xiao Feng Ren8ca2b372017-05-17 02:48:10 +0200608void css_inject_io_interrupt(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000609{
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000610 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
611
612 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
613 sch->curr_status.pmcw.intparm, isc, "");
Cornelia Huckde13d212014-03-11 13:19:43 +0100614 s390_io_interrupt(css_build_subchannel_id(sch),
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000615 sch->schid,
616 sch->curr_status.pmcw.intparm,
Cornelia Huck91b0a8f2013-02-07 02:20:51 +0000617 isc << 27);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000618}
619
620void css_conditional_io_interrupt(SubchDev *sch)
621{
622 /*
Cornelia Huck6e9c8932018-05-04 14:53:16 +0200623 * If the subchannel is not enabled, it is not made status pending
624 * (see PoP p. 16-17, "Status Control").
625 */
626 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA)) {
627 return;
628 }
629
630 /*
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000631 * If the subchannel is not currently status pending, make it pending
632 * with alert status.
633 */
634 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000635 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
636
637 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
638 sch->curr_status.pmcw.intparm, isc,
639 "(unsolicited)");
640 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
641 sch->curr_status.scsw.ctrl |=
642 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
643 /* Inject an I/O interrupt. */
Cornelia Huckde13d212014-03-11 13:19:43 +0100644 s390_io_interrupt(css_build_subchannel_id(sch),
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000645 sch->schid,
646 sch->curr_status.pmcw.intparm,
Cornelia Huck91b0a8f2013-02-07 02:20:51 +0000647 isc << 27);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000648 }
649}
650
Philippe Mathieu-Daudé62337592023-11-05 19:22:57 +0100651int css_do_sic(S390CPU *cpu, uint8_t isc, uint16_t mode)
Cornelia Huck7e749462013-02-06 10:31:37 +0100652{
Philippe Mathieu-Daudé62337592023-11-05 19:22:57 +0100653 CPUS390XState *env = &cpu->env;
Fei Li2283f4d2017-02-17 15:40:41 +0800654 S390FLICState *fs = s390_get_flic();
David Hildenbrand67628082018-01-29 13:56:23 +0100655 S390FLICStateClass *fsc = s390_get_flic_class(fs);
Fei Li2283f4d2017-02-17 15:40:41 +0800656 int r;
657
658 if (env->psw.mask & PSW_MASK_PSTATE) {
659 r = -PGM_PRIVILEGED;
660 goto out;
661 }
662
663 trace_css_do_sic(mode, isc);
664 switch (mode) {
665 case SIC_IRQ_MODE_ALL:
666 case SIC_IRQ_MODE_SINGLE:
667 break;
668 default:
669 r = -PGM_OPERAND;
670 goto out;
671 }
672
673 r = fsc->modify_ais_mode(fs, isc, mode) ? -PGM_OPERATION : 0;
674out:
675 return r;
676}
677
Yi Min Zhao25a08b82017-02-17 15:26:48 +0800678void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc)
Cornelia Huck7e749462013-02-06 10:31:37 +0100679{
Yi Min Zhao25a08b82017-02-17 15:26:48 +0800680 S390FLICState *fs = s390_get_flic();
David Hildenbrand67628082018-01-29 13:56:23 +0100681 S390FLICStateClass *fsc = s390_get_flic_class(fs);
Cornelia Huck7e749462013-02-06 10:31:37 +0100682 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
Yi Min Zhao25a08b82017-02-17 15:26:48 +0800683 IoAdapter *adapter = channel_subsys.io_adapters[type][isc];
684
685 if (!adapter) {
686 return;
687 }
Cornelia Huck7e749462013-02-06 10:31:37 +0100688
689 trace_css_adapter_interrupt(isc);
Yi Min Zhao25a08b82017-02-17 15:26:48 +0800690 if (fs->ais_supported) {
691 if (fsc->inject_airq(fs, type, isc, adapter->flags)) {
692 error_report("Failed to inject airq with AIS supported");
693 exit(1);
694 }
695 } else {
696 s390_io_interrupt(0, 0, 0, io_int_word);
697 }
Cornelia Huck7e749462013-02-06 10:31:37 +0100698}
699
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000700static void sch_handle_clear_func(SubchDev *sch)
701{
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000702 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000703 int path;
704
705 /* Path management: In our simple css, we always choose the only path. */
706 path = 0x80;
707
Stefan Weil4c293dc2013-08-18 19:40:06 +0200708 /* Reset values prior to 'issuing the clear signal'. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000709 schib->pmcw.lpum = 0;
710 schib->pmcw.pom = 0xff;
711 schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000712
713 /* We always 'attempt to issue the clear signal', and we always succeed. */
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000714 sch->channel_prog = 0x0;
715 sch->last_cmd_valid = false;
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000716 schib->scsw.ctrl &= ~SCSW_ACTL_CLEAR_PEND;
717 schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000718
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000719 schib->scsw.dstat = 0;
720 schib->scsw.cstat = 0;
721 schib->pmcw.lpum = path;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000722
723}
724
725static void sch_handle_halt_func(SubchDev *sch)
726{
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000727 SCHIB *schib = &sch->curr_status;
Cornelia Huck2ed982b2014-06-30 14:33:38 +0200728 hwaddr curr_ccw = sch->channel_prog;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000729 int path;
730
731 /* Path management: In our simple css, we always choose the only path. */
732 path = 0x80;
733
734 /* We always 'attempt to issue the halt signal', and we always succeed. */
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000735 sch->channel_prog = 0x0;
736 sch->last_cmd_valid = false;
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000737 schib->scsw.ctrl &= ~SCSW_ACTL_HALT_PEND;
738 schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000739
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000740 if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE |
741 SCSW_ACTL_DEVICE_ACTIVE)) ||
742 !((schib->scsw.ctrl & SCSW_ACTL_START_PEND) ||
743 (schib->scsw.ctrl & SCSW_ACTL_SUSP))) {
744 schib->scsw.dstat = SCSW_DSTAT_DEVICE_END;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000745 }
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000746 if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE |
747 SCSW_ACTL_DEVICE_ACTIVE)) ||
748 (schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
749 schib->scsw.cpa = curr_ccw + 8;
Cornelia Huck2ed982b2014-06-30 14:33:38 +0200750 }
Daniel P. Berrangébea02792019-03-29 11:11:02 +0000751 schib->scsw.cstat = 0;
752 schib->pmcw.lpum = path;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000753
754}
755
Thomas Huth729315e2018-09-27 10:23:34 +0200756/*
757 * As the SenseId struct cannot be packed (would cause unaligned accesses), we
758 * have to copy the individual fields to an unstructured area using the correct
759 * layout (see SA22-7204-01 "Common I/O-Device Commands").
760 */
761static void copy_sense_id_to_guest(uint8_t *dest, SenseId *src)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000762{
763 int i;
764
Thomas Huth729315e2018-09-27 10:23:34 +0200765 dest[0] = src->reserved;
766 stw_be_p(dest + 1, src->cu_type);
767 dest[3] = src->cu_model;
768 stw_be_p(dest + 4, src->dev_type);
769 dest[6] = src->dev_model;
770 dest[7] = src->unused;
771 for (i = 0; i < ARRAY_SIZE(src->ciw); i++) {
772 dest[8 + i * 4] = src->ciw[i].type;
773 dest[9 + i * 4] = src->ciw[i].command;
774 stw_be_p(dest + 10 + i * 4, src->ciw[i].count);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000775 }
776}
777
Cornelia Hucka327c922014-09-05 09:33:17 +0200778static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000779{
Cornelia Hucka327c922014-09-05 09:33:17 +0200780 CCW0 tmp0;
781 CCW1 tmp1;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000782 CCW1 ret;
783
Cornelia Hucka327c922014-09-05 09:33:17 +0200784 if (fmt1) {
785 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
786 ret.cmd_code = tmp1.cmd_code;
787 ret.flags = tmp1.flags;
788 ret.count = be16_to_cpu(tmp1.count);
789 ret.cda = be32_to_cpu(tmp1.cda);
790 } else {
791 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
Dong Jia Shi9f94f842017-02-21 10:09:04 +0100792 if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
793 ret.cmd_code = CCW_CMD_TIC;
794 ret.flags = 0;
795 ret.count = 0;
796 } else {
797 ret.cmd_code = tmp0.cmd_code;
798 ret.flags = tmp0.flags;
799 ret.count = be16_to_cpu(tmp0.count);
Pierre Morelfde82062015-07-15 16:16:20 +0200800 }
Dong Jia Shi9f94f842017-02-21 10:09:04 +0100801 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
Cornelia Hucka327c922014-09-05 09:33:17 +0200802 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000803 return ret;
804}
Halil Pasic57065a72017-09-21 20:08:37 +0200805/**
806 * If out of bounds marks the stream broken. If broken returns -EINVAL,
807 * otherwise the requested length (may be zero)
808 */
809static inline int cds_check_len(CcwDataStream *cds, int len)
810{
811 if (cds->at_byte + len > cds->count) {
812 cds->flags |= CDS_F_STREAM_BROKEN;
813 }
814 return cds->flags & CDS_F_STREAM_BROKEN ? -EINVAL : len;
815}
816
Halil Pasic62a25542017-09-21 20:08:40 +0200817static inline bool cds_ccw_addrs_ok(hwaddr addr, int len, bool ccw_fmt1)
818{
819 return (addr + len) < (ccw_fmt1 ? (1UL << 31) : (1UL << 24));
820}
821
Halil Pasic57065a72017-09-21 20:08:37 +0200822static int ccw_dstream_rw_noflags(CcwDataStream *cds, void *buff, int len,
823 CcwDataStreamOp op)
824{
825 int ret;
826
827 ret = cds_check_len(cds, len);
828 if (ret <= 0) {
829 return ret;
830 }
Halil Pasic62a25542017-09-21 20:08:40 +0200831 if (!cds_ccw_addrs_ok(cds->cda, len, cds->flags & CDS_F_FMT)) {
832 return -EINVAL; /* channel program check */
833 }
Halil Pasic57065a72017-09-21 20:08:37 +0200834 if (op == CDS_OP_A) {
835 goto incr;
836 }
Cornelia Huck85fa94e2019-05-06 19:11:48 +0200837 if (!cds->do_skip) {
838 ret = address_space_rw(&address_space_memory, cds->cda,
839 MEMTXATTRS_UNSPECIFIED, buff, len, op);
840 } else {
841 ret = MEMTX_OK;
842 }
Halil Pasic57065a72017-09-21 20:08:37 +0200843 if (ret != MEMTX_OK) {
844 cds->flags |= CDS_F_STREAM_BROKEN;
845 return -EINVAL;
846 }
847incr:
848 cds->at_byte += len;
849 cds->cda += len;
850 return 0;
851}
852
Halil Pasic93973f82017-09-21 20:08:41 +0200853/* returns values between 1 and bsz, where bsz is a power of 2 */
854static inline uint16_t ida_continuous_left(hwaddr cda, uint64_t bsz)
855{
856 return bsz - (cda & (bsz - 1));
857}
858
859static inline uint64_t ccw_ida_block_size(uint8_t flags)
860{
861 if ((flags & CDS_F_C64) && !(flags & CDS_F_I2K)) {
862 return 1ULL << 12;
863 }
864 return 1ULL << 11;
865}
866
867static inline int ida_read_next_idaw(CcwDataStream *cds)
868{
869 union {uint64_t fmt2; uint32_t fmt1; } idaw;
870 int ret;
871 hwaddr idaw_addr;
872 bool idaw_fmt2 = cds->flags & CDS_F_C64;
873 bool ccw_fmt1 = cds->flags & CDS_F_FMT;
874
875 if (idaw_fmt2) {
876 idaw_addr = cds->cda_orig + sizeof(idaw.fmt2) * cds->at_idaw;
877 if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
878 return -EINVAL; /* channel program check */
879 }
Peter Maydell19f70342020-02-18 11:24:57 +0000880 ret = address_space_read(&address_space_memory, idaw_addr,
881 MEMTXATTRS_UNSPECIFIED, &idaw.fmt2,
882 sizeof(idaw.fmt2));
Halil Pasic93973f82017-09-21 20:08:41 +0200883 cds->cda = be64_to_cpu(idaw.fmt2);
884 } else {
885 idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;
886 if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
887 return -EINVAL; /* channel program check */
888 }
Peter Maydell19f70342020-02-18 11:24:57 +0000889 ret = address_space_read(&address_space_memory, idaw_addr,
890 MEMTXATTRS_UNSPECIFIED, &idaw.fmt1,
891 sizeof(idaw.fmt1));
Halil Pasic93973f82017-09-21 20:08:41 +0200892 cds->cda = be64_to_cpu(idaw.fmt1);
893 if (cds->cda & 0x80000000) {
894 return -EINVAL; /* channel program check */
895 }
896 }
897 ++(cds->at_idaw);
898 if (ret != MEMTX_OK) {
899 /* assume inaccessible address */
900 return -EINVAL; /* channel program check */
901 }
902 return 0;
903}
904
905static int ccw_dstream_rw_ida(CcwDataStream *cds, void *buff, int len,
906 CcwDataStreamOp op)
907{
908 uint64_t bsz = ccw_ida_block_size(cds->flags);
909 int ret = 0;
910 uint16_t cont_left, iter_len;
911
912 ret = cds_check_len(cds, len);
913 if (ret <= 0) {
914 return ret;
915 }
916 if (!cds->at_idaw) {
917 /* read first idaw */
918 ret = ida_read_next_idaw(cds);
919 if (ret) {
920 goto err;
921 }
922 cont_left = ida_continuous_left(cds->cda, bsz);
923 } else {
924 cont_left = ida_continuous_left(cds->cda, bsz);
925 if (cont_left == bsz) {
926 ret = ida_read_next_idaw(cds);
927 if (ret) {
928 goto err;
929 }
930 if (cds->cda & (bsz - 1)) {
931 ret = -EINVAL; /* channel program check */
932 goto err;
933 }
934 }
935 }
936 do {
937 iter_len = MIN(len, cont_left);
938 if (op != CDS_OP_A) {
Cornelia Huck85fa94e2019-05-06 19:11:48 +0200939 if (!cds->do_skip) {
940 ret = address_space_rw(&address_space_memory, cds->cda,
941 MEMTXATTRS_UNSPECIFIED, buff, iter_len,
942 op);
943 } else {
944 ret = MEMTX_OK;
945 }
Halil Pasic93973f82017-09-21 20:08:41 +0200946 if (ret != MEMTX_OK) {
947 /* assume inaccessible address */
948 ret = -EINVAL; /* channel program check */
949 goto err;
950 }
951 }
952 cds->at_byte += iter_len;
953 cds->cda += iter_len;
954 len -= iter_len;
955 if (!len) {
956 break;
957 }
958 ret = ida_read_next_idaw(cds);
959 if (ret) {
960 goto err;
961 }
962 cont_left = bsz;
963 } while (true);
964 return ret;
965err:
966 cds->flags |= CDS_F_STREAM_BROKEN;
967 return ret;
968}
969
Halil Pasic57065a72017-09-21 20:08:37 +0200970void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)
971{
972 /*
973 * We don't support MIDA (an optional facility) yet and we
974 * catch this earlier. Just for expressing the precondition.
975 */
976 g_assert(!(orb->ctrl1 & ORB_CTRL1_MASK_MIDAW));
977 cds->flags = (orb->ctrl0 & ORB_CTRL0_MASK_I2K ? CDS_F_I2K : 0) |
978 (orb->ctrl0 & ORB_CTRL0_MASK_C64 ? CDS_F_C64 : 0) |
Halil Pasic62a25542017-09-21 20:08:40 +0200979 (orb->ctrl0 & ORB_CTRL0_MASK_FMT ? CDS_F_FMT : 0) |
Halil Pasic57065a72017-09-21 20:08:37 +0200980 (ccw->flags & CCW_FLAG_IDA ? CDS_F_IDA : 0);
Halil Pasic62a25542017-09-21 20:08:40 +0200981
Halil Pasic57065a72017-09-21 20:08:37 +0200982 cds->count = ccw->count;
983 cds->cda_orig = ccw->cda;
Cornelia Huck85fa94e2019-05-06 19:11:48 +0200984 /* skip is only effective for read, read backwards, or sense commands */
985 cds->do_skip = (ccw->flags & CCW_FLAG_SKIP) &&
986 ((ccw->cmd_code & 0x0f) == CCW_CMD_BASIC_SENSE ||
987 (ccw->cmd_code & 0x03) == 0x02 /* read */ ||
988 (ccw->cmd_code & 0x0f) == 0x0c /* read backwards */);
Halil Pasic57065a72017-09-21 20:08:37 +0200989 ccw_dstream_rewind(cds);
990 if (!(cds->flags & CDS_F_IDA)) {
991 cds->op_handler = ccw_dstream_rw_noflags;
992 } else {
Halil Pasic93973f82017-09-21 20:08:41 +0200993 cds->op_handler = ccw_dstream_rw_ida;
Halil Pasic57065a72017-09-21 20:08:37 +0200994 }
995}
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000996
Cornelia Huckce350f32016-02-22 16:43:04 +0100997static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
998 bool suspend_allowed)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +0000999{
1000 int ret;
1001 bool check_len;
1002 int len;
1003 CCW1 ccw;
1004
1005 if (!ccw_addr) {
Halil Pasiccc6a9f82017-09-08 17:24:44 +02001006 return -EINVAL; /* channel-program check */
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001007 }
Halil Pasic198c0d12017-07-27 17:48:42 +02001008 /* Check doubleword aligned and 31 or 24 (fmt 0) bit addressable. */
1009 if (ccw_addr & (sch->ccw_fmt_1 ? 0x80000007 : 0xff000007)) {
1010 return -EINVAL;
1011 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001012
Cornelia Hucka327c922014-09-05 09:33:17 +02001013 /* Translate everything to format-1 ccws - the information is the same. */
1014 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001015
1016 /* Check for invalid command codes. */
1017 if ((ccw.cmd_code & 0x0f) == 0) {
1018 return -EINVAL;
1019 }
1020 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
1021 ((ccw.cmd_code & 0xf0) != 0)) {
1022 return -EINVAL;
1023 }
Cornelia Huckfa4463e2015-07-16 10:42:18 +02001024 if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
1025 (ccw.cmd_code != CCW_CMD_TIC)) {
1026 return -EINVAL;
1027 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001028
Cornelia Huck4e19b572017-05-24 14:06:12 +02001029 /* We don't support MIDA. */
1030 if (ccw.flags & CCW_FLAG_MIDA) {
1031 return -EINVAL;
1032 }
1033
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001034 if (ccw.flags & CCW_FLAG_SUSPEND) {
Cornelia Huckce350f32016-02-22 16:43:04 +01001035 return suspend_allowed ? -EINPROGRESS : -EINVAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001036 }
1037
1038 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
1039
Cornelia Hucke8601dd2014-09-05 09:33:18 +02001040 if (!ccw.cda) {
1041 if (sch->ccw_no_data_cnt == 255) {
1042 return -EINVAL;
1043 }
1044 sch->ccw_no_data_cnt++;
1045 }
1046
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001047 /* Look at the command. */
Halil Pasic0a22eac2017-09-21 20:08:38 +02001048 ccw_dstream_init(&sch->cds, &ccw, &(sch->orb));
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001049 switch (ccw.cmd_code) {
1050 case CCW_CMD_NOOP:
1051 /* Nothing to do. */
1052 ret = 0;
1053 break;
1054 case CCW_CMD_BASIC_SENSE:
1055 if (check_len) {
1056 if (ccw.count != sizeof(sch->sense_data)) {
1057 ret = -EINVAL;
1058 break;
1059 }
1060 }
1061 len = MIN(ccw.count, sizeof(sch->sense_data));
Pierre Moreld895d252021-04-08 18:32:09 +02001062 ret = ccw_dstream_write_buf(&sch->cds, sch->sense_data, len);
Halil Pasic0a22eac2017-09-21 20:08:38 +02001063 sch->curr_status.scsw.count = ccw_dstream_residual_count(&sch->cds);
Pierre Moreld895d252021-04-08 18:32:09 +02001064 if (!ret) {
1065 memset(sch->sense_data, 0, sizeof(sch->sense_data));
1066 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001067 break;
1068 case CCW_CMD_SENSE_ID:
1069 {
Thomas Huth729315e2018-09-27 10:23:34 +02001070 /* According to SA22-7204-01, Sense-ID can store up to 256 bytes */
1071 uint8_t sense_id[256];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001072
Thomas Huth729315e2018-09-27 10:23:34 +02001073 copy_sense_id_to_guest(sense_id, &sch->id);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001074 /* Sense ID information is device specific. */
1075 if (check_len) {
1076 if (ccw.count != sizeof(sense_id)) {
1077 ret = -EINVAL;
1078 break;
1079 }
1080 }
1081 len = MIN(ccw.count, sizeof(sense_id));
1082 /*
1083 * Only indicate 0xff in the first sense byte if we actually
1084 * have enough place to store at least bytes 0-3.
1085 */
1086 if (len >= 4) {
Thomas Huth729315e2018-09-27 10:23:34 +02001087 sense_id[0] = 0xff;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001088 } else {
Thomas Huth729315e2018-09-27 10:23:34 +02001089 sense_id[0] = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001090 }
Pierre Moreld895d252021-04-08 18:32:09 +02001091 ret = ccw_dstream_write_buf(&sch->cds, sense_id, len);
1092 if (!ret) {
1093 sch->curr_status.scsw.count = ccw_dstream_residual_count(&sch->cds);
1094 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001095 break;
1096 }
1097 case CCW_CMD_TIC:
1098 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
1099 ret = -EINVAL;
1100 break;
1101 }
Halil Pasic4add0da2017-07-26 00:44:42 +02001102 if (ccw.flags || ccw.count) {
1103 /* We have already sanitized these if converted from fmt 0. */
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001104 ret = -EINVAL;
1105 break;
1106 }
1107 sch->channel_prog = ccw.cda;
1108 ret = -EAGAIN;
1109 break;
1110 default:
1111 if (sch->ccw_cb) {
1112 /* Handle device specific commands. */
1113 ret = sch->ccw_cb(sch, ccw);
1114 } else {
Cornelia Huck8d034a62013-01-28 17:01:30 +01001115 ret = -ENOSYS;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001116 }
1117 break;
1118 }
1119 sch->last_cmd = ccw;
1120 sch->last_cmd_valid = true;
1121 if (ret == 0) {
1122 if (ccw.flags & CCW_FLAG_CC) {
1123 sch->channel_prog += 8;
1124 ret = -EAGAIN;
1125 }
1126 }
1127
1128 return ret;
1129}
1130
Halil Pasicb5f5a3a2017-07-11 16:54:41 +02001131static void sch_handle_start_func_virtual(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001132{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001133 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001134 int path;
1135 int ret;
Cornelia Huckce350f32016-02-22 16:43:04 +01001136 bool suspend_allowed;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001137
1138 /* Path management: In our simple css, we always choose the only path. */
1139 path = 0x80;
1140
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001141 if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
Sascha Silbe727a0422016-07-12 14:08:08 +02001142 /* Start Function triggered via ssch, i.e. we have an ORB */
Halil Pasicb5f5a3a2017-07-11 16:54:41 +02001143 ORB *orb = &sch->orb;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001144 schib->scsw.cstat = 0;
1145 schib->scsw.dstat = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001146 /* Look at the orb and try to execute the channel program. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001147 schib->pmcw.intparm = orb->intparm;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001148 if (!(orb->lpm & path)) {
1149 /* Generate a deferred cc 3 condition. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001150 schib->scsw.flags |= SCSW_FLAGS_MASK_CC;
1151 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1152 schib->scsw.ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001153 return;
1154 }
Cornelia Hucka327c922014-09-05 09:33:17 +02001155 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001156 schib->scsw.flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
Cornelia Hucke8601dd2014-09-05 09:33:18 +02001157 sch->ccw_no_data_cnt = 0;
Cornelia Huckce350f32016-02-22 16:43:04 +01001158 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001159 } else {
Halil Pasicb5f5a3a2017-07-11 16:54:41 +02001160 /* Start Function resumed via rsch */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001161 schib->scsw.ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
Cornelia Huckce350f32016-02-22 16:43:04 +01001162 /* The channel program had been suspended before. */
1163 suspend_allowed = true;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001164 }
1165 sch->last_cmd_valid = false;
1166 do {
Cornelia Huckce350f32016-02-22 16:43:04 +01001167 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001168 switch (ret) {
1169 case -EAGAIN:
1170 /* ccw chain, continue processing */
1171 break;
1172 case 0:
1173 /* success */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001174 schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1175 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1176 schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001177 SCSW_STCTL_STATUS_PEND;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001178 schib->scsw.dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
1179 schib->scsw.cpa = sch->channel_prog + 8;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001180 break;
Jing Liu2dc95b42016-04-01 08:32:58 +02001181 case -EIO:
1182 /* I/O errors, status depends on specific devices */
1183 break;
Cornelia Huck8d034a62013-01-28 17:01:30 +01001184 case -ENOSYS:
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001185 /* unsupported command, generate unit check (command reject) */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001186 schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1187 schib->scsw.dstat = SCSW_DSTAT_UNIT_CHECK;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001188 /* Set sense bit 0 in ecw0. */
1189 sch->sense_data[0] = 0x80;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001190 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1191 schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001192 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001193 schib->scsw.cpa = sch->channel_prog + 8;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001194 break;
Cornelia Huck8d034a62013-01-28 17:01:30 +01001195 case -EINPROGRESS:
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001196 /* channel program has been suspended */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001197 schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1198 schib->scsw.ctrl |= SCSW_ACTL_SUSP;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001199 break;
1200 default:
1201 /* error, generate channel program check */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001202 schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND;
1203 schib->scsw.cstat = SCSW_CSTAT_PROG_CHECK;
1204 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
1205 schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001206 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001207 schib->scsw.cpa = sch->channel_prog + 8;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001208 break;
1209 }
1210 } while (ret == -EAGAIN);
1211
1212}
1213
Cornelia Huck759a5d32021-07-05 18:39:51 +02001214static IOInstEnding sch_handle_halt_func_passthrough(SubchDev *sch)
Cornelia Huck8fadea22019-05-07 17:47:33 +02001215{
1216 int ret;
1217
1218 ret = s390_ccw_halt(sch);
1219 if (ret == -ENOSYS) {
1220 sch_handle_halt_func(sch);
Cornelia Huck759a5d32021-07-05 18:39:51 +02001221 return IOINST_CC_EXPECTED;
1222 }
1223 /*
1224 * Some conditions may have been detected prior to starting the halt
1225 * function; map them to the correct cc.
1226 * Note that we map both -ENODEV and -EACCES to cc 3 (there's not really
1227 * anything else we can do.)
1228 */
1229 switch (ret) {
1230 case -EBUSY:
1231 return IOINST_CC_BUSY;
1232 case -ENODEV:
1233 case -EACCES:
1234 return IOINST_CC_NOT_OPERATIONAL;
1235 default:
1236 return IOINST_CC_EXPECTED;
Cornelia Huck8fadea22019-05-07 17:47:33 +02001237 }
1238}
1239
Cornelia Huck759a5d32021-07-05 18:39:51 +02001240static IOInstEnding sch_handle_clear_func_passthrough(SubchDev *sch)
Cornelia Huck8fadea22019-05-07 17:47:33 +02001241{
1242 int ret;
1243
1244 ret = s390_ccw_clear(sch);
1245 if (ret == -ENOSYS) {
1246 sch_handle_clear_func(sch);
Cornelia Huck759a5d32021-07-05 18:39:51 +02001247 return IOINST_CC_EXPECTED;
1248 }
1249 /*
1250 * Some conditions may have been detected prior to starting the clear
1251 * function; map them to the correct cc.
1252 * Note that we map both -ENODEV and -EACCES to cc 3 (there's not really
1253 * anything else we can do.)
1254 */
1255 switch (ret) {
1256 case -ENODEV:
1257 case -EACCES:
1258 return IOINST_CC_NOT_OPERATIONAL;
1259 default:
1260 return IOINST_CC_EXPECTED;
Cornelia Huck8fadea22019-05-07 17:47:33 +02001261 }
1262}
1263
Halil Pasic66dc50f2017-10-17 16:04:49 +02001264static IOInstEnding sch_handle_start_func_passthrough(SubchDev *sch)
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001265{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001266 SCHIB *schib = &sch->curr_status;
Halil Pasicb5f5a3a2017-07-11 16:54:41 +02001267 ORB *orb = &sch->orb;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001268 if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) {
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001269 assert(orb != NULL);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001270 schib->pmcw.intparm = orb->intparm;
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001271 }
Halil Pasic66dc50f2017-10-17 16:04:49 +02001272 return s390_ccw_cmd_request(sch);
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001273}
1274
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001275/*
1276 * On real machines, this would run asynchronously to the main vcpus.
1277 * We might want to make some parts of the ssch handling (interpreting
1278 * read/writes) asynchronous later on if we start supporting more than
1279 * our current very simple devices.
1280 */
Halil Pasic66dc50f2017-10-17 16:04:49 +02001281IOInstEnding do_subchannel_work_virtual(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001282{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001283 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001284
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001285 if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001286 sch_handle_clear_func(sch);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001287 } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001288 sch_handle_halt_func(sch);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001289 } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) {
Sascha Silbe727a0422016-07-12 14:08:08 +02001290 /* Triggered by both ssch and rsch. */
Halil Pasicb5f5a3a2017-07-11 16:54:41 +02001291 sch_handle_start_func_virtual(sch);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001292 }
1293 css_inject_io_interrupt(sch);
Halil Pasic66dc50f2017-10-17 16:04:49 +02001294 /* inst must succeed if this func is called */
1295 return IOINST_CC_EXPECTED;
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001296}
1297
Halil Pasic66dc50f2017-10-17 16:04:49 +02001298IOInstEnding do_subchannel_work_passthrough(SubchDev *sch)
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001299{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001300 SCHIB *schib = &sch->curr_status;
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001301
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001302 if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) {
Cornelia Huck759a5d32021-07-05 18:39:51 +02001303 return sch_handle_clear_func_passthrough(sch);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001304 } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) {
Cornelia Huck759a5d32021-07-05 18:39:51 +02001305 return sch_handle_halt_func_passthrough(sch);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001306 } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001307 return sch_handle_start_func_passthrough(sch);
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001308 }
Halil Pasic66dc50f2017-10-17 16:04:49 +02001309 return IOINST_CC_EXPECTED;
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001310}
1311
Halil Pasic66dc50f2017-10-17 16:04:49 +02001312static IOInstEnding do_subchannel_work(SubchDev *sch)
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001313{
Halil Pasic9ea63c02017-10-04 17:41:37 +02001314 if (!sch->do_subchannel_work) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001315 return IOINST_CC_STATUS_PRESENT;
Xiao Feng Renbab482d2017-05-17 02:48:11 +02001316 }
Halil Pasic9ea63c02017-10-04 17:41:37 +02001317 g_assert(sch->curr_status.scsw.ctrl & SCSW_CTRL_MASK_FCTL);
1318 return sch->do_subchannel_work(sch);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001319}
1320
1321static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
1322{
1323 int i;
1324
1325 dest->intparm = cpu_to_be32(src->intparm);
1326 dest->flags = cpu_to_be16(src->flags);
1327 dest->devno = cpu_to_be16(src->devno);
1328 dest->lpm = src->lpm;
1329 dest->pnom = src->pnom;
1330 dest->lpum = src->lpum;
1331 dest->pim = src->pim;
1332 dest->mbi = cpu_to_be16(src->mbi);
1333 dest->pom = src->pom;
1334 dest->pam = src->pam;
1335 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1336 dest->chpid[i] = src->chpid[i];
1337 }
1338 dest->chars = cpu_to_be32(src->chars);
1339}
1340
Xiao Feng Ren8ca2b372017-05-17 02:48:10 +02001341void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001342{
1343 dest->flags = cpu_to_be16(src->flags);
1344 dest->ctrl = cpu_to_be16(src->ctrl);
1345 dest->cpa = cpu_to_be32(src->cpa);
1346 dest->dstat = src->dstat;
1347 dest->cstat = src->cstat;
1348 dest->count = cpu_to_be16(src->count);
1349}
1350
1351static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
1352{
1353 int i;
Peter Maydell55281a22018-12-13 12:02:52 +00001354 /*
1355 * We copy the PMCW and SCSW in and out of local variables to
1356 * avoid taking the address of members of a packed struct.
1357 */
1358 PMCW src_pmcw, dest_pmcw;
1359 SCSW src_scsw, dest_scsw;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001360
Peter Maydell55281a22018-12-13 12:02:52 +00001361 src_pmcw = src->pmcw;
1362 copy_pmcw_to_guest(&dest_pmcw, &src_pmcw);
1363 dest->pmcw = dest_pmcw;
1364 src_scsw = src->scsw;
1365 copy_scsw_to_guest(&dest_scsw, &src_scsw);
1366 dest->scsw = dest_scsw;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001367 dest->mba = cpu_to_be64(src->mba);
1368 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1369 dest->mda[i] = src->mda[i];
1370 }
1371}
1372
Eric Farmanc6267102021-06-18 01:25:37 +02001373void copy_esw_to_guest(ESW *dest, const ESW *src)
Eric Farman3fdc6222021-06-18 01:25:34 +02001374{
1375 dest->word0 = cpu_to_be32(src->word0);
1376 dest->erw = cpu_to_be32(src->erw);
1377 dest->word2 = cpu_to_be64(src->word2);
1378 dest->word4 = cpu_to_be32(src->word4);
1379}
1380
Farhan Ali46ea3842020-05-05 14:57:54 +02001381IOInstEnding css_do_stsch(SubchDev *sch, SCHIB *schib)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001382{
Farhan Ali46ea3842020-05-05 14:57:54 +02001383 int ret;
1384
1385 /*
1386 * For some subchannels, we may want to update parts of
1387 * the schib (e.g., update path masks from the host device
1388 * for passthrough subchannels).
1389 */
1390 ret = s390_ccw_store(sch);
1391
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001392 /* Use current status. */
1393 copy_schib_to_guest(schib, &sch->curr_status);
Farhan Ali46ea3842020-05-05 14:57:54 +02001394 return ret;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001395}
1396
1397static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
1398{
1399 int i;
1400
1401 dest->intparm = be32_to_cpu(src->intparm);
1402 dest->flags = be16_to_cpu(src->flags);
1403 dest->devno = be16_to_cpu(src->devno);
1404 dest->lpm = src->lpm;
1405 dest->pnom = src->pnom;
1406 dest->lpum = src->lpum;
1407 dest->pim = src->pim;
1408 dest->mbi = be16_to_cpu(src->mbi);
1409 dest->pom = src->pom;
1410 dest->pam = src->pam;
1411 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
1412 dest->chpid[i] = src->chpid[i];
1413 }
1414 dest->chars = be32_to_cpu(src->chars);
1415}
1416
1417static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
1418{
1419 dest->flags = be16_to_cpu(src->flags);
1420 dest->ctrl = be16_to_cpu(src->ctrl);
1421 dest->cpa = be32_to_cpu(src->cpa);
1422 dest->dstat = src->dstat;
1423 dest->cstat = src->cstat;
1424 dest->count = be16_to_cpu(src->count);
1425}
1426
1427static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
1428{
1429 int i;
Peter Maydell55281a22018-12-13 12:02:52 +00001430 /*
1431 * We copy the PMCW and SCSW in and out of local variables to
1432 * avoid taking the address of members of a packed struct.
1433 */
1434 PMCW src_pmcw, dest_pmcw;
1435 SCSW src_scsw, dest_scsw;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001436
Peter Maydell55281a22018-12-13 12:02:52 +00001437 src_pmcw = src->pmcw;
1438 copy_pmcw_from_guest(&dest_pmcw, &src_pmcw);
1439 dest->pmcw = dest_pmcw;
1440 src_scsw = src->scsw;
1441 copy_scsw_from_guest(&dest_scsw, &src_scsw);
1442 dest->scsw = dest_scsw;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001443 dest->mba = be64_to_cpu(src->mba);
1444 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
1445 dest->mda[i] = src->mda[i];
1446 }
1447}
1448
Halil Pasic6bb6f192017-10-17 16:04:53 +02001449IOInstEnding css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001450{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001451 SCHIB *schib = &sch->curr_status;
Thomas Huth62ac4a52014-12-11 14:25:11 +01001452 uint16_t oldflags;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001453 SCHIB schib_copy;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001454
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001455 if (!(schib->pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
Halil Pasic6bb6f192017-10-17 16:04:53 +02001456 return IOINST_CC_EXPECTED;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001457 }
1458
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001459 if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
Halil Pasic6bb6f192017-10-17 16:04:53 +02001460 return IOINST_CC_STATUS_PRESENT;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001461 }
1462
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001463 if (schib->scsw.ctrl &
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001464 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
Halil Pasic6bb6f192017-10-17 16:04:53 +02001465 return IOINST_CC_BUSY;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001466 }
1467
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001468 copy_schib_from_guest(&schib_copy, orig_schib);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001469 /* Only update the program-modifiable fields. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001470 schib->pmcw.intparm = schib_copy.pmcw.intparm;
1471 oldflags = schib->pmcw.flags;
1472 schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001473 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1474 PMCW_FLAGS_MASK_MP);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001475 schib->pmcw.flags |= schib_copy.pmcw.flags &
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001476 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1477 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1478 PMCW_FLAGS_MASK_MP);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001479 schib->pmcw.lpm = schib_copy.pmcw.lpm;
1480 schib->pmcw.mbi = schib_copy.pmcw.mbi;
1481 schib->pmcw.pom = schib_copy.pmcw.pom;
1482 schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
1483 schib->pmcw.chars |= schib_copy.pmcw.chars &
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001484 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001485 schib->mba = schib_copy.mba;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001486
Thomas Huth62ac4a52014-12-11 14:25:11 +01001487 /* Has the channel been disabled? */
1488 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001489 && (schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) == 0) {
Thomas Huth62ac4a52014-12-11 14:25:11 +01001490 sch->disable_cb(sch);
1491 }
Halil Pasic6bb6f192017-10-17 16:04:53 +02001492 return IOINST_CC_EXPECTED;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001493}
1494
Halil Pasic96376402017-10-17 16:04:50 +02001495IOInstEnding css_do_xsch(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001496{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001497 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001498
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001499 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Halil Pasic96376402017-10-17 16:04:50 +02001500 return IOINST_CC_NOT_OPERATIONAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001501 }
1502
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001503 if (schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) {
Halil Pasic96376402017-10-17 16:04:50 +02001504 return IOINST_CC_STATUS_PRESENT;
Halil Pasic6c864622017-08-31 14:18:28 +02001505 }
1506
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001507 if (!(schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) ||
1508 ((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1509 (!(schib->scsw.ctrl &
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001510 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001511 (schib->scsw.ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
Halil Pasic96376402017-10-17 16:04:50 +02001512 return IOINST_CC_BUSY;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001513 }
1514
1515 /* Cancel the current operation. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001516 schib->scsw.ctrl &= ~(SCSW_FCTL_START_FUNC |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001517 SCSW_ACTL_RESUME_PEND |
1518 SCSW_ACTL_START_PEND |
1519 SCSW_ACTL_SUSP);
1520 sch->channel_prog = 0x0;
1521 sch->last_cmd_valid = false;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001522 schib->scsw.dstat = 0;
1523 schib->scsw.cstat = 0;
Halil Pasic96376402017-10-17 16:04:50 +02001524 return IOINST_CC_EXPECTED;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001525}
1526
Halil Pasic77331442017-10-17 16:04:51 +02001527IOInstEnding css_do_csch(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001528{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001529 SCHIB *schib = &sch->curr_status;
Peter Jinf53b0332022-10-27 23:23:41 +02001530 uint16_t old_scsw_ctrl;
1531 IOInstEnding ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001532
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001533 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Halil Pasic77331442017-10-17 16:04:51 +02001534 return IOINST_CC_NOT_OPERATIONAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001535 }
1536
Peter Jinf53b0332022-10-27 23:23:41 +02001537 /*
1538 * Save the current scsw.ctrl in case CSCH fails and we need
1539 * to revert the scsw to the status quo ante.
1540 */
1541 old_scsw_ctrl = schib->scsw.ctrl;
1542
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001543 /* Trigger the clear function. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001544 schib->scsw.ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
1545 schib->scsw.ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001546
Peter Jinf53b0332022-10-27 23:23:41 +02001547 ccode = do_subchannel_work(sch);
1548
1549 if (ccode != IOINST_CC_EXPECTED) {
1550 schib->scsw.ctrl = old_scsw_ctrl;
1551 }
1552
1553 return ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001554}
1555
Halil Pasicae9f1be2017-10-17 16:04:52 +02001556IOInstEnding css_do_hsch(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001557{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001558 SCHIB *schib = &sch->curr_status;
Peter Jinf53b0332022-10-27 23:23:41 +02001559 uint16_t old_scsw_ctrl;
1560 IOInstEnding ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001561
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001562 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Halil Pasicae9f1be2017-10-17 16:04:52 +02001563 return IOINST_CC_NOT_OPERATIONAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001564 }
1565
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001566 if (((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
1567 (schib->scsw.ctrl & (SCSW_STCTL_PRIMARY |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001568 SCSW_STCTL_SECONDARY |
1569 SCSW_STCTL_ALERT))) {
Halil Pasicae9f1be2017-10-17 16:04:52 +02001570 return IOINST_CC_STATUS_PRESENT;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001571 }
1572
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001573 if (schib->scsw.ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
Halil Pasicae9f1be2017-10-17 16:04:52 +02001574 return IOINST_CC_BUSY;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001575 }
1576
Peter Jinf53b0332022-10-27 23:23:41 +02001577 /*
1578 * Save the current scsw.ctrl in case HSCH fails and we need
1579 * to revert the scsw to the status quo ante.
1580 */
1581 old_scsw_ctrl = schib->scsw.ctrl;
1582
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001583 /* Trigger the halt function. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001584 schib->scsw.ctrl |= SCSW_FCTL_HALT_FUNC;
1585 schib->scsw.ctrl &= ~SCSW_FCTL_START_FUNC;
1586 if (((schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL) ==
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001587 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001588 ((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) ==
1589 SCSW_STCTL_INTERMEDIATE)) {
1590 schib->scsw.ctrl &= ~SCSW_STCTL_STATUS_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001591 }
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001592 schib->scsw.ctrl |= SCSW_ACTL_HALT_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001593
Peter Jinf53b0332022-10-27 23:23:41 +02001594 ccode = do_subchannel_work(sch);
1595
1596 if (ccode != IOINST_CC_EXPECTED) {
1597 schib->scsw.ctrl = old_scsw_ctrl;
1598 }
1599
1600 return ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001601}
1602
1603static void css_update_chnmon(SubchDev *sch)
1604{
1605 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
1606 /* Not active. */
1607 return;
1608 }
1609 /* The counter is conveniently located at the beginning of the struct. */
1610 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
1611 /* Format 1, per-subchannel area. */
1612 uint32_t count;
1613
Peter Maydell42874d32015-04-26 16:49:24 +01001614 count = address_space_ldl(&address_space_memory,
1615 sch->curr_status.mba,
1616 MEMTXATTRS_UNSPECIFIED,
1617 NULL);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001618 count++;
Peter Maydell42874d32015-04-26 16:49:24 +01001619 address_space_stl(&address_space_memory, sch->curr_status.mba, count,
1620 MEMTXATTRS_UNSPECIFIED, NULL);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001621 } else {
1622 /* Format 0, global area. */
1623 uint32_t offset;
1624 uint16_t count;
1625
1626 offset = sch->curr_status.pmcw.mbi << 5;
Peter Maydell42874d32015-04-26 16:49:24 +01001627 count = address_space_lduw(&address_space_memory,
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001628 channel_subsys.chnmon_area + offset,
Peter Maydell42874d32015-04-26 16:49:24 +01001629 MEMTXATTRS_UNSPECIFIED,
1630 NULL);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001631 count++;
Peter Maydell42874d32015-04-26 16:49:24 +01001632 address_space_stw(&address_space_memory,
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001633 channel_subsys.chnmon_area + offset, count,
Peter Maydell42874d32015-04-26 16:49:24 +01001634 MEMTXATTRS_UNSPECIFIED, NULL);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001635 }
1636}
1637
Halil Pasic66dc50f2017-10-17 16:04:49 +02001638IOInstEnding css_do_ssch(SubchDev *sch, ORB *orb)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001639{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001640 SCHIB *schib = &sch->curr_status;
Peter Jinf53b0332022-10-27 23:23:41 +02001641 uint16_t old_scsw_ctrl, old_scsw_flags;
1642 IOInstEnding ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001643
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001644 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001645 return IOINST_CC_NOT_OPERATIONAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001646 }
1647
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001648 if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001649 return IOINST_CC_STATUS_PRESENT;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001650 }
1651
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001652 if (schib->scsw.ctrl & (SCSW_FCTL_START_FUNC |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001653 SCSW_FCTL_HALT_FUNC |
1654 SCSW_FCTL_CLEAR_FUNC)) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001655 return IOINST_CC_BUSY;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001656 }
1657
1658 /* If monitoring is active, update counter. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001659 if (channel_subsys.chnmon_active) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001660 css_update_chnmon(sch);
1661 }
Halil Pasicff443fe2017-07-11 16:54:39 +02001662 sch->orb = *orb;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001663 sch->channel_prog = orb->cpa;
Peter Jinf53b0332022-10-27 23:23:41 +02001664
1665 /*
1666 * Save the current scsw.ctrl and scsw.flags in case SSCH fails and we need
1667 * to revert the scsw to the status quo ante.
1668 */
1669 old_scsw_ctrl = schib->scsw.ctrl;
1670 old_scsw_flags = schib->scsw.flags;
1671
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001672 /* Trigger the start function. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001673 schib->scsw.ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
1674 schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001675
Peter Jinf53b0332022-10-27 23:23:41 +02001676 ccode = do_subchannel_work(sch);
1677
1678 if (ccode != IOINST_CC_EXPECTED) {
1679 schib->scsw.ctrl = old_scsw_ctrl;
1680 schib->scsw.flags = old_scsw_flags;
1681 }
1682
1683 return ccode;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001684}
1685
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001686static void copy_irb_to_guest(IRB *dest, const IRB *src, const PMCW *pmcw,
Thomas Huthb7b63482015-02-12 18:09:37 +01001687 int *irb_len)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001688{
1689 int i;
Cornelia Huckf068d322014-05-27 12:40:44 +02001690 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1691 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001692
1693 copy_scsw_to_guest(&dest->scsw, &src->scsw);
1694
Eric Farman3fdc6222021-06-18 01:25:34 +02001695 copy_esw_to_guest(&dest->esw, &src->esw);
1696
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001697 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
1698 dest->ecw[i] = cpu_to_be32(src->ecw[i]);
1699 }
Thomas Huthb7b63482015-02-12 18:09:37 +01001700 *irb_len = sizeof(*dest) - sizeof(dest->emw);
1701
Cornelia Huckf068d322014-05-27 12:40:44 +02001702 /* extended measurements enabled? */
1703 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
1704 !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
1705 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
1706 return;
1707 }
1708 /* extended measurements pending? */
1709 if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
1710 return;
1711 }
1712 if ((stctl & SCSW_STCTL_PRIMARY) ||
1713 (stctl == SCSW_STCTL_SECONDARY) ||
1714 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
1715 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
1716 dest->emw[i] = cpu_to_be32(src->emw[i]);
1717 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001718 }
Thomas Huthb7b63482015-02-12 18:09:37 +01001719 *irb_len = sizeof(*dest);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001720}
1721
Eric Farman1b01ded2021-06-18 01:25:35 +02001722static void build_irb_sense_data(SubchDev *sch, IRB *irb)
1723{
1724 int i;
1725
1726 /* Attention: sense_data is already BE! */
1727 memcpy(irb->ecw, sch->sense_data, sizeof(sch->sense_data));
1728 for (i = 0; i < ARRAY_SIZE(irb->ecw); i++) {
1729 irb->ecw[i] = be32_to_cpu(irb->ecw[i]);
1730 }
1731}
1732
Eric Farmanc6267102021-06-18 01:25:37 +02001733void build_irb_passthrough(SubchDev *sch, IRB *irb)
1734{
1735 /* Copy ESW from hardware */
1736 irb->esw = sch->esw;
1737
1738 /*
1739 * If (irb->esw.erw & ESW_ERW_SENSE) is true, then the contents
1740 * of the ECW is sense data. If false, then it is model-dependent
1741 * information. Either way, copy it into the IRB for the guest to
1742 * read/decide what to do with.
1743 */
1744 build_irb_sense_data(sch, irb);
1745}
1746
Eric Farman0599a042021-06-18 01:25:36 +02001747void build_irb_virtual(SubchDev *sch, IRB *irb)
1748{
1749 SCHIB *schib = &sch->curr_status;
1750 uint16_t stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1751
1752 if (stctl & SCSW_STCTL_STATUS_PEND) {
1753 if (schib->scsw.cstat & (SCSW_CSTAT_DATA_CHECK |
1754 SCSW_CSTAT_CHN_CTRL_CHK |
1755 SCSW_CSTAT_INTF_CTRL_CHK)) {
1756 irb->scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1757 irb->esw.word0 = 0x04804000;
1758 } else {
1759 irb->esw.word0 = 0x00800000;
1760 }
1761 /* If a unit check is pending, copy sense data. */
1762 if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) &&
1763 (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) {
1764 irb->scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1765 build_irb_sense_data(sch, irb);
1766 irb->esw.erw = ESW_ERW_SENSE | (sizeof(sch->sense_data) << 8);
1767 }
1768 }
1769}
1770
Thomas Huthb7b63482015-02-12 18:09:37 +01001771int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001772{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001773 SCHIB *schib = &sch->curr_status;
1774 PMCW p;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001775 uint16_t stctl;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001776 IRB irb;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001777
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001778 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Thomas Huthb7b63482015-02-12 18:09:37 +01001779 return 3;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001780 }
1781
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001782 stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001783
1784 /* Prepare the irb for the guest. */
1785 memset(&irb, 0, sizeof(IRB));
1786
1787 /* Copy scsw from current status. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001788 irb.scsw = schib->scsw;
Eric Farman0599a042021-06-18 01:25:36 +02001789
1790 /* Build other IRB data, if necessary */
1791 if (sch->irb_cb) {
1792 sch->irb_cb(sch, &irb);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001793 }
Eric Farman0599a042021-06-18 01:25:36 +02001794
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001795 /* Store the irb to the guest. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001796 p = schib->pmcw;
1797 copy_irb_to_guest(target_irb, &irb, &p, irb_len);
Thomas Huthb7b63482015-02-12 18:09:37 +01001798
1799 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1800}
1801
1802void css_do_tsch_update_subch(SubchDev *sch)
1803{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001804 SCHIB *schib = &sch->curr_status;
Thomas Huthb7b63482015-02-12 18:09:37 +01001805 uint16_t stctl;
1806 uint16_t fctl;
1807 uint16_t actl;
1808
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001809 stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
1810 fctl = schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL;
1811 actl = schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001812
1813 /* Clear conditions on subchannel, if applicable. */
1814 if (stctl & SCSW_STCTL_STATUS_PEND) {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001815 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001816 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1817 ((fctl & SCSW_FCTL_HALT_FUNC) &&
1818 (actl & SCSW_ACTL_SUSP))) {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001819 schib->scsw.ctrl &= ~SCSW_CTRL_MASK_FCTL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001820 }
1821 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001822 schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
1823 schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001824 SCSW_ACTL_START_PEND |
1825 SCSW_ACTL_HALT_PEND |
1826 SCSW_ACTL_CLEAR_PEND |
1827 SCSW_ACTL_SUSP);
1828 } else {
1829 if ((actl & SCSW_ACTL_SUSP) &&
1830 (fctl & SCSW_FCTL_START_FUNC)) {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001831 schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001832 if (fctl & SCSW_FCTL_HALT_FUNC) {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001833 schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001834 SCSW_ACTL_START_PEND |
1835 SCSW_ACTL_HALT_PEND |
1836 SCSW_ACTL_CLEAR_PEND |
1837 SCSW_ACTL_SUSP);
1838 } else {
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001839 schib->scsw.ctrl &= ~SCSW_ACTL_RESUME_PEND;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001840 }
1841 }
1842 }
1843 /* Clear pending sense data. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001844 if (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001845 memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1846 }
1847 }
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001848}
1849
1850static void copy_crw_to_guest(CRW *dest, const CRW *src)
1851{
1852 dest->flags = cpu_to_be16(src->flags);
1853 dest->rsid = cpu_to_be16(src->rsid);
1854}
1855
1856int css_do_stcrw(CRW *crw)
1857{
1858 CrwContainer *crw_cont;
1859 int ret;
1860
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001861 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001862 if (crw_cont) {
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001863 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001864 copy_crw_to_guest(crw, &crw_cont->crw);
1865 g_free(crw_cont);
1866 ret = 0;
1867 } else {
1868 /* List was empty, turn crw machine checks on again. */
1869 memset(crw, 0, sizeof(*crw));
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001870 channel_subsys.do_crw_mchk = true;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001871 ret = 1;
1872 }
1873
1874 return ret;
1875}
1876
Thomas Huth7f74f0a2015-02-12 18:09:38 +01001877static void copy_crw_from_guest(CRW *dest, const CRW *src)
1878{
1879 dest->flags = be16_to_cpu(src->flags);
1880 dest->rsid = be16_to_cpu(src->rsid);
1881}
1882
1883void css_undo_stcrw(CRW *crw)
1884{
1885 CrwContainer *crw_cont;
1886
Marc-André Lureau96f64aa2017-10-06 20:49:21 -03001887 crw_cont = g_try_new0(CrwContainer, 1);
Thomas Huth7f74f0a2015-02-12 18:09:38 +01001888 if (!crw_cont) {
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001889 channel_subsys.crws_lost = true;
Thomas Huth7f74f0a2015-02-12 18:09:38 +01001890 return;
1891 }
1892 copy_crw_from_guest(&crw_cont->crw, crw);
1893
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001894 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
Thomas Huth7f74f0a2015-02-12 18:09:38 +01001895}
1896
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001897int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1898 int rfmt, void *buf)
1899{
1900 int i, desc_size;
1901 uint32_t words[8];
1902 uint32_t chpid_type_word;
1903 CssImage *css;
1904
1905 if (!m && !cssid) {
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001906 css = channel_subsys.css[channel_subsys.default_cssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001907 } else {
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001908 css = channel_subsys.css[cssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001909 }
1910 if (!css) {
1911 return 0;
1912 }
1913 desc_size = 0;
1914 for (i = f_chpid; i <= l_chpid; i++) {
1915 if (css->chpids[i].in_use) {
1916 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1917 if (rfmt == 0) {
1918 words[0] = cpu_to_be32(chpid_type_word);
1919 words[1] = 0;
1920 memcpy(buf + desc_size, words, 8);
1921 desc_size += 8;
1922 } else if (rfmt == 1) {
1923 words[0] = cpu_to_be32(chpid_type_word);
1924 words[1] = 0;
1925 words[2] = 0;
1926 words[3] = 0;
1927 words[4] = 0;
1928 words[5] = 0;
1929 words[6] = 0;
1930 words[7] = 0;
1931 memcpy(buf + desc_size, words, 32);
1932 desc_size += 32;
1933 }
1934 }
1935 }
1936 return desc_size;
1937}
1938
1939void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1940{
1941 /* dct is currently ignored (not really meaningful for our devices) */
1942 /* TODO: Don't ignore mbk. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001943 if (update && !channel_subsys.chnmon_active) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001944 /* Enable measuring. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001945 channel_subsys.chnmon_area = mbo;
1946 channel_subsys.chnmon_active = true;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001947 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001948 if (!update && channel_subsys.chnmon_active) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001949 /* Disable measuring. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001950 channel_subsys.chnmon_area = 0;
1951 channel_subsys.chnmon_active = false;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001952 }
1953}
1954
Halil Pasic66dc50f2017-10-17 16:04:49 +02001955IOInstEnding css_do_rsch(SubchDev *sch)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001956{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001957 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001958
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001959 if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001960 return IOINST_CC_NOT_OPERATIONAL;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001961 }
1962
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001963 if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001964 return IOINST_CC_STATUS_PRESENT;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001965 }
1966
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001967 if (((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1968 (schib->scsw.ctrl & SCSW_ACTL_RESUME_PEND) ||
1969 (!(schib->scsw.ctrl & SCSW_ACTL_SUSP))) {
Halil Pasic66dc50f2017-10-17 16:04:49 +02001970 return IOINST_CC_BUSY;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001971 }
1972
1973 /* If monitoring is active, update counter. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001974 if (channel_subsys.chnmon_active) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001975 css_update_chnmon(sch);
1976 }
1977
Daniel P. Berrangébea02792019-03-29 11:11:02 +00001978 schib->scsw.ctrl |= SCSW_ACTL_RESUME_PEND;
Halil Pasic66dc50f2017-10-17 16:04:49 +02001979 return do_subchannel_work(sch);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001980}
1981
1982int css_do_rchp(uint8_t cssid, uint8_t chpid)
1983{
1984 uint8_t real_cssid;
1985
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001986 if (cssid > channel_subsys.max_cssid) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001987 return -EINVAL;
1988 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001989 if (channel_subsys.max_cssid == 0) {
1990 real_cssid = channel_subsys.default_cssid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001991 } else {
1992 real_cssid = cssid;
1993 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001994 if (!channel_subsys.css[real_cssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001995 return -EINVAL;
1996 }
1997
Eduardo Habkost562f5e02016-02-16 18:59:05 -02001998 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00001999 return -ENODEV;
2000 }
2001
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002002 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002003 fprintf(stderr,
2004 "rchp unsupported for non-virtual chpid %x.%02x!\n",
2005 real_cssid, chpid);
2006 return -ENODEV;
2007 }
2008
2009 /* We don't really use a channel path, so we're done here. */
Dong Jia Shi5c8d6f02017-08-03 02:35:27 +02002010 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 1,
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002011 channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
2012 if (channel_subsys.max_cssid > 0) {
Dong Jia Shi5c8d6f02017-08-03 02:35:27 +02002013 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 1, 0, real_cssid << 8);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002014 }
2015 return 0;
2016}
2017
Christian Borntraeger38dd7cc2013-02-22 09:01:32 +00002018bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002019{
2020 SubchSet *set;
Christian Borntraeger38dd7cc2013-02-22 09:01:32 +00002021 uint8_t real_cssid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002022
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002023 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
Cornelia Huck882b3b92016-08-15 11:10:28 +02002024 if (ssid > MAX_SSID ||
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002025 !channel_subsys.css[real_cssid] ||
2026 !channel_subsys.css[real_cssid]->sch_set[ssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002027 return true;
2028 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002029 set = channel_subsys.css[real_cssid]->sch_set[ssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002030 return schid > find_last_bit(set->schids_used,
2031 (MAX_SCHID + 1) / sizeof(unsigned long));
2032}
2033
Jing Liu6c15e9b2016-09-19 09:10:43 +02002034unsigned int css_find_free_chpid(uint8_t cssid)
2035{
2036 CssImage *css = channel_subsys.css[cssid];
2037 unsigned int chpid;
2038
2039 if (!css) {
2040 return MAX_CHPID + 1;
2041 }
2042
2043 for (chpid = 0; chpid <= MAX_CHPID; chpid++) {
2044 /* skip reserved chpid */
2045 if (chpid == VIRTIO_CCW_CHPID) {
2046 continue;
2047 }
2048 if (!css->chpids[chpid].in_use) {
2049 return chpid;
2050 }
2051 }
2052 return MAX_CHPID + 1;
2053}
2054
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002055static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type,
2056 bool is_virt)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002057{
2058 CssImage *css;
2059
2060 trace_css_chpid_add(cssid, chpid, type);
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002061 css = channel_subsys.css[cssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002062 if (!css) {
2063 return -EINVAL;
2064 }
2065 if (css->chpids[chpid].in_use) {
2066 return -EEXIST;
2067 }
2068 css->chpids[chpid].in_use = 1;
2069 css->chpids[chpid].type = type;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002070 css->chpids[chpid].is_virtual = is_virt;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002071
2072 css_generate_chp_crws(cssid, chpid);
2073
2074 return 0;
2075}
2076
2077void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
2078{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002079 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002080 int i;
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002081 CssImage *css = channel_subsys.css[sch->cssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002082
2083 assert(css != NULL);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002084 memset(&schib->pmcw, 0, sizeof(PMCW));
2085 schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
2086 schib->pmcw.devno = sch->devno;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002087 /* single path */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002088 schib->pmcw.pim = 0x80;
2089 schib->pmcw.pom = 0xff;
2090 schib->pmcw.pam = 0x80;
2091 schib->pmcw.chpid[0] = chpid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002092 if (!css->chpids[chpid].in_use) {
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002093 css_add_chpid(sch->cssid, chpid, type, true);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002094 }
2095
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002096 memset(&schib->scsw, 0, sizeof(SCSW));
2097 schib->mba = 0;
2098 for (i = 0; i < ARRAY_SIZE(schib->mda); i++) {
2099 schib->mda[i] = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002100 }
2101}
2102
2103SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
2104{
2105 uint8_t real_cssid;
2106
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002107 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002108
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002109 if (!channel_subsys.css[real_cssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002110 return NULL;
2111 }
2112
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002113 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002114 return NULL;
2115 }
2116
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002117 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002118}
2119
Sascha Silbecf249932016-06-15 17:16:05 +02002120/**
2121 * Return free device number in subchannel set.
2122 *
2123 * Return index of the first free device number in the subchannel set
2124 * identified by @p cssid and @p ssid, beginning the search at @p
2125 * start and wrapping around at MAX_DEVNO. Return a value exceeding
2126 * MAX_SCHID if there are no free device numbers in the subchannel
2127 * set.
2128 */
2129static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
2130 uint16_t start)
2131{
2132 uint32_t round;
2133
2134 for (round = 0; round <= MAX_DEVNO; round++) {
2135 uint16_t devno = (start + round) % MAX_DEVNO;
2136
2137 if (!css_devno_used(cssid, ssid, devno)) {
2138 return devno;
2139 }
2140 }
2141 return MAX_DEVNO + 1;
2142}
2143
2144/**
2145 * Return first free subchannel (id) in subchannel set.
2146 *
2147 * Return index of the first free subchannel in the subchannel set
2148 * identified by @p cssid and @p ssid, if there is any. Return a value
2149 * exceeding MAX_SCHID if there are no free subchannels in the
2150 * subchannel set.
2151 */
2152static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
2153{
2154 uint32_t schid;
2155
2156 for (schid = 0; schid <= MAX_SCHID; schid++) {
2157 if (!css_find_subch(1, cssid, ssid, schid)) {
2158 return schid;
2159 }
2160 }
2161 return MAX_SCHID + 1;
2162}
2163
2164/**
2165 * Return first free subchannel (id) in subchannel set for a device number
2166 *
2167 * Verify the device number @p devno is not used yet in the subchannel
2168 * set identified by @p cssid and @p ssid. Set @p schid to the index
2169 * of the first free subchannel in the subchannel set, if there is
2170 * any. Return true if everything succeeded and false otherwise.
2171 */
2172static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
2173 uint16_t devno, uint16_t *schid,
2174 Error **errp)
2175{
2176 uint32_t free_schid;
2177
2178 assert(schid);
2179 if (css_devno_used(cssid, ssid, devno)) {
2180 error_setg(errp, "Device %x.%x.%04x already exists",
2181 cssid, ssid, devno);
2182 return false;
2183 }
2184 free_schid = css_find_free_subch(cssid, ssid);
2185 if (free_schid > MAX_SCHID) {
2186 error_setg(errp, "No free subchannel found for %x.%x.%04x",
2187 cssid, ssid, devno);
2188 return false;
2189 }
2190 *schid = free_schid;
2191 return true;
2192}
2193
2194/**
2195 * Return first free subchannel (id) and device number
2196 *
2197 * Locate the first free subchannel and first free device number in
2198 * any of the subchannel sets of the channel subsystem identified by
2199 * @p cssid. Return false if no free subchannel / device number could
2200 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
2201 * the available subchannel and device number and return true.
2202 *
2203 * May modify @p ssid, @p devno and / or @p schid even if no free
2204 * subchannel / device number could be found.
2205 */
2206static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
2207 uint16_t *devno, uint16_t *schid,
2208 Error **errp)
2209{
2210 uint32_t free_schid, free_devno;
2211
2212 assert(ssid && devno && schid);
2213 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
2214 free_schid = css_find_free_subch(cssid, *ssid);
2215 if (free_schid > MAX_SCHID) {
2216 continue;
2217 }
2218 free_devno = css_find_free_devno(cssid, *ssid, free_schid);
2219 if (free_devno > MAX_DEVNO) {
2220 continue;
2221 }
2222 *schid = free_schid;
2223 *devno = free_devno;
2224 return true;
2225 }
2226 error_setg(errp, "Virtual channel subsystem is full!");
2227 return false;
2228}
2229
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002230bool css_subch_visible(SubchDev *sch)
2231{
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002232 if (sch->ssid > channel_subsys.max_ssid) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002233 return false;
2234 }
2235
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002236 if (sch->cssid != channel_subsys.default_cssid) {
2237 return (channel_subsys.max_cssid > 0);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002238 }
2239
2240 return true;
2241}
2242
2243bool css_present(uint8_t cssid)
2244{
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002245 return (channel_subsys.css[cssid] != NULL);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002246}
2247
2248bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
2249{
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002250 if (!channel_subsys.css[cssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002251 return false;
2252 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002253 if (!channel_subsys.css[cssid]->sch_set[ssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002254 return false;
2255 }
2256
2257 return !!test_bit(devno,
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002258 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002259}
2260
2261void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
2262 uint16_t devno, SubchDev *sch)
2263{
2264 CssImage *css;
2265 SubchSet *s_set;
2266
2267 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
2268 devno);
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002269 if (!channel_subsys.css[cssid]) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002270 fprintf(stderr,
2271 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
2272 __func__, cssid, ssid, schid);
2273 return;
2274 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002275 css = channel_subsys.css[cssid];
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002276
2277 if (!css->sch_set[ssid]) {
Marc-André Lureau96f64aa2017-10-06 20:49:21 -03002278 css->sch_set[ssid] = g_new0(SubchSet, 1);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002279 }
2280 s_set = css->sch_set[ssid];
2281
2282 s_set->sch[schid] = sch;
2283 if (sch) {
2284 set_bit(schid, s_set->schids_used);
2285 set_bit(devno, s_set->devnos_used);
2286 } else {
2287 clear_bit(schid, s_set->schids_used);
2288 clear_bit(devno, s_set->devnos_used);
2289 }
2290}
2291
Eric Farmanf6dde1b2020-05-05 14:57:56 +02002292void css_crw_add_to_queue(CRW crw)
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002293{
2294 CrwContainer *crw_cont;
2295
Eric Farmanf6dde1b2020-05-05 14:57:56 +02002296 trace_css_crw((crw.flags & CRW_FLAGS_MASK_RSC) >> 8,
2297 crw.flags & CRW_FLAGS_MASK_ERC,
2298 crw.rsid,
2299 (crw.flags & CRW_FLAGS_MASK_C) ? "(chained)" : "");
2300
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002301 /* TODO: Maybe use a static crw pool? */
Marc-André Lureau96f64aa2017-10-06 20:49:21 -03002302 crw_cont = g_try_new0(CrwContainer, 1);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002303 if (!crw_cont) {
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002304 channel_subsys.crws_lost = true;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002305 return;
2306 }
Eric Farmanf6dde1b2020-05-05 14:57:56 +02002307
2308 crw_cont->crw = crw;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002309
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002310 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002311
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002312 if (channel_subsys.do_crw_mchk) {
2313 channel_subsys.do_crw_mchk = false;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002314 /* Inject crw pending machine check. */
Cornelia Huckde13d212014-03-11 13:19:43 +01002315 s390_crw_mchk();
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002316 }
2317}
2318
Eric Farmanf6dde1b2020-05-05 14:57:56 +02002319void css_queue_crw(uint8_t rsc, uint8_t erc, int solicited,
2320 int chain, uint16_t rsid)
2321{
2322 CRW crw;
2323
2324 crw.flags = (rsc << 8) | erc;
2325 if (solicited) {
2326 crw.flags |= CRW_FLAGS_MASK_S;
2327 }
2328 if (chain) {
2329 crw.flags |= CRW_FLAGS_MASK_C;
2330 }
2331 crw.rsid = rsid;
2332 if (channel_subsys.crws_lost) {
2333 crw.flags |= CRW_FLAGS_MASK_R;
2334 channel_subsys.crws_lost = false;
2335 }
2336
2337 css_crw_add_to_queue(crw);
2338}
2339
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002340void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
2341 int hotplugged, int add)
2342{
2343 uint8_t guest_cssid;
2344 bool chain_crw;
2345
2346 if (add && !hotplugged) {
2347 return;
2348 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002349 if (channel_subsys.max_cssid == 0) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002350 /* Default cssid shows up as 0. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002351 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002352 } else {
2353 /* Show real cssid to the guest. */
2354 guest_cssid = cssid;
2355 }
2356 /*
2357 * Only notify for higher subchannel sets/channel subsystems if the
2358 * guest has enabled it.
2359 */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002360 if ((ssid > channel_subsys.max_ssid) ||
2361 (guest_cssid > channel_subsys.max_cssid) ||
2362 ((channel_subsys.max_cssid == 0) &&
2363 (cssid != channel_subsys.default_cssid))) {
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002364 return;
2365 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002366 chain_crw = (channel_subsys.max_ssid > 0) ||
2367 (channel_subsys.max_cssid > 0);
Dong Jia Shi5c8d6f02017-08-03 02:35:27 +02002368 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0, chain_crw ? 1 : 0, schid);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002369 if (chain_crw) {
Dong Jia Shi5c8d6f02017-08-03 02:35:27 +02002370 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0, 0,
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002371 (guest_cssid << 8) | (ssid << 4));
2372 }
Halil Pasicc1755b12016-01-27 13:24:17 +01002373 /* RW_ERC_IPI --> clear pending interrupts */
2374 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002375}
2376
2377void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
2378{
2379 /* TODO */
2380}
2381
Frank Blaschka8cba80c2015-01-09 09:04:38 +01002382void css_generate_css_crws(uint8_t cssid)
2383{
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002384 if (!channel_subsys.sei_pending) {
Dong Jia Shi5c8d6f02017-08-03 02:35:27 +02002385 css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, 0, cssid);
Song Shan Gongc81b4f82016-01-19 02:55:00 +01002386 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002387 channel_subsys.sei_pending = true;
Song Shan Gongc81b4f82016-01-19 02:55:00 +01002388}
2389
2390void css_clear_sei_pending(void)
2391{
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002392 channel_subsys.sei_pending = false;
Frank Blaschka8cba80c2015-01-09 09:04:38 +01002393}
2394
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002395int css_enable_mcsse(void)
2396{
2397 trace_css_enable_facility("mcsse");
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002398 channel_subsys.max_cssid = MAX_CSSID;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002399 return 0;
2400}
2401
2402int css_enable_mss(void)
2403{
2404 trace_css_enable_facility("mss");
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002405 channel_subsys.max_ssid = MAX_SSID;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002406 return 0;
2407}
2408
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002409void css_reset_sch(SubchDev *sch)
2410{
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002411 SCHIB *schib = &sch->curr_status;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002412
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002413 if ((schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
Thomas Huth62ac4a52014-12-11 14:25:11 +01002414 sch->disable_cb(sch);
2415 }
2416
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002417 schib->pmcw.intparm = 0;
2418 schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002419 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
2420 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002421 schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
2422 schib->pmcw.devno = sch->devno;
2423 schib->pmcw.pim = 0x80;
2424 schib->pmcw.lpm = schib->pmcw.pim;
2425 schib->pmcw.pnom = 0;
2426 schib->pmcw.lpum = 0;
2427 schib->pmcw.mbi = 0;
2428 schib->pmcw.pom = 0xff;
2429 schib->pmcw.pam = 0x80;
2430 schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002431 PMCW_CHARS_MASK_CSENSE);
2432
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002433 memset(&schib->scsw, 0, sizeof(schib->scsw));
2434 schib->mba = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002435
2436 sch->channel_prog = 0x0;
2437 sch->last_cmd_valid = false;
Cornelia Huck7e749462013-02-06 10:31:37 +01002438 sch->thinint_active = false;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002439}
2440
2441void css_reset(void)
2442{
2443 CrwContainer *crw_cont;
2444
2445 /* Clean up monitoring. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002446 channel_subsys.chnmon_active = false;
2447 channel_subsys.chnmon_area = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002448
2449 /* Clear pending CRWs. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002450 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
2451 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002452 g_free(crw_cont);
2453 }
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002454 channel_subsys.sei_pending = false;
2455 channel_subsys.do_crw_mchk = true;
2456 channel_subsys.crws_lost = false;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002457
2458 /* Reset maximum ids. */
Eduardo Habkost562f5e02016-02-16 18:59:05 -02002459 channel_subsys.max_cssid = 0;
2460 channel_subsys.max_ssid = 0;
Cornelia Huckdf1fe5b2013-01-24 02:28:06 +00002461}
Cornelia Huck06e686e2016-04-01 13:42:04 +02002462
2463static void get_css_devid(Object *obj, Visitor *v, const char *name,
2464 void *opaque, Error **errp)
2465{
Cornelia Huck06e686e2016-04-01 13:42:04 +02002466 Property *prop = opaque;
Eduardo Habkost1e198712020-12-11 17:05:27 -05002467 CssDevId *dev_id = object_field_prop_ptr(obj, prop);
Cornelia Huck06e686e2016-04-01 13:42:04 +02002468 char buffer[] = "xx.x.xxxx";
2469 char *p = buffer;
2470 int r;
2471
2472 if (dev_id->valid) {
2473
2474 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
2475 dev_id->ssid, dev_id->devid);
2476 assert(r == sizeof(buffer) - 1);
2477
2478 /* drop leading zero */
2479 if (dev_id->cssid <= 0xf) {
2480 p++;
2481 }
2482 } else {
2483 snprintf(buffer, sizeof(buffer), "<unset>");
2484 }
2485
2486 visit_type_str(v, name, &p, errp);
2487}
2488
2489/*
2490 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
2491 */
2492static void set_css_devid(Object *obj, Visitor *v, const char *name,
2493 void *opaque, Error **errp)
2494{
Cornelia Huck06e686e2016-04-01 13:42:04 +02002495 Property *prop = opaque;
Eduardo Habkost1e198712020-12-11 17:05:27 -05002496 CssDevId *dev_id = object_field_prop_ptr(obj, prop);
Cornelia Huck06e686e2016-04-01 13:42:04 +02002497 char *str;
2498 int num, n1, n2;
2499 unsigned int cssid, ssid, devid;
2500
Markus Armbruster668f62e2020-07-07 18:06:02 +02002501 if (!visit_type_str(v, name, &str, errp)) {
Cornelia Huck06e686e2016-04-01 13:42:04 +02002502 return;
2503 }
2504
2505 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
2506 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
Eduardo Habkoste68c2cb2020-12-11 17:05:15 -05002507 error_set_from_qdev_prop_error(errp, EINVAL, obj, name, str);
Cornelia Huck06e686e2016-04-01 13:42:04 +02002508 goto out;
2509 }
2510 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
2511 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
2512 cssid, ssid);
2513 goto out;
2514 }
2515
2516 dev_id->cssid = cssid;
2517 dev_id->ssid = ssid;
2518 dev_id->devid = devid;
2519 dev_id->valid = true;
2520
2521out:
2522 g_free(str);
2523}
2524
Fam Zheng1b6b7d12017-07-14 10:14:54 +08002525const PropertyInfo css_devid_propinfo = {
Cornelia Huck06e686e2016-04-01 13:42:04 +02002526 .name = "str",
2527 .description = "Identifier of an I/O device in the channel "
2528 "subsystem, example: fe.1.23ab",
2529 .get = get_css_devid,
2530 .set = set_css_devid,
2531};
Sascha Silbecf249932016-06-15 17:16:05 +02002532
Fam Zheng1b6b7d12017-07-14 10:14:54 +08002533const PropertyInfo css_devid_ro_propinfo = {
Dong Jia Shic35fc6a2017-02-14 04:04:02 +01002534 .name = "str",
2535 .description = "Read-only identifier of an I/O device in the channel "
2536 "subsystem, example: fe.1.23ab",
2537 .get = get_css_devid,
2538};
2539
Cornelia Huck36699ab2018-07-23 18:32:21 +02002540SubchDev *css_create_sch(CssDevId bus_id, Error **errp)
Sascha Silbecf249932016-06-15 17:16:05 +02002541{
2542 uint16_t schid = 0;
2543 SubchDev *sch;
2544
2545 if (bus_id.valid) {
Cornelia Huck36699ab2018-07-23 18:32:21 +02002546 if (!channel_subsys.css[bus_id.cssid]) {
Dong Jia Shi817d4a62017-05-17 02:48:05 +02002547 css_create_css_image(bus_id.cssid, false);
2548 }
2549
Sascha Silbecf249932016-06-15 17:16:05 +02002550 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
2551 bus_id.devid, &schid, errp)) {
2552 return NULL;
2553 }
Dong Jia Shi817d4a62017-05-17 02:48:05 +02002554 } else {
Halil Pasic99577c42017-12-06 15:44:37 +01002555 for (bus_id.cssid = channel_subsys.default_cssid;;) {
Dong Jia Shi817d4a62017-05-17 02:48:05 +02002556 if (!channel_subsys.css[bus_id.cssid]) {
2557 css_create_css_image(bus_id.cssid, false);
2558 }
2559
2560 if (css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
2561 &bus_id.devid, &schid,
2562 NULL)) {
2563 break;
2564 }
Halil Pasic99577c42017-12-06 15:44:37 +01002565 bus_id.cssid = (bus_id.cssid + 1) % MAX_CSSID;
2566 if (bus_id.cssid == channel_subsys.default_cssid) {
Dong Jia Shi817d4a62017-05-17 02:48:05 +02002567 error_setg(errp, "Virtual channel subsystem is full!");
2568 return NULL;
2569 }
2570 }
Sascha Silbecf249932016-06-15 17:16:05 +02002571 }
2572
Marc-André Lureau96f64aa2017-10-06 20:49:21 -03002573 sch = g_new0(SubchDev, 1);
Sascha Silbecf249932016-06-15 17:16:05 +02002574 sch->cssid = bus_id.cssid;
2575 sch->ssid = bus_id.ssid;
2576 sch->devno = bus_id.devid;
2577 sch->schid = schid;
2578 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
2579 return sch;
2580}
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002581
2582static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id)
2583{
2584 char *fid_path;
2585 FILE *fd;
2586 uint32_t chpid[8];
2587 int i;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002588 SCHIB *schib = &sch->curr_status;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002589
2590 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
2591 dev_id->cssid, dev_id->ssid, dev_id->devid);
2592 fd = fopen(fid_path, "r");
2593 if (fd == NULL) {
2594 error_report("%s: open %s failed", __func__, fid_path);
2595 g_free(fid_path);
2596 return -EINVAL;
2597 }
2598
2599 if (fscanf(fd, "%x %x %x %x %x %x %x %x",
2600 &chpid[0], &chpid[1], &chpid[2], &chpid[3],
2601 &chpid[4], &chpid[5], &chpid[6], &chpid[7]) != 8) {
2602 fclose(fd);
2603 g_free(fid_path);
2604 return -EINVAL;
2605 }
2606
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002607 for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) {
2608 schib->pmcw.chpid[i] = chpid[i];
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002609 }
2610
2611 fclose(fd);
2612 g_free(fid_path);
2613
2614 return 0;
2615}
2616
2617static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id)
2618{
2619 char *fid_path;
2620 FILE *fd;
2621 uint32_t pim, pam, pom;
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002622 SCHIB *schib = &sch->curr_status;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002623
2624 fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
2625 dev_id->cssid, dev_id->ssid, dev_id->devid);
2626 fd = fopen(fid_path, "r");
2627 if (fd == NULL) {
2628 error_report("%s: open %s failed", __func__, fid_path);
2629 g_free(fid_path);
2630 return -EINVAL;
2631 }
2632
2633 if (fscanf(fd, "%x %x %x", &pim, &pam, &pom) != 3) {
2634 fclose(fd);
2635 g_free(fid_path);
2636 return -EINVAL;
2637 }
2638
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002639 schib->pmcw.pim = pim;
2640 schib->pmcw.pam = pam;
2641 schib->pmcw.pom = pom;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002642 fclose(fd);
2643 g_free(fid_path);
2644
2645 return 0;
2646}
2647
2648static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type,
2649 CssDevId *dev_id)
2650{
2651 char *fid_path;
2652 FILE *fd;
2653
2654 fid_path = g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
2655 dev_id->cssid, chpid);
2656 fd = fopen(fid_path, "r");
2657 if (fd == NULL) {
2658 error_report("%s: open %s failed", __func__, fid_path);
2659 g_free(fid_path);
2660 return -EINVAL;
2661 }
2662
2663 if (fscanf(fd, "%x", type) != 1) {
2664 fclose(fd);
2665 g_free(fid_path);
2666 return -EINVAL;
2667 }
2668
2669 fclose(fd);
2670 g_free(fid_path);
2671
2672 return 0;
2673}
2674
2675/*
2676 * We currently retrieve the real device information from sysfs to build the
2677 * guest subchannel information block without considering the migration feature.
2678 * We need to revisit this problem when we want to add migration support.
2679 */
2680int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id)
2681{
2682 CssImage *css = channel_subsys.css[sch->cssid];
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002683 SCHIB *schib = &sch->curr_status;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002684 uint32_t type;
2685 int i, ret;
2686
2687 assert(css != NULL);
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002688 memset(&schib->pmcw, 0, sizeof(PMCW));
2689 schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002690 /* We are dealing with I/O subchannels only. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002691 schib->pmcw.devno = sch->devno;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002692
2693 /* Grab path mask from sysfs. */
2694 ret = css_sch_get_path_masks(sch, dev_id);
2695 if (ret) {
2696 return ret;
2697 }
2698
2699 /* Grab chpids from sysfs. */
2700 ret = css_sch_get_chpids(sch, dev_id);
2701 if (ret) {
2702 return ret;
2703 }
2704
2705 /* Build chpid type. */
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002706 for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) {
2707 if (schib->pmcw.chpid[i] && !css->chpids[schib->pmcw.chpid[i]].in_use) {
2708 ret = css_sch_get_chpid_type(schib->pmcw.chpid[i], &type, dev_id);
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002709 if (ret) {
2710 return ret;
2711 }
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002712 css_add_chpid(sch->cssid, schib->pmcw.chpid[i], type, false);
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002713 }
2714 }
2715
Daniel P. Berrangébea02792019-03-29 11:11:02 +00002716 memset(&schib->scsw, 0, sizeof(SCSW));
2717 schib->mba = 0;
2718 for (i = 0; i < ARRAY_SIZE(schib->mda); i++) {
2719 schib->mda[i] = 0;
Xiao Feng Ren8f3cf012017-05-17 02:48:04 +02002720 }
2721
2722 return 0;
2723}