blob: fccfb943406ff0fe351ad391841073743a1b8dc4 [file] [log] [blame]
Taylor Simpson8b453a22021-02-07 23:46:19 -06001/*
2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef HEXAGON_TRANSLATE_H
19#define HEXAGON_TRANSLATE_H
20
21#include "qemu/bitmap.h"
22#include "cpu.h"
23#include "exec/translator.h"
24#include "tcg/tcg-op.h"
25#include "internal.h"
26
27typedef struct DisasContext {
28 DisasContextBase base;
29 uint32_t mem_idx;
30 uint32_t num_packets;
31 uint32_t num_insns;
Taylor Simpsona82dd542021-09-30 14:29:00 -050032 uint32_t num_hvx_insns;
Taylor Simpson8b453a22021-02-07 23:46:19 -060033 int reg_log[REG_WRITES_MAX];
34 int reg_log_idx;
35 DECLARE_BITMAP(regs_written, TOTAL_PER_THREAD_REGS);
36 int preg_log[PRED_WRITES_MAX];
37 int preg_log_idx;
Taylor Simpson6c677c62021-04-08 20:07:34 -050038 DECLARE_BITMAP(pregs_written, NUM_PREGS);
Taylor Simpson8b453a22021-02-07 23:46:19 -060039 uint8_t store_width[STORES_MAX];
Taylor Simpson92cfa252021-04-08 20:07:35 -050040 bool s1_store_processed;
Taylor Simpsona82dd542021-09-30 14:29:00 -050041 int future_vregs_idx;
42 int future_vregs_num[VECTOR_TEMPS_MAX];
43 int tmp_vregs_idx;
44 int tmp_vregs_num[VECTOR_TEMPS_MAX];
45 int vreg_log[NUM_VREGS];
46 bool vreg_is_predicated[NUM_VREGS];
47 int vreg_log_idx;
48 DECLARE_BITMAP(vregs_updated_tmp, NUM_VREGS);
49 DECLARE_BITMAP(vregs_updated, NUM_VREGS);
50 DECLARE_BITMAP(vregs_select, NUM_VREGS);
51 int qreg_log[NUM_QREGS];
52 bool qreg_is_predicated[NUM_QREGS];
53 int qreg_log_idx;
54 bool pre_commit;
Taylor Simpson8b453a22021-02-07 23:46:19 -060055} DisasContext;
56
57static inline void ctx_log_reg_write(DisasContext *ctx, int rnum)
58{
Taylor Simpson8b453a22021-02-07 23:46:19 -060059 if (test_bit(rnum, ctx->regs_written)) {
60 HEX_DEBUG_LOG("WARNING: Multiple writes to r%d\n", rnum);
61 }
Taylor Simpson8b453a22021-02-07 23:46:19 -060062 ctx->reg_log[ctx->reg_log_idx] = rnum;
63 ctx->reg_log_idx++;
64 set_bit(rnum, ctx->regs_written);
65}
66
67static inline void ctx_log_reg_write_pair(DisasContext *ctx, int rnum)
68{
69 ctx_log_reg_write(ctx, rnum);
70 ctx_log_reg_write(ctx, rnum + 1);
71}
72
73static inline void ctx_log_pred_write(DisasContext *ctx, int pnum)
74{
75 ctx->preg_log[ctx->preg_log_idx] = pnum;
76 ctx->preg_log_idx++;
Taylor Simpson6c677c62021-04-08 20:07:34 -050077 set_bit(pnum, ctx->pregs_written);
Taylor Simpson8b453a22021-02-07 23:46:19 -060078}
79
80static inline bool is_preloaded(DisasContext *ctx, int num)
81{
82 return test_bit(num, ctx->regs_written);
83}
84
Taylor Simpsona82dd542021-09-30 14:29:00 -050085intptr_t ctx_future_vreg_off(DisasContext *ctx, int regnum,
86 int num, bool alloc_ok);
87intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regnum,
88 int num, bool alloc_ok);
89
90static inline void ctx_log_vreg_write(DisasContext *ctx,
91 int rnum, VRegWriteType type,
92 bool is_predicated)
93{
94 if (type != EXT_TMP) {
95 ctx->vreg_log[ctx->vreg_log_idx] = rnum;
96 ctx->vreg_is_predicated[ctx->vreg_log_idx] = is_predicated;
97 ctx->vreg_log_idx++;
98
99 set_bit(rnum, ctx->vregs_updated);
100 }
101 if (type == EXT_NEW) {
102 set_bit(rnum, ctx->vregs_select);
103 }
104 if (type == EXT_TMP) {
105 set_bit(rnum, ctx->vregs_updated_tmp);
106 }
107}
108
109static inline void ctx_log_vreg_write_pair(DisasContext *ctx,
110 int rnum, VRegWriteType type,
111 bool is_predicated)
112{
113 ctx_log_vreg_write(ctx, rnum ^ 0, type, is_predicated);
114 ctx_log_vreg_write(ctx, rnum ^ 1, type, is_predicated);
115}
116
117static inline void ctx_log_qreg_write(DisasContext *ctx,
118 int rnum, bool is_predicated)
119{
120 ctx->qreg_log[ctx->qreg_log_idx] = rnum;
121 ctx->qreg_is_predicated[ctx->qreg_log_idx] = is_predicated;
122 ctx->qreg_log_idx++;
123}
124
Taylor Simpson8b453a22021-02-07 23:46:19 -0600125extern TCGv hex_gpr[TOTAL_PER_THREAD_REGS];
126extern TCGv hex_pred[NUM_PREGS];
127extern TCGv hex_next_PC;
128extern TCGv hex_this_PC;
129extern TCGv hex_slot_cancelled;
130extern TCGv hex_branch_taken;
131extern TCGv hex_new_value[TOTAL_PER_THREAD_REGS];
132extern TCGv hex_reg_written[TOTAL_PER_THREAD_REGS];
133extern TCGv hex_new_pred_value[NUM_PREGS];
134extern TCGv hex_pred_written;
135extern TCGv hex_store_addr[STORES_MAX];
136extern TCGv hex_store_width[STORES_MAX];
137extern TCGv hex_store_val32[STORES_MAX];
138extern TCGv_i64 hex_store_val64[STORES_MAX];
139extern TCGv hex_dczero_addr;
140extern TCGv hex_llsc_addr;
141extern TCGv hex_llsc_val;
142extern TCGv_i64 hex_llsc_val_i64;
Taylor Simpsona82dd542021-09-30 14:29:00 -0500143extern TCGv hex_VRegs_updated;
144extern TCGv hex_QRegs_updated;
145extern TCGv hex_vstore_addr[VSTORES_MAX];
146extern TCGv hex_vstore_size[VSTORES_MAX];
147extern TCGv hex_vstore_pending[VSTORES_MAX];
Taylor Simpson8b453a22021-02-07 23:46:19 -0600148
Taylor Simpsona82dd542021-09-30 14:29:00 -0500149bool is_gather_store_insn(Insn *insn, Packet *pkt);
Taylor Simpson8b453a22021-02-07 23:46:19 -0600150void process_store(DisasContext *ctx, Packet *pkt, int slot_num);
151#endif