bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
Blue Swirl | efbf29b | 2011-09-21 20:00:18 +0000 | [diff] [blame] | 4 | * Generate helpers used by TCG for qemu_ld/st ops and code load |
| 5 | * functions. |
| 6 | * |
| 7 | * Included from target op helpers and exec.c. |
| 8 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 9 | * Copyright (c) 2003 Fabrice Bellard |
| 10 | * |
| 11 | * This library is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU Lesser General Public |
| 13 | * License as published by the Free Software Foundation; either |
| 14 | * version 2 of the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This library is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 19 | * Lesser General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 22 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 23 | */ |
Blue Swirl | 29e922b | 2010-03-29 19:24:00 +0000 | [diff] [blame] | 24 | #include "qemu-timer.h" |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 25 | #include "memory.h" |
Blue Swirl | 29e922b | 2010-03-29 19:24:00 +0000 | [diff] [blame] | 26 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 27 | #define DATA_SIZE (1 << SHIFT) |
| 28 | |
| 29 | #if DATA_SIZE == 8 |
| 30 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 31 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 32 | #define DATA_TYPE uint64_t |
| 33 | #elif DATA_SIZE == 4 |
| 34 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 35 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 36 | #define DATA_TYPE uint32_t |
| 37 | #elif DATA_SIZE == 2 |
| 38 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 39 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 40 | #define DATA_TYPE uint16_t |
| 41 | #elif DATA_SIZE == 1 |
| 42 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 43 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 44 | #define DATA_TYPE uint8_t |
| 45 | #else |
| 46 | #error unsupported data size |
| 47 | #endif |
| 48 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 49 | #ifdef SOFTMMU_CODE_ACCESS |
| 50 | #define READ_ACCESS_TYPE 2 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 51 | #define ADDR_READ addr_code |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 52 | #else |
| 53 | #define READ_ACCESS_TYPE 0 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 54 | #define ADDR_READ addr_read |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 55 | #endif |
| 56 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 57 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 58 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 59 | void *retaddr); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 60 | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 61 | target_ulong addr, |
| 62 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 63 | { |
| 64 | DATA_TYPE res; |
| 65 | int index; |
Avi Kivity | 11c7ef0 | 2012-01-02 17:21:07 +0200 | [diff] [blame] | 66 | index = physaddr & (IO_MEM_NB_ENTRIES - 1); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 67 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 68 | env->mem_io_pc = (unsigned long)retaddr; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 69 | if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr |
| 70 | && index != io_mem_unassigned.ram_addr |
| 71 | && index != io_mem_notdirty.ram_addr |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 72 | && !can_do_io(env)) { |
| 73 | cpu_io_recompile(env, retaddr); |
| 74 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 75 | |
aliguori | db8886d | 2008-11-18 20:09:43 +0000 | [diff] [blame] | 76 | env->mem_io_vaddr = addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 77 | #if SHIFT <= 2 |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 78 | res = io_mem_read(index, physaddr, 1 << SHIFT); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 79 | #else |
| 80 | #ifdef TARGET_WORDS_BIGENDIAN |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 81 | res = io_mem_read(index, physaddr, 4) << 32; |
| 82 | res |= io_mem_read(index, physaddr + 4, 4); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 83 | #else |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 84 | res = io_mem_read(index, physaddr, 4); |
| 85 | res |= io_mem_read(index, physaddr + 4, 4) << 32; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 86 | #endif |
| 87 | #endif /* SHIFT > 2 */ |
| 88 | return res; |
| 89 | } |
| 90 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 91 | /* handle all cases except unaligned access which span two pages */ |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 92 | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 93 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 94 | { |
| 95 | DATA_TYPE res; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 96 | int index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 97 | target_ulong tlb_addr; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 98 | target_phys_addr_t ioaddr; |
| 99 | unsigned long addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 100 | void *retaddr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 101 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 102 | /* test if there is match for unaligned or IO access */ |
| 103 | /* XXX: could done more in memory macro in a non portable way */ |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 104 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 105 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 106 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 107 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 108 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 109 | /* IO access */ |
| 110 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 111 | goto do_unaligned_access; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 112 | retaddr = GETPC(); |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 113 | ioaddr = env->iotlb[mmu_idx][index]; |
| 114 | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 115 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 116 | /* slow unaligned access (it spans two pages or IO) */ |
| 117 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 118 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 119 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 120 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 121 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 122 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 123 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 124 | } else { |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 125 | /* unaligned/aligned access in the same page */ |
| 126 | #ifdef ALIGNED_ONLY |
| 127 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 128 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 129 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 130 | } |
| 131 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 132 | addend = env->tlb_table[mmu_idx][index].addend; |
| 133 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 134 | } |
| 135 | } else { |
| 136 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 137 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 138 | #ifdef ALIGNED_ONLY |
| 139 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 140 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 141 | #endif |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 142 | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 143 | goto redo; |
| 144 | } |
| 145 | return res; |
| 146 | } |
| 147 | |
| 148 | /* handle all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 149 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 150 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 151 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 152 | { |
| 153 | DATA_TYPE res, res1, res2; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 154 | int index, shift; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 155 | target_phys_addr_t ioaddr; |
| 156 | unsigned long addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 157 | target_ulong tlb_addr, addr1, addr2; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 158 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 159 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 160 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 161 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 162 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 163 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 164 | /* IO access */ |
| 165 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 166 | goto do_unaligned_access; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 167 | ioaddr = env->iotlb[mmu_idx][index]; |
| 168 | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 169 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 170 | do_unaligned_access: |
| 171 | /* slow unaligned access (it spans two pages) */ |
| 172 | addr1 = addr & ~(DATA_SIZE - 1); |
| 173 | addr2 = addr1 + DATA_SIZE; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 174 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 175 | mmu_idx, retaddr); |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 176 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 177 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 178 | shift = (addr & (DATA_SIZE - 1)) * 8; |
| 179 | #ifdef TARGET_WORDS_BIGENDIAN |
| 180 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); |
| 181 | #else |
| 182 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); |
| 183 | #endif |
bellard | 6986f88 | 2004-01-18 21:53:18 +0000 | [diff] [blame] | 184 | res = (DATA_TYPE)res; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 185 | } else { |
| 186 | /* unaligned/aligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 187 | addend = env->tlb_table[mmu_idx][index].addend; |
| 188 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 189 | } |
| 190 | } else { |
| 191 | /* the page is not in the TLB : fill it */ |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 192 | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 193 | goto redo; |
| 194 | } |
| 195 | return res; |
| 196 | } |
| 197 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 198 | #ifndef SOFTMMU_CODE_ACCESS |
| 199 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 200 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 201 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 202 | int mmu_idx, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 203 | void *retaddr); |
| 204 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 205 | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 206 | DATA_TYPE val, |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 207 | target_ulong addr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 208 | void *retaddr) |
| 209 | { |
| 210 | int index; |
Avi Kivity | 11c7ef0 | 2012-01-02 17:21:07 +0200 | [diff] [blame] | 211 | index = physaddr & (IO_MEM_NB_ENTRIES - 1); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 212 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 213 | if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr |
| 214 | && index != io_mem_unassigned.ram_addr |
| 215 | && index != io_mem_notdirty.ram_addr |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 216 | && !can_do_io(env)) { |
| 217 | cpu_io_recompile(env, retaddr); |
| 218 | } |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 219 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 220 | env->mem_io_vaddr = addr; |
| 221 | env->mem_io_pc = (unsigned long)retaddr; |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 222 | #if SHIFT <= 2 |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 223 | io_mem_write(index, physaddr, val, 1 << SHIFT); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 224 | #else |
| 225 | #ifdef TARGET_WORDS_BIGENDIAN |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 226 | io_mem_write(index, physaddr, (val >> 32), 4); |
| 227 | io_mem_write(index, physaddr + 4, (uint32_t)val, 4); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 228 | #else |
Avi Kivity | acbbec5 | 2011-11-21 12:27:03 +0200 | [diff] [blame] | 229 | io_mem_write(index, physaddr, (uint32_t)val, 4); |
| 230 | io_mem_write(index, physaddr + 4, val >> 32, 4); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 231 | #endif |
| 232 | #endif /* SHIFT > 2 */ |
| 233 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 234 | |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 235 | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 236 | DATA_TYPE val, |
| 237 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 238 | { |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 239 | target_phys_addr_t ioaddr; |
| 240 | unsigned long addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 241 | target_ulong tlb_addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 242 | void *retaddr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 243 | int index; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 244 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 245 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 246 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 247 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 248 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 249 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 250 | /* IO access */ |
| 251 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 252 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 253 | retaddr = GETPC(); |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 254 | ioaddr = env->iotlb[mmu_idx][index]; |
| 255 | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 256 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 257 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 258 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 259 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 260 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 261 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 262 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 263 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 264 | } else { |
| 265 | /* aligned/unaligned access in the same page */ |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 266 | #ifdef ALIGNED_ONLY |
| 267 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 268 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 269 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 270 | } |
| 271 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 272 | addend = env->tlb_table[mmu_idx][index].addend; |
| 273 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 274 | } |
| 275 | } else { |
| 276 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 277 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 278 | #ifdef ALIGNED_ONLY |
| 279 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 280 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 281 | #endif |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 282 | tlb_fill(env, addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 283 | goto redo; |
| 284 | } |
| 285 | } |
| 286 | |
| 287 | /* handles all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 288 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 289 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 290 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 291 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 292 | { |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 293 | target_phys_addr_t ioaddr; |
| 294 | unsigned long addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 295 | target_ulong tlb_addr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 296 | int index, i; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 297 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 298 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 299 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 300 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 301 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 302 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 303 | /* IO access */ |
| 304 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 305 | goto do_unaligned_access; |
Paul Brook | 355b194 | 2010-04-05 00:28:53 +0100 | [diff] [blame] | 306 | ioaddr = env->iotlb[mmu_idx][index]; |
| 307 | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 308 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 309 | do_unaligned_access: |
| 310 | /* XXX: not efficient, but simple */ |
balrog | 6c41b27 | 2007-11-17 12:12:29 +0000 | [diff] [blame] | 311 | /* Note: relies on the fact that tlb_fill() does not remove the |
| 312 | * previous page from the TLB cache. */ |
balrog | 7221fa9 | 2007-11-17 09:53:42 +0000 | [diff] [blame] | 313 | for(i = DATA_SIZE - 1; i >= 0; i--) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 314 | #ifdef TARGET_WORDS_BIGENDIAN |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 315 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 316 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 317 | #else |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 318 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 319 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 320 | #endif |
| 321 | } |
| 322 | } else { |
| 323 | /* aligned/unaligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 324 | addend = env->tlb_table[mmu_idx][index].addend; |
| 325 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 326 | } |
| 327 | } else { |
| 328 | /* the page is not in the TLB : fill it */ |
Blue Swirl | bccd9ec | 2011-07-04 20:57:05 +0000 | [diff] [blame] | 329 | tlb_fill(env, addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 330 | goto redo; |
| 331 | } |
| 332 | } |
| 333 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 334 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
| 335 | |
| 336 | #undef READ_ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 337 | #undef SHIFT |
| 338 | #undef DATA_TYPE |
| 339 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 340 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 341 | #undef DATA_SIZE |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 342 | #undef ADDR_READ |