blob: 00e9d51feff29d3483598633f4c74963107f4ba3 [file] [log] [blame]
bellard5898e812003-06-15 19:42:24 +00001/*
2 * ARM micro operations (templates for various register related
3 * operations)
4 *
5 * Copyright (c) 2003 Fabrice Bellard
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22void OPPROTO glue(op_movl_T0_, REGNAME)(void)
23{
24 T0 = REG;
25}
26
27void OPPROTO glue(op_movl_T1_, REGNAME)(void)
28{
29 T1 = REG;
30}
31
32void OPPROTO glue(op_movl_T2_, REGNAME)(void)
33{
34 T2 = REG;
35}
36
37void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void)
38{
39 REG = T0;
40}
41
42void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void)
43{
44 REG = T1;
45}
46
47#undef REG
48#undef REGNAME