balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * PXA270-based Intel Mainstone platforms. |
| 3 | * |
| 4 | * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or |
| 5 | * <akuster@mvista.com> |
| 6 | * |
| 7 | * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org> |
| 8 | * |
| 9 | * This code is licensed under the GNU GPL v2. |
| 10 | */ |
| 11 | #include "hw.h" |
| 12 | #include "pxa.h" |
| 13 | #include "arm-misc.h" |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 14 | #include "net.h" |
| 15 | #include "devices.h" |
| 16 | #include "boards.h" |
ths | 7233b35 | 2007-12-02 02:20:03 +0000 | [diff] [blame] | 17 | #include "mainstone.h" |
| 18 | #include "sysemu.h" |
| 19 | #include "flash.h" |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 20 | |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 21 | static struct keymap map[0xE0] = { |
| 22 | [0 ... 0xDF] = { -1, -1 }, |
| 23 | [0x1e] = {0,0}, /* a */ |
| 24 | [0x30] = {0,1}, /* b */ |
| 25 | [0x2e] = {0,2}, /* c */ |
| 26 | [0x20] = {0,3}, /* d */ |
| 27 | [0x12] = {0,4}, /* e */ |
| 28 | [0x21] = {0,5}, /* f */ |
| 29 | [0x22] = {1,0}, /* g */ |
| 30 | [0x23] = {1,1}, /* h */ |
| 31 | [0x17] = {1,2}, /* i */ |
| 32 | [0x24] = {1,3}, /* j */ |
| 33 | [0x25] = {1,4}, /* k */ |
| 34 | [0x26] = {1,5}, /* l */ |
| 35 | [0x32] = {2,0}, /* m */ |
| 36 | [0x31] = {2,1}, /* n */ |
| 37 | [0x18] = {2,2}, /* o */ |
| 38 | [0x19] = {2,3}, /* p */ |
| 39 | [0x10] = {2,4}, /* q */ |
| 40 | [0x13] = {2,5}, /* r */ |
| 41 | [0x1f] = {3,0}, /* s */ |
| 42 | [0x14] = {3,1}, /* t */ |
| 43 | [0x16] = {3,2}, /* u */ |
| 44 | [0x2f] = {3,3}, /* v */ |
| 45 | [0x11] = {3,4}, /* w */ |
| 46 | [0x2d] = {3,5}, /* x */ |
| 47 | [0x15] = {4,2}, /* y */ |
| 48 | [0x2c] = {4,3}, /* z */ |
| 49 | [0xc7] = {5,0}, /* Home */ |
| 50 | [0x2a] = {5,1}, /* shift */ |
| 51 | [0x39] = {5,2}, /* space */ |
| 52 | [0x39] = {5,3}, /* space */ |
| 53 | [0x1c] = {5,5}, /* enter */ |
| 54 | [0xc8] = {6,0}, /* up */ |
| 55 | [0xd0] = {6,1}, /* down */ |
| 56 | [0xcb] = {6,2}, /* left */ |
| 57 | [0xcd] = {6,3}, /* right */ |
| 58 | }; |
| 59 | |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 60 | enum mainstone_model_e { mainstone }; |
| 61 | |
balrog | 7fb4fdc | 2008-04-24 17:59:27 +0000 | [diff] [blame] | 62 | #define MAINSTONE_RAM 0x04000000 |
| 63 | #define MAINSTONE_ROM 0x00800000 |
| 64 | #define MAINSTONE_FLASH 0x02000000 |
| 65 | |
balrog | f93eb9f | 2008-04-14 20:27:51 +0000 | [diff] [blame] | 66 | static struct arm_boot_info mainstone_binfo = { |
| 67 | .loader_start = PXA2XX_SDRAM_BASE, |
| 68 | .ram_size = 0x04000000, |
| 69 | }; |
| 70 | |
aurel32 | 00f82b8 | 2008-04-27 21:12:55 +0000 | [diff] [blame] | 71 | static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size, |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 72 | const char *kernel_filename, |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 73 | const char *kernel_cmdline, const char *initrd_filename, |
| 74 | const char *cpu_model, enum mainstone_model_e model, int arm_id) |
| 75 | { |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 76 | uint32_t sector_len = 256 * 1024; |
| 77 | target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 }; |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 78 | struct pxa2xx_state_s *cpu; |
| 79 | qemu_irq *mst_irq; |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 80 | int i, index; |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 81 | |
| 82 | if (!cpu_model) |
| 83 | cpu_model = "pxa270-c5"; |
| 84 | |
| 85 | /* Setup CPU & memory */ |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 86 | cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model); |
balrog | 7fb4fdc | 2008-04-24 17:59:27 +0000 | [diff] [blame] | 87 | cpu_register_physical_memory(0, MAINSTONE_ROM, |
| 88 | qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 89 | |
| 90 | /* Setup initial (reset) machine state */ |
balrog | f93eb9f | 2008-04-14 20:27:51 +0000 | [diff] [blame] | 91 | cpu->env->regs[15] = mainstone_binfo.loader_start; |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 92 | |
ths | e4bcb14 | 2007-12-02 04:51:10 +0000 | [diff] [blame] | 93 | /* There are two 32MiB flash devices on the board */ |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 94 | for (i = 0; i < 2; i ++) { |
| 95 | index = drive_get_index(IF_PFLASH, 0, i); |
| 96 | if (index == -1) { |
| 97 | fprintf(stderr, "Two flash images must be given with the " |
| 98 | "'pflash' parameter\n"); |
| 99 | exit(1); |
| 100 | } |
ths | 7233b35 | 2007-12-02 02:20:03 +0000 | [diff] [blame] | 101 | |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 102 | if (!pflash_cfi01_register(mainstone_flash_base[i], |
balrog | 7fb4fdc | 2008-04-24 17:59:27 +0000 | [diff] [blame] | 103 | qemu_ram_alloc(MAINSTONE_FLASH), |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 104 | drives_table[index].bdrv, sector_len, |
balrog | 7fb4fdc | 2008-04-24 17:59:27 +0000 | [diff] [blame] | 105 | MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) { |
balrog | 6d1f177 | 2008-01-05 19:29:17 +0000 | [diff] [blame] | 106 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
| 107 | exit(1); |
| 108 | } |
ths | e4bcb14 | 2007-12-02 04:51:10 +0000 | [diff] [blame] | 109 | } |
ths | 7233b35 | 2007-12-02 02:20:03 +0000 | [diff] [blame] | 110 | |
| 111 | mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 112 | |
balrog | bd464c2 | 2007-12-16 12:19:43 +0000 | [diff] [blame] | 113 | /* setup keypad */ |
| 114 | printf("map addr %p\n", &map); |
| 115 | pxa27x_register_keypad(cpu->kp, map, 0xe0); |
| 116 | |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 117 | /* MMC/SD host */ |
balrog | 8543243 | 2007-12-09 23:29:34 +0000 | [diff] [blame] | 118 | pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]); |
ths | f1de133 | 2007-12-09 02:38:34 +0000 | [diff] [blame] | 119 | |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 120 | smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]); |
| 121 | |
balrog | f93eb9f | 2008-04-14 20:27:51 +0000 | [diff] [blame] | 122 | mainstone_binfo.kernel_filename = kernel_filename; |
| 123 | mainstone_binfo.kernel_cmdline = kernel_cmdline; |
| 124 | mainstone_binfo.initrd_filename = initrd_filename; |
| 125 | mainstone_binfo.board_id = arm_id; |
| 126 | arm_load_kernel(cpu->env, &mainstone_binfo); |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 127 | } |
| 128 | |
aurel32 | 00f82b8 | 2008-04-27 21:12:55 +0000 | [diff] [blame] | 129 | static void mainstone_init(ram_addr_t ram_size, int vga_ram_size, |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 130 | const char *boot_device, |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 131 | const char *kernel_filename, const char *kernel_cmdline, |
| 132 | const char *initrd_filename, const char *cpu_model) |
| 133 | { |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 134 | mainstone_common_init(ram_size, vga_ram_size, kernel_filename, |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 135 | kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196); |
| 136 | } |
| 137 | |
| 138 | QEMUMachine mainstone2_machine = { |
aliguori | 4b32e16 | 2008-10-07 20:34:35 +0000 | [diff] [blame] | 139 | .name = "mainstone", |
| 140 | .desc = "Mainstone II (PXA27x)", |
| 141 | .init = mainstone_init, |
balrog | ef056e4 | 2007-11-25 01:57:38 +0000 | [diff] [blame] | 142 | }; |