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Markus Armbruster2a6a4072016-06-29 13:47:03 +02001#ifndef SH_INTC_H
2#define SH_INTC_H
balrog80f515e2007-10-04 21:53:55 +00003
Markus Armbrusterec150c72019-08-12 07:23:31 +02004#include "exec/memory.h"
aurel3296e2fc42008-11-21 21:06:42 +00005
balrog80f515e2007-10-04 21:53:55 +00006typedef unsigned char intc_enum;
7
8struct intc_vect {
9 intc_enum enum_id;
10 unsigned short vect;
11};
12
13#define INTC_VECT(enum_id, vect) { enum_id, vect }
14
15struct intc_group {
16 intc_enum enum_id;
17 intc_enum enum_ids[32];
18};
19
Blue Swirl001faf32009-05-13 17:53:17 +000020#define INTC_GROUP(enum_id, ...) { enum_id, { __VA_ARGS__ } }
balrog80f515e2007-10-04 21:53:55 +000021
22struct intc_mask_reg {
23 unsigned long set_reg, clr_reg, reg_width;
24 intc_enum enum_ids[32];
25 unsigned long value;
26};
27
28struct intc_prio_reg {
29 unsigned long set_reg, clr_reg, reg_width, field_width;
30 intc_enum enum_ids[16];
31 unsigned long value;
32};
33
malcb1503cd2008-12-22 20:33:55 +000034#define _INTC_ARRAY(a) a, ARRAY_SIZE(a)
balrog80f515e2007-10-04 21:53:55 +000035
36struct intc_source {
37 unsigned short vect;
38 intc_enum next_enum_id;
39
thse96e2042007-12-02 06:18:24 +000040 int asserted; /* emulates the interrupt signal line from device to intc */
balrog80f515e2007-10-04 21:53:55 +000041 int enable_count;
42 int enable_max;
thse96e2042007-12-02 06:18:24 +000043 int pending; /* emulates the result of signal and masking */
44 struct intc_desc *parent;
balrog80f515e2007-10-04 21:53:55 +000045};
46
47struct intc_desc {
Benoît Canetb279e5e2011-11-17 14:23:01 +010048 MemoryRegion iomem;
49 MemoryRegion *iomem_aliases;
aurel3296e2fc42008-11-21 21:06:42 +000050 qemu_irq *irqs;
balrog80f515e2007-10-04 21:53:55 +000051 struct intc_source *sources;
52 int nr_sources;
53 struct intc_mask_reg *mask_regs;
54 int nr_mask_regs;
55 struct intc_prio_reg *prio_regs;
56 int nr_prio_regs;
thse96e2042007-12-02 06:18:24 +000057 int pending; /* number of interrupt sources that has pending set */
balrog80f515e2007-10-04 21:53:55 +000058};
59
thse96e2042007-12-02 06:18:24 +000060int sh_intc_get_pending_vector(struct intc_desc *desc, int imask);
BALATON Zoltan9b12fb12021-10-29 23:02:09 +020061
thse96e2042007-12-02 06:18:24 +000062void sh_intc_toggle_source(struct intc_source *source,
Paolo Bonzini7d374352018-12-13 23:37:37 +010063 int enable_adj, int assert_adj);
balrog80f515e2007-10-04 21:53:55 +000064
65void sh_intc_register_sources(struct intc_desc *desc,
Paolo Bonzini7d374352018-12-13 23:37:37 +010066 struct intc_vect *vectors,
67 int nr_vectors,
68 struct intc_group *groups,
69 int nr_groups);
balrog80f515e2007-10-04 21:53:55 +000070
Benoît Canetb279e5e2011-11-17 14:23:01 +010071int sh_intc_init(MemoryRegion *sysmem,
72 struct intc_desc *desc,
Paolo Bonzini7d374352018-12-13 23:37:37 +010073 int nr_sources,
74 struct intc_mask_reg *mask_regs,
75 int nr_mask_regs,
76 struct intc_prio_reg *prio_regs,
77 int nr_prio_regs);
balrog80f515e2007-10-04 21:53:55 +000078
balrogc6d86a32008-12-07 18:49:57 +000079void sh_intc_set_irl(void *opaque, int n, int level);
80
Markus Armbruster2a6a4072016-06-29 13:47:03 +020081#endif /* SH_INTC_H */