j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU PowerPC 405 evaluation boards emulation |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 4 | * Copyright (c) 2007 Jocelyn Mayer |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 5 | * |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 24 | #include "hw.h" |
| 25 | #include "ppc.h" |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 26 | #include "ppc405.h" |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 27 | #include "nvram.h" |
| 28 | #include "flash.h" |
| 29 | #include "sysemu.h" |
| 30 | #include "block.h" |
| 31 | #include "boards.h" |
blueswir1 | 3b3fb32 | 2008-10-04 07:20:07 +0000 | [diff] [blame] | 32 | #include "qemu-log.h" |
Blue Swirl | ca20cf3 | 2009-09-20 14:58:02 +0000 | [diff] [blame] | 33 | #include "loader.h" |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 34 | |
| 35 | #define BIOS_FILENAME "ppc405_rom.bin" |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 36 | #define BIOS_SIZE (2048 * 1024) |
| 37 | |
| 38 | #define KERNEL_LOAD_ADDR 0x00000000 |
| 39 | #define INITRD_LOAD_ADDR 0x01800000 |
| 40 | |
| 41 | #define USE_FLASH_BIOS |
| 42 | |
| 43 | #define DEBUG_BOARD_INIT |
| 44 | |
| 45 | /*****************************************************************************/ |
| 46 | /* PPC405EP reference board (IBM) */ |
| 47 | /* Standalone board with: |
| 48 | * - PowerPC 405EP CPU |
| 49 | * - SDRAM (0x00000000) |
| 50 | * - Flash (0xFFF80000) |
| 51 | * - SRAM (0xFFF00000) |
| 52 | * - NVRAM (0xF0000000) |
| 53 | * - FPGA (0xF0300000) |
| 54 | */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 55 | typedef struct ref405ep_fpga_t ref405ep_fpga_t; |
| 56 | struct ref405ep_fpga_t { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 57 | uint8_t reg0; |
| 58 | uint8_t reg1; |
| 59 | }; |
| 60 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 61 | static uint32_t ref405ep_fpga_readb (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 62 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 63 | ref405ep_fpga_t *fpga; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 64 | uint32_t ret; |
| 65 | |
| 66 | fpga = opaque; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 67 | switch (addr) { |
| 68 | case 0x0: |
| 69 | ret = fpga->reg0; |
| 70 | break; |
| 71 | case 0x1: |
| 72 | ret = fpga->reg1; |
| 73 | break; |
| 74 | default: |
| 75 | ret = 0; |
| 76 | break; |
| 77 | } |
| 78 | |
| 79 | return ret; |
| 80 | } |
| 81 | |
| 82 | static void ref405ep_fpga_writeb (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 83 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 84 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 85 | ref405ep_fpga_t *fpga; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 86 | |
| 87 | fpga = opaque; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 88 | switch (addr) { |
| 89 | case 0x0: |
| 90 | /* Read only */ |
| 91 | break; |
| 92 | case 0x1: |
| 93 | fpga->reg1 = value; |
| 94 | break; |
| 95 | default: |
| 96 | break; |
| 97 | } |
| 98 | } |
| 99 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 100 | static uint32_t ref405ep_fpga_readw (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 101 | { |
| 102 | uint32_t ret; |
| 103 | |
| 104 | ret = ref405ep_fpga_readb(opaque, addr) << 8; |
| 105 | ret |= ref405ep_fpga_readb(opaque, addr + 1); |
| 106 | |
| 107 | return ret; |
| 108 | } |
| 109 | |
| 110 | static void ref405ep_fpga_writew (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 111 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 112 | { |
| 113 | ref405ep_fpga_writeb(opaque, addr, (value >> 8) & 0xFF); |
| 114 | ref405ep_fpga_writeb(opaque, addr + 1, value & 0xFF); |
| 115 | } |
| 116 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 117 | static uint32_t ref405ep_fpga_readl (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 118 | { |
| 119 | uint32_t ret; |
| 120 | |
| 121 | ret = ref405ep_fpga_readb(opaque, addr) << 24; |
| 122 | ret |= ref405ep_fpga_readb(opaque, addr + 1) << 16; |
| 123 | ret |= ref405ep_fpga_readb(opaque, addr + 2) << 8; |
| 124 | ret |= ref405ep_fpga_readb(opaque, addr + 3); |
| 125 | |
| 126 | return ret; |
| 127 | } |
| 128 | |
| 129 | static void ref405ep_fpga_writel (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 130 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 131 | { |
aurel32 | 8de2410 | 2008-12-11 22:43:07 +0000 | [diff] [blame] | 132 | ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF); |
| 133 | ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF); |
| 134 | ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 135 | ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF); |
| 136 | } |
| 137 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 138 | static CPUReadMemoryFunc * const ref405ep_fpga_read[] = { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 139 | &ref405ep_fpga_readb, |
| 140 | &ref405ep_fpga_readw, |
| 141 | &ref405ep_fpga_readl, |
| 142 | }; |
| 143 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 144 | static CPUWriteMemoryFunc * const ref405ep_fpga_write[] = { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 145 | &ref405ep_fpga_writeb, |
| 146 | &ref405ep_fpga_writew, |
| 147 | &ref405ep_fpga_writel, |
| 148 | }; |
| 149 | |
| 150 | static void ref405ep_fpga_reset (void *opaque) |
| 151 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 152 | ref405ep_fpga_t *fpga; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 153 | |
| 154 | fpga = opaque; |
| 155 | fpga->reg0 = 0x00; |
| 156 | fpga->reg1 = 0x0F; |
| 157 | } |
| 158 | |
| 159 | static void ref405ep_fpga_init (uint32_t base) |
| 160 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 161 | ref405ep_fpga_t *fpga; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 162 | int fpga_memory; |
| 163 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 164 | fpga = qemu_mallocz(sizeof(ref405ep_fpga_t)); |
Avi Kivity | 1eed09c | 2009-06-14 11:38:51 +0300 | [diff] [blame] | 165 | fpga_memory = cpu_register_io_memory(ref405ep_fpga_read, |
aliguori | 487414f | 2009-02-05 22:06:05 +0000 | [diff] [blame] | 166 | ref405ep_fpga_write, fpga); |
| 167 | cpu_register_physical_memory(base, 0x00000100, fpga_memory); |
Jan Kiszka | a08d436 | 2009-06-27 09:25:07 +0200 | [diff] [blame] | 168 | qemu_register_reset(&ref405ep_fpga_reset, fpga); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 169 | } |
| 170 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 171 | static void ref405ep_init (ram_addr_t ram_size, |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 172 | const char *boot_device, |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 173 | const char *kernel_filename, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 174 | const char *kernel_cmdline, |
| 175 | const char *initrd_filename, |
| 176 | const char *cpu_model) |
| 177 | { |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 178 | char *filename; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 179 | ppc4xx_bd_info_t bd; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 180 | CPUPPCState *env; |
| 181 | qemu_irq *pic; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 182 | ram_addr_t sram_offset, bios_offset, bdloc; |
| 183 | target_phys_addr_t ram_bases[2], ram_sizes[2]; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 184 | target_ulong sram_size, bios_size; |
| 185 | //int phy_addr = 0; |
| 186 | //static int phy_addr = 1; |
| 187 | target_ulong kernel_base, kernel_size, initrd_base, initrd_size; |
| 188 | int linux_boot; |
| 189 | int fl_idx, fl_sectors, len; |
balrog | 6ac0e82 | 2007-10-31 01:54:04 +0000 | [diff] [blame] | 190 | int ppc_boot_device = boot_device[0]; |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 191 | DriveInfo *dinfo; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 192 | |
| 193 | /* XXX: fix this */ |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 194 | ram_bases[0] = qemu_ram_alloc(0x08000000); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 195 | ram_sizes[0] = 0x08000000; |
| 196 | ram_bases[1] = 0x00000000; |
| 197 | ram_sizes[1] = 0x00000000; |
| 198 | ram_size = 128 * 1024 * 1024; |
| 199 | #ifdef DEBUG_BOARD_INIT |
| 200 | printf("%s: register cpu\n", __func__); |
| 201 | #endif |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 202 | env = ppc405ep_init(ram_bases, ram_sizes, 33333333, &pic, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 203 | kernel_filename == NULL ? 0 : 1); |
| 204 | /* allocate SRAM */ |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 205 | sram_size = 512 * 1024; |
| 206 | sram_offset = qemu_ram_alloc(sram_size); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 207 | #ifdef DEBUG_BOARD_INIT |
| 208 | printf("%s: register SRAM at offset %08lx\n", __func__, sram_offset); |
| 209 | #endif |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 210 | cpu_register_physical_memory(0xFFF00000, sram_size, |
| 211 | sram_offset | IO_MEM_RAM); |
| 212 | /* allocate and load BIOS */ |
| 213 | #ifdef DEBUG_BOARD_INIT |
| 214 | printf("%s: register BIOS\n", __func__); |
| 215 | #endif |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 216 | fl_idx = 0; |
| 217 | #ifdef USE_FLASH_BIOS |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 218 | dinfo = drive_get(IF_PFLASH, 0, fl_idx); |
| 219 | if (dinfo) { |
| 220 | bios_size = bdrv_getlength(dinfo->bdrv); |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 221 | bios_offset = qemu_ram_alloc(bios_size); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 222 | fl_sectors = (bios_size + 65535) >> 16; |
| 223 | #ifdef DEBUG_BOARD_INIT |
Blue Swirl | 90e189e | 2009-08-16 11:13:18 +0000 | [diff] [blame] | 224 | printf("Register parallel flash %d size " TARGET_FMT_lx |
| 225 | " at offset %08lx addr " TARGET_FMT_lx " '%s' %d\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 226 | fl_idx, bios_size, bios_offset, -bios_size, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 227 | bdrv_get_device_name(dinfo->bdrv), fl_sectors); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 228 | #endif |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 229 | pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 230 | dinfo->bdrv, 65536, fl_sectors, 1, |
Blue Swirl | 5f9fc5a | 2010-03-29 19:23:55 +0000 | [diff] [blame] | 231 | 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
| 232 | 1); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 233 | fl_idx++; |
| 234 | } else |
| 235 | #endif |
| 236 | { |
| 237 | #ifdef DEBUG_BOARD_INIT |
| 238 | printf("Load BIOS from file\n"); |
| 239 | #endif |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 240 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
j_mayer | 1192dad | 2007-10-05 13:08:35 +0000 | [diff] [blame] | 241 | if (bios_name == NULL) |
| 242 | bios_name = BIOS_FILENAME; |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 243 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
| 244 | if (filename) { |
| 245 | bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
| 246 | qemu_free(filename); |
| 247 | } else { |
| 248 | bios_size = -1; |
| 249 | } |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 250 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 251 | fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n", |
| 252 | bios_name); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 253 | exit(1); |
| 254 | } |
| 255 | bios_size = (bios_size + 0xfff) & ~0xfff; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 256 | cpu_register_physical_memory((uint32_t)(-bios_size), |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 257 | bios_size, bios_offset | IO_MEM_ROM); |
| 258 | } |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 259 | /* Register FPGA */ |
| 260 | #ifdef DEBUG_BOARD_INIT |
| 261 | printf("%s: register FPGA\n", __func__); |
| 262 | #endif |
| 263 | ref405ep_fpga_init(0xF0300000); |
| 264 | /* Register NVRAM */ |
| 265 | #ifdef DEBUG_BOARD_INIT |
| 266 | printf("%s: register NVRAM\n", __func__); |
| 267 | #endif |
| 268 | m48t59_init(NULL, 0xF0000000, 0, 8192, 8); |
| 269 | /* Load kernel */ |
| 270 | linux_boot = (kernel_filename != NULL); |
| 271 | if (linux_boot) { |
| 272 | #ifdef DEBUG_BOARD_INIT |
| 273 | printf("%s: load kernel\n", __func__); |
| 274 | #endif |
| 275 | memset(&bd, 0, sizeof(bd)); |
| 276 | bd.bi_memstart = 0x00000000; |
| 277 | bd.bi_memsize = ram_size; |
j_mayer | 217fae2 | 2007-10-03 01:04:20 +0000 | [diff] [blame] | 278 | bd.bi_flashstart = -bios_size; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 279 | bd.bi_flashsize = -bios_size; |
| 280 | bd.bi_flashoffset = 0; |
| 281 | bd.bi_sramstart = 0xFFF00000; |
| 282 | bd.bi_sramsize = sram_size; |
| 283 | bd.bi_bootflags = 0; |
| 284 | bd.bi_intfreq = 133333333; |
| 285 | bd.bi_busfreq = 33333333; |
| 286 | bd.bi_baudrate = 115200; |
| 287 | bd.bi_s_version[0] = 'Q'; |
| 288 | bd.bi_s_version[1] = 'M'; |
| 289 | bd.bi_s_version[2] = 'U'; |
| 290 | bd.bi_s_version[3] = '\0'; |
| 291 | bd.bi_r_version[0] = 'Q'; |
| 292 | bd.bi_r_version[1] = 'E'; |
| 293 | bd.bi_r_version[2] = 'M'; |
| 294 | bd.bi_r_version[3] = 'U'; |
| 295 | bd.bi_r_version[4] = '\0'; |
| 296 | bd.bi_procfreq = 133333333; |
| 297 | bd.bi_plb_busfreq = 33333333; |
| 298 | bd.bi_pci_busfreq = 33333333; |
| 299 | bd.bi_opbfreq = 33333333; |
j_mayer | b8d3f5d | 2007-09-26 23:55:31 +0000 | [diff] [blame] | 300 | bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 301 | env->gpr[3] = bdloc; |
| 302 | kernel_base = KERNEL_LOAD_ADDR; |
| 303 | /* now we can load the kernel */ |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 304 | kernel_size = load_image_targphys(kernel_filename, kernel_base, |
| 305 | ram_size - kernel_base); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 306 | if (kernel_size < 0) { |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 307 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 308 | kernel_filename); |
| 309 | exit(1); |
| 310 | } |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 311 | printf("Load kernel size " TARGET_FMT_ld " at " TARGET_FMT_lx, |
| 312 | kernel_size, kernel_base); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 313 | /* load initrd */ |
| 314 | if (initrd_filename) { |
| 315 | initrd_base = INITRD_LOAD_ADDR; |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 316 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
| 317 | ram_size - initrd_base); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 318 | if (initrd_size < 0) { |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 319 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 320 | initrd_filename); |
| 321 | exit(1); |
| 322 | } |
| 323 | } else { |
| 324 | initrd_base = 0; |
| 325 | initrd_size = 0; |
| 326 | } |
| 327 | env->gpr[4] = initrd_base; |
| 328 | env->gpr[5] = initrd_size; |
balrog | 6ac0e82 | 2007-10-31 01:54:04 +0000 | [diff] [blame] | 329 | ppc_boot_device = 'm'; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 330 | if (kernel_cmdline != NULL) { |
| 331 | len = strlen(kernel_cmdline); |
| 332 | bdloc -= ((len + 255) & ~255); |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 333 | cpu_physical_memory_write(bdloc, (void *)kernel_cmdline, len + 1); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 334 | env->gpr[6] = bdloc; |
| 335 | env->gpr[7] = bdloc + len; |
| 336 | } else { |
| 337 | env->gpr[6] = 0; |
| 338 | env->gpr[7] = 0; |
| 339 | } |
| 340 | env->nip = KERNEL_LOAD_ADDR; |
| 341 | } else { |
| 342 | kernel_base = 0; |
| 343 | kernel_size = 0; |
| 344 | initrd_base = 0; |
| 345 | initrd_size = 0; |
| 346 | bdloc = 0; |
| 347 | } |
| 348 | #ifdef DEBUG_BOARD_INIT |
| 349 | printf("%s: Done\n", __func__); |
| 350 | #endif |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 351 | printf("bdloc %016lx\n", (unsigned long)bdloc); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 352 | } |
| 353 | |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 354 | static QEMUMachine ref405ep_machine = { |
aliguori | 4b32e16 | 2008-10-07 20:34:35 +0000 | [diff] [blame] | 355 | .name = "ref405ep", |
| 356 | .desc = "ref405ep", |
| 357 | .init = ref405ep_init, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 358 | }; |
| 359 | |
| 360 | /*****************************************************************************/ |
| 361 | /* AMCC Taihu evaluation board */ |
| 362 | /* - PowerPC 405EP processor |
| 363 | * - SDRAM 128 MB at 0x00000000 |
| 364 | * - Boot flash 2 MB at 0xFFE00000 |
| 365 | * - Application flash 32 MB at 0xFC000000 |
| 366 | * - 2 serial ports |
| 367 | * - 2 ethernet PHY |
| 368 | * - 1 USB 1.1 device 0x50000000 |
| 369 | * - 1 LCD display 0x50100000 |
| 370 | * - 1 CPLD 0x50100000 |
| 371 | * - 1 I2C EEPROM |
| 372 | * - 1 I2C thermal sensor |
| 373 | * - a set of LEDs |
| 374 | * - bit-bang SPI port using GPIOs |
| 375 | * - 1 EBC interface connector 0 0x50200000 |
| 376 | * - 1 cardbus controller + expansion slot. |
| 377 | * - 1 PCI expansion slot. |
| 378 | */ |
| 379 | typedef struct taihu_cpld_t taihu_cpld_t; |
| 380 | struct taihu_cpld_t { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 381 | uint8_t reg0; |
| 382 | uint8_t reg1; |
| 383 | }; |
| 384 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 385 | static uint32_t taihu_cpld_readb (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 386 | { |
| 387 | taihu_cpld_t *cpld; |
| 388 | uint32_t ret; |
| 389 | |
| 390 | cpld = opaque; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 391 | switch (addr) { |
| 392 | case 0x0: |
| 393 | ret = cpld->reg0; |
| 394 | break; |
| 395 | case 0x1: |
| 396 | ret = cpld->reg1; |
| 397 | break; |
| 398 | default: |
| 399 | ret = 0; |
| 400 | break; |
| 401 | } |
| 402 | |
| 403 | return ret; |
| 404 | } |
| 405 | |
| 406 | static void taihu_cpld_writeb (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 407 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 408 | { |
| 409 | taihu_cpld_t *cpld; |
| 410 | |
| 411 | cpld = opaque; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 412 | switch (addr) { |
| 413 | case 0x0: |
| 414 | /* Read only */ |
| 415 | break; |
| 416 | case 0x1: |
| 417 | cpld->reg1 = value; |
| 418 | break; |
| 419 | default: |
| 420 | break; |
| 421 | } |
| 422 | } |
| 423 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 424 | static uint32_t taihu_cpld_readw (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 425 | { |
| 426 | uint32_t ret; |
| 427 | |
| 428 | ret = taihu_cpld_readb(opaque, addr) << 8; |
| 429 | ret |= taihu_cpld_readb(opaque, addr + 1); |
| 430 | |
| 431 | return ret; |
| 432 | } |
| 433 | |
| 434 | static void taihu_cpld_writew (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 435 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 436 | { |
| 437 | taihu_cpld_writeb(opaque, addr, (value >> 8) & 0xFF); |
| 438 | taihu_cpld_writeb(opaque, addr + 1, value & 0xFF); |
| 439 | } |
| 440 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 441 | static uint32_t taihu_cpld_readl (void *opaque, target_phys_addr_t addr) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 442 | { |
| 443 | uint32_t ret; |
| 444 | |
| 445 | ret = taihu_cpld_readb(opaque, addr) << 24; |
| 446 | ret |= taihu_cpld_readb(opaque, addr + 1) << 16; |
| 447 | ret |= taihu_cpld_readb(opaque, addr + 2) << 8; |
| 448 | ret |= taihu_cpld_readb(opaque, addr + 3); |
| 449 | |
| 450 | return ret; |
| 451 | } |
| 452 | |
| 453 | static void taihu_cpld_writel (void *opaque, |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 454 | target_phys_addr_t addr, uint32_t value) |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 455 | { |
| 456 | taihu_cpld_writel(opaque, addr, (value >> 24) & 0xFF); |
| 457 | taihu_cpld_writel(opaque, addr + 1, (value >> 16) & 0xFF); |
| 458 | taihu_cpld_writel(opaque, addr + 2, (value >> 8) & 0xFF); |
| 459 | taihu_cpld_writeb(opaque, addr + 3, value & 0xFF); |
| 460 | } |
| 461 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 462 | static CPUReadMemoryFunc * const taihu_cpld_read[] = { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 463 | &taihu_cpld_readb, |
| 464 | &taihu_cpld_readw, |
| 465 | &taihu_cpld_readl, |
| 466 | }; |
| 467 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 468 | static CPUWriteMemoryFunc * const taihu_cpld_write[] = { |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 469 | &taihu_cpld_writeb, |
| 470 | &taihu_cpld_writew, |
| 471 | &taihu_cpld_writel, |
| 472 | }; |
| 473 | |
| 474 | static void taihu_cpld_reset (void *opaque) |
| 475 | { |
| 476 | taihu_cpld_t *cpld; |
| 477 | |
| 478 | cpld = opaque; |
| 479 | cpld->reg0 = 0x01; |
| 480 | cpld->reg1 = 0x80; |
| 481 | } |
| 482 | |
| 483 | static void taihu_cpld_init (uint32_t base) |
| 484 | { |
| 485 | taihu_cpld_t *cpld; |
| 486 | int cpld_memory; |
| 487 | |
| 488 | cpld = qemu_mallocz(sizeof(taihu_cpld_t)); |
Avi Kivity | 1eed09c | 2009-06-14 11:38:51 +0300 | [diff] [blame] | 489 | cpld_memory = cpu_register_io_memory(taihu_cpld_read, |
aliguori | 487414f | 2009-02-05 22:06:05 +0000 | [diff] [blame] | 490 | taihu_cpld_write, cpld); |
| 491 | cpu_register_physical_memory(base, 0x00000100, cpld_memory); |
Jan Kiszka | a08d436 | 2009-06-27 09:25:07 +0200 | [diff] [blame] | 492 | qemu_register_reset(&taihu_cpld_reset, cpld); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 493 | } |
| 494 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 495 | static void taihu_405ep_init(ram_addr_t ram_size, |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 496 | const char *boot_device, |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 497 | const char *kernel_filename, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 498 | const char *kernel_cmdline, |
| 499 | const char *initrd_filename, |
| 500 | const char *cpu_model) |
| 501 | { |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 502 | char *filename; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 503 | CPUPPCState *env; |
| 504 | qemu_irq *pic; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 505 | ram_addr_t bios_offset; |
| 506 | target_phys_addr_t ram_bases[2], ram_sizes[2]; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 507 | target_ulong bios_size; |
| 508 | target_ulong kernel_base, kernel_size, initrd_base, initrd_size; |
| 509 | int linux_boot; |
| 510 | int fl_idx, fl_sectors; |
balrog | 6ac0e82 | 2007-10-31 01:54:04 +0000 | [diff] [blame] | 511 | int ppc_boot_device = boot_device[0]; |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 512 | DriveInfo *dinfo; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 513 | |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 514 | /* RAM is soldered to the board so the size cannot be changed */ |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 515 | ram_bases[0] = qemu_ram_alloc(0x04000000); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 516 | ram_sizes[0] = 0x04000000; |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 517 | ram_bases[1] = qemu_ram_alloc(0x04000000); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 518 | ram_sizes[1] = 0x04000000; |
pbrook | a0b753d | 2009-04-11 17:24:39 +0000 | [diff] [blame] | 519 | ram_size = 0x08000000; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 520 | #ifdef DEBUG_BOARD_INIT |
| 521 | printf("%s: register cpu\n", __func__); |
| 522 | #endif |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 523 | env = ppc405ep_init(ram_bases, ram_sizes, 33333333, &pic, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 524 | kernel_filename == NULL ? 0 : 1); |
| 525 | /* allocate and load BIOS */ |
| 526 | #ifdef DEBUG_BOARD_INIT |
| 527 | printf("%s: register BIOS\n", __func__); |
| 528 | #endif |
| 529 | fl_idx = 0; |
| 530 | #if defined(USE_FLASH_BIOS) |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 531 | dinfo = drive_get(IF_PFLASH, 0, fl_idx); |
| 532 | if (dinfo) { |
| 533 | bios_size = bdrv_getlength(dinfo->bdrv); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 534 | /* XXX: should check that size is 2MB */ |
| 535 | // bios_size = 2 * 1024 * 1024; |
| 536 | fl_sectors = (bios_size + 65535) >> 16; |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 537 | bios_offset = qemu_ram_alloc(bios_size); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 538 | #ifdef DEBUG_BOARD_INIT |
Blue Swirl | 90e189e | 2009-08-16 11:13:18 +0000 | [diff] [blame] | 539 | printf("Register parallel flash %d size " TARGET_FMT_lx |
| 540 | " at offset %08lx addr " TARGET_FMT_lx " '%s' %d\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 541 | fl_idx, bios_size, bios_offset, -bios_size, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 542 | bdrv_get_device_name(dinfo->bdrv), fl_sectors); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 543 | #endif |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 544 | pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 545 | dinfo->bdrv, 65536, fl_sectors, 1, |
Blue Swirl | 5f9fc5a | 2010-03-29 19:23:55 +0000 | [diff] [blame] | 546 | 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
| 547 | 1); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 548 | fl_idx++; |
| 549 | } else |
| 550 | #endif |
| 551 | { |
| 552 | #ifdef DEBUG_BOARD_INIT |
| 553 | printf("Load BIOS from file\n"); |
| 554 | #endif |
j_mayer | 1192dad | 2007-10-05 13:08:35 +0000 | [diff] [blame] | 555 | if (bios_name == NULL) |
| 556 | bios_name = BIOS_FILENAME; |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 557 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 558 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
| 559 | if (filename) { |
| 560 | bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); |
| 561 | } else { |
| 562 | bios_size = -1; |
| 563 | } |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 564 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 565 | fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n", |
| 566 | bios_name); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 567 | exit(1); |
| 568 | } |
| 569 | bios_size = (bios_size + 0xfff) & ~0xfff; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 570 | cpu_register_physical_memory((uint32_t)(-bios_size), |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 571 | bios_size, bios_offset | IO_MEM_ROM); |
| 572 | } |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 573 | /* Register Linux flash */ |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 574 | dinfo = drive_get(IF_PFLASH, 0, fl_idx); |
| 575 | if (dinfo) { |
| 576 | bios_size = bdrv_getlength(dinfo->bdrv); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 577 | /* XXX: should check that size is 32MB */ |
| 578 | bios_size = 32 * 1024 * 1024; |
| 579 | fl_sectors = (bios_size + 65535) >> 16; |
| 580 | #ifdef DEBUG_BOARD_INIT |
Blue Swirl | 90e189e | 2009-08-16 11:13:18 +0000 | [diff] [blame] | 581 | printf("Register parallel flash %d size " TARGET_FMT_lx |
| 582 | " at offset %08lx addr " TARGET_FMT_lx " '%s'\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 583 | fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 584 | bdrv_get_device_name(dinfo->bdrv)); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 585 | #endif |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 586 | bios_offset = qemu_ram_alloc(bios_size); |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 587 | pflash_cfi02_register(0xfc000000, bios_offset, |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 588 | dinfo->bdrv, 65536, fl_sectors, 1, |
Blue Swirl | 5f9fc5a | 2010-03-29 19:23:55 +0000 | [diff] [blame] | 589 | 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, |
| 590 | 1); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 591 | fl_idx++; |
| 592 | } |
| 593 | /* Register CLPD & LCD display */ |
| 594 | #ifdef DEBUG_BOARD_INIT |
| 595 | printf("%s: register CPLD\n", __func__); |
| 596 | #endif |
| 597 | taihu_cpld_init(0x50100000); |
| 598 | /* Load kernel */ |
| 599 | linux_boot = (kernel_filename != NULL); |
| 600 | if (linux_boot) { |
| 601 | #ifdef DEBUG_BOARD_INIT |
| 602 | printf("%s: load kernel\n", __func__); |
| 603 | #endif |
| 604 | kernel_base = KERNEL_LOAD_ADDR; |
| 605 | /* now we can load the kernel */ |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 606 | kernel_size = load_image_targphys(kernel_filename, kernel_base, |
| 607 | ram_size - kernel_base); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 608 | if (kernel_size < 0) { |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 609 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 610 | kernel_filename); |
| 611 | exit(1); |
| 612 | } |
| 613 | /* load initrd */ |
| 614 | if (initrd_filename) { |
| 615 | initrd_base = INITRD_LOAD_ADDR; |
pbrook | 5c130f6 | 2009-04-10 14:29:45 +0000 | [diff] [blame] | 616 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
| 617 | ram_size - initrd_base); |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 618 | if (initrd_size < 0) { |
| 619 | fprintf(stderr, |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 620 | "qemu: could not load initial ram disk '%s'\n", |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 621 | initrd_filename); |
| 622 | exit(1); |
| 623 | } |
| 624 | } else { |
| 625 | initrd_base = 0; |
| 626 | initrd_size = 0; |
| 627 | } |
balrog | 6ac0e82 | 2007-10-31 01:54:04 +0000 | [diff] [blame] | 628 | ppc_boot_device = 'm'; |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 629 | } else { |
| 630 | kernel_base = 0; |
| 631 | kernel_size = 0; |
| 632 | initrd_base = 0; |
| 633 | initrd_size = 0; |
| 634 | } |
| 635 | #ifdef DEBUG_BOARD_INIT |
| 636 | printf("%s: Done\n", __func__); |
| 637 | #endif |
| 638 | } |
| 639 | |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 640 | static QEMUMachine taihu_machine = { |
pbrook | b2ee0ce | 2009-04-11 17:41:32 +0000 | [diff] [blame] | 641 | .name = "taihu", |
| 642 | .desc = "taihu", |
| 643 | .init = taihu_405ep_init, |
j_mayer | 1a6c088 | 2007-04-24 07:40:49 +0000 | [diff] [blame] | 644 | }; |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 645 | |
| 646 | static void ppc405_machine_init(void) |
| 647 | { |
| 648 | qemu_register_machine(&ref405ep_machine); |
| 649 | qemu_register_machine(&taihu_machine); |
| 650 | } |
| 651 | |
| 652 | machine_init(ppc405_machine_init); |