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Edgar E. Iglesias2c50e262010-09-29 15:31:44 +02001/*
2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
3 *
4 * Copyright (c) 2010 Edgar E. Iglesias.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010025#include "hw/sysbus.h"
26#include "hw/hw.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010027#include "hw/char/serial.h"
28#include "hw/block/flash.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010029#include "sysemu/sysemu.h"
Peter Maydellbd2be152013-04-09 15:26:55 +010030#include "hw/devices.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010031#include "hw/boards.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010032#include "sysemu/device_tree.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010033#include "hw/loader.h"
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020034#include "elf.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/log.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010036#include "exec/address-spaces.h"
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020037
Paolo Bonzini0d09e412013-02-05 17:06:20 +010038#include "hw/ppc/ppc.h"
39#include "hw/ppc/ppc4xx.h"
Paolo Bonzini47b43a12013-03-18 17:36:02 +010040#include "ppc405.h"
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020041
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +020042#include "sysemu/block-backend.h"
Peter Crosthwaited5001cf2014-02-25 16:42:23 -080043#include "qapi/qmp/qerror.h"
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020044
45#define EPAPR_MAGIC (0x45504150)
46#define FLASH_SIZE (16 * 1024 * 1024)
47
Peter Crosthwaite81cce072014-02-25 16:38:54 -080048#define INTC_BASEADDR 0x81800000
49#define UART16550_BASEADDR 0x83e01003
50#define TIMER_BASEADDR 0x83c00000
51#define PFLASH_BASEADDR 0xfc000000
52
53#define TIMER_IRQ 3
54#define UART16550_IRQ 9
55
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020056static struct boot_info
57{
58 uint32_t bootstrap_pc;
59 uint32_t cmdline;
60 uint32_t fdt;
61 uint32_t ima_size;
62 void *vfdt;
63} boot_info;
64
65/* Create reset TLB entries for BookE, spanning the 32bit addr space. */
Andreas Färbere2684c02012-03-14 01:38:23 +010066static void mmubooke_create_initial_mapping(CPUPPCState *env,
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020067 target_ulong va,
Avi Kivitya8170e52012-10-23 12:30:10 +020068 hwaddr pa)
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020069{
Alexander Graf1c53acc2011-06-17 01:00:28 +020070 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020071
72 tlb->attr = 0;
73 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
Peter Maydella1f7f972014-03-17 16:00:37 +000074 tlb->size = 1U << 31; /* up to 0x80000000 */
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020075 tlb->EPN = va & TARGET_PAGE_MASK;
76 tlb->RPN = pa & TARGET_PAGE_MASK;
77 tlb->PID = 0;
78
Alexander Graf1c53acc2011-06-17 01:00:28 +020079 tlb = &env->tlb.tlbe[1];
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020080 tlb->attr = 0;
81 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
Peter Maydella1f7f972014-03-17 16:00:37 +000082 tlb->size = 1U << 31; /* up to 0xffffffff */
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020083 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
84 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
85 tlb->PID = 0;
86}
87
Andreas Färber68281692012-05-04 17:59:06 +020088static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
89 int do_init,
90 const char *cpu_model,
91 uint32_t sysclk)
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020092{
Andreas Färberd1d49382012-05-04 17:57:13 +020093 PowerPCCPU *cpu;
Andreas Färbere2684c02012-03-14 01:38:23 +010094 CPUPPCState *env;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020095 qemu_irq *irqs;
96
Andreas Färberd1d49382012-05-04 17:57:13 +020097 cpu = cpu_ppc_init(cpu_model);
98 if (cpu == NULL) {
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +020099 fprintf(stderr, "Unable to initialize CPU!\n");
100 exit(1);
101 }
Andreas Färberd1d49382012-05-04 17:57:13 +0200102 env = &cpu->env;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200103
Andreas Färbera34a92b2012-12-01 04:43:18 +0100104 ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200105
106 ppc_dcr_init(env, NULL, NULL);
107
108 /* interrupt controller */
Anthony Liguori7267c092011-08-20 22:09:37 -0500109 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200110 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
111 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
Blue Swirl49a29422010-10-13 18:41:29 +0000112 ppcuic_init(env, irqs, 0x0C0, 0, 1);
Andreas Färber68281692012-05-04 17:59:06 +0200113 return cpu;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200114}
115
116static void main_cpu_reset(void *opaque)
117{
Andreas Färberf8031482012-05-04 18:20:07 +0200118 PowerPCCPU *cpu = opaque;
119 CPUPPCState *env = &cpu->env;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200120 struct boot_info *bi = env->load_info;
121
Andreas Färberf8031482012-05-04 18:20:07 +0200122 cpu_reset(CPU(cpu));
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200123 /* Linux Kernel Parameters (passing device tree):
124 * r3: pointer to the fdt
125 * r4: 0
126 * r5: 0
127 * r6: epapr magic
128 * r7: size of IMA in bytes
129 * r8: 0
130 * r9: 0
131 */
132 env->gpr[1] = (16<<20) - 8;
133 /* Provide a device-tree. */
134 env->gpr[3] = bi->fdt;
135 env->nip = bi->bootstrap_pc;
136
137 /* Create a mapping for the kernel. */
138 mmubooke_create_initial_mapping(env, 0, 0);
139 env->gpr[6] = tswap32(EPAPR_MAGIC);
140 env->gpr[7] = bi->ima_size;
141}
142
143#define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
Avi Kivitya8170e52012-10-23 12:30:10 +0200144static int xilinx_load_device_tree(hwaddr addr,
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200145 uint32_t ramsize,
Avi Kivitya8170e52012-10-23 12:30:10 +0200146 hwaddr initrd_base,
147 hwaddr initrd_size,
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200148 const char *kernel_cmdline)
149{
150 char *path;
151 int fdt_size;
Efimov Vasilydaf285b2013-08-14 17:26:08 +0400152 void *fdt = NULL;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200153 int r;
Efimov Vasilydaf285b2013-08-14 17:26:08 +0400154 const char *dtb_filename;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200155
Efimov Vasilydaf285b2013-08-14 17:26:08 +0400156 dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
157 if (dtb_filename) {
158 fdt = load_device_tree(dtb_filename, &fdt_size);
Edgar E. Iglesias3b2e3dc2010-10-02 13:04:49 +0200159 if (!fdt) {
Efimov Vasilydaf285b2013-08-14 17:26:08 +0400160 error_report("Error while loading device tree file '%s'",
161 dtb_filename);
162 }
163 } else {
164 /* Try the local "ppc.dtb" override. */
165 fdt = load_device_tree("ppc.dtb", &fdt_size);
166 if (!fdt) {
167 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
168 if (path) {
169 fdt = load_device_tree(path, &fdt_size);
170 g_free(path);
171 }
Edgar E. Iglesias3b2e3dc2010-10-02 13:04:49 +0200172 }
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200173 }
Efimov Vasilydaf285b2013-08-14 17:26:08 +0400174 if (!fdt) {
175 return 0;
176 }
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000177
178 r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
179 initrd_base);
180 if (r < 0) {
181 error_report("couldn't set /chosen/linux,initrd-start");
182 }
183
184 r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
185 (initrd_base + initrd_size));
186 if (r < 0) {
187 error_report("couldn't set /chosen/linux,initrd-end");
188 }
189
Peter Crosthwaite5a4348d2013-11-11 18:14:41 +1000190 r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200191 if (r < 0)
192 fprintf(stderr, "couldn't set /chosen/bootargs\n");
Stefan Weile1fe50d2013-04-12 20:53:58 +0200193 cpu_physical_memory_write(addr, fdt, fdt_size);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200194 return fdt_size;
195}
196
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300197static void virtex_init(MachineState *machine)
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200198{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300199 ram_addr_t ram_size = machine->ram_size;
200 const char *cpu_model = machine->cpu_model;
201 const char *kernel_filename = machine->kernel_filename;
202 const char *kernel_cmdline = machine->kernel_cmdline;
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000203 hwaddr initrd_base = 0;
204 int initrd_size = 0;
Richard Henderson39186d82011-08-11 16:07:16 -0700205 MemoryRegion *address_space_mem = get_system_memory();
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200206 DeviceState *dev;
Andreas Färber68281692012-05-04 17:59:06 +0200207 PowerPCCPU *cpu;
Andreas Färbere2684c02012-03-14 01:38:23 +0100208 CPUPPCState *env;
Avi Kivitya8170e52012-10-23 12:30:10 +0200209 hwaddr ram_base = 0;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200210 DriveInfo *dinfo;
Avi Kivity333b13f2011-10-05 18:51:29 +0200211 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200212 qemu_irq irq[32], *cpu_irq;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200213 int kernel_size;
214 int i;
215
216 /* init CPUs */
217 if (cpu_model == NULL) {
218 cpu_model = "440-Xilinx";
219 }
220
Andreas Färber68281692012-05-04 17:59:06 +0200221 cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
222 env = &cpu->env;
Andreas Färberf8031482012-05-04 18:20:07 +0200223 qemu_register_reset(main_cpu_reset, cpu);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200224
Shreyas B. Prabhue938ba02014-07-10 17:31:03 +0530225 memory_region_allocate_system_memory(phys_ram, NULL, "ram", ram_size);
Avi Kivity333b13f2011-10-05 18:51:29 +0200226 memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200227
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200228 dinfo = drive_get(IF_PFLASH, 0, 0);
Peter Crosthwaite81cce072014-02-25 16:38:54 -0800229 pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
Markus Armbruster4be74632014-10-07 13:59:18 +0200230 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +0200231 (64 * 1024), FLASH_SIZE >> 16,
Anthony Liguori01e04512011-08-25 14:39:18 -0500232 1, 0x89, 0x18, 0x0000, 0x0, 1);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200233
234 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
Peter Crosthwaite13c9bfb2014-02-25 16:40:04 -0800235 dev = qdev_create(NULL, "xlnx.xps-intc");
236 qdev_prop_set_uint32(dev, "kind-of-intr", 0);
237 qdev_init_nofail(dev);
238 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
239 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200240 for (i = 0; i < 32; i++) {
241 irq[i] = qdev_get_gpio_in(dev, i);
242 }
243
Peter Crosthwaite81cce072014-02-25 16:38:54 -0800244 serial_mm_init(address_space_mem, UART16550_BASEADDR, 2, irq[UART16550_IRQ],
245 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200246
247 /* 2 timers at irq 2 @ 62 Mhz. */
Peter Crosthwaite29873712014-02-25 16:40:39 -0800248 dev = qdev_create(NULL, "xlnx.xps-timer");
249 qdev_prop_set_uint32(dev, "one-timer-only", 0);
250 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
251 qdev_init_nofail(dev);
252 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
253 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200254
255 if (kernel_filename) {
256 uint64_t entry, low, high;
Avi Kivitya8170e52012-10-23 12:30:10 +0200257 hwaddr boot_offset;
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200258
259 /* Boots a kernel elf binary. */
260 kernel_size = load_elf(kernel_filename, NULL, NULL,
261 &entry, &low, &high, 1, ELF_MACHINE, 0);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200262 boot_info.bootstrap_pc = entry & 0x00ffffff;
263
264 if (kernel_size < 0) {
265 boot_offset = 0x1200000;
266 /* If we failed loading ELF's try a raw image. */
267 kernel_size = load_image_targphys(kernel_filename,
268 boot_offset,
269 ram_size);
270 boot_info.bootstrap_pc = boot_offset;
271 high = boot_info.bootstrap_pc + kernel_size + 8192;
272 }
273
274 boot_info.ima_size = kernel_size;
275
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000276 /* Load initrd. */
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300277 if (machine->initrd_filename) {
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000278 initrd_base = high = ROUND_UP(high, 4);
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300279 initrd_size = load_image_targphys(machine->initrd_filename,
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000280 high, ram_size - high);
281
282 if (initrd_size < 0) {
283 error_report("couldn't load ram disk '%s'",
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300284 machine->initrd_filename);
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000285 exit(1);
286 }
287 high = ROUND_UP(high + initrd_size, 4);
288 }
289
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200290 /* Provide a device-tree. */
291 boot_info.fdt = high + (8192 * 2);
292 boot_info.fdt &= ~8191;
Edgar E. Iglesias0658aa92014-02-03 15:20:20 +0000293
294 xilinx_load_device_tree(boot_info.fdt, ram_size,
295 initrd_base, initrd_size,
296 kernel_cmdline);
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200297 }
298 env->load_info = &boot_info;
299}
300
301static QEMUMachine virtex_machine = {
302 .name = "virtex-ml507",
303 .desc = "Xilinx Virtex ML507 reference design",
304 .init = virtex_init,
Edgar E. Iglesias2c50e262010-09-29 15:31:44 +0200305};
306
307static void virtex_machine_init(void)
308{
309 qemu_register_machine(&virtex_machine);
310}
311
312machine_init(virtex_machine_init);