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Wen Congyangfae001f2012-05-07 12:04:57 +08001/*
2 * i386 memory mapping
3 *
4 * Copyright Fujitsu, Corp. 2011, 2012
5 *
6 * Authors:
7 * Wen Congyang <wency@cn.fujitsu.com>
8 *
Stefan Weilfc0608a2012-06-10 19:49:18 +00009 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
Wen Congyangfae001f2012-05-07 12:04:57 +080011 *
12 */
13
Peter Maydellb6a0aa02016-01-26 18:17:03 +000014#include "qemu/osdep.h"
Wen Congyangfae001f2012-05-07 12:04:57 +080015#include "cpu.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010016#include "sysemu/memory_mapping.h"
Wen Congyangfae001f2012-05-07 12:04:57 +080017
18/* PAE Paging or IA-32e Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +010019static void walk_pte(MemoryMappingList *list, AddressSpace *as,
20 hwaddr pte_start_addr,
Wen Congyangfae001f2012-05-07 12:04:57 +080021 int32_t a20_mask, target_ulong start_line_addr)
22{
Avi Kivitya8170e52012-10-23 12:30:10 +020023 hwaddr pte_addr, start_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +080024 uint64_t pte;
25 target_ulong start_vaddr;
26 int i;
27
28 for (i = 0; i < 512; i++) {
29 pte_addr = (pte_start_addr + i * 8) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +010030 pte = address_space_ldq(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +080031 if (!(pte & PG_PRESENT_MASK)) {
32 /* not present */
33 continue;
34 }
35
36 start_paddr = (pte & ~0xfff) & ~(0x1ULL << 63);
37 if (cpu_physical_memory_is_io(start_paddr)) {
38 /* I/O region */
39 continue;
40 }
41
Qiao Nuohanbff63472013-05-30 17:07:54 +020042 start_vaddr = start_line_addr | ((i & 0x1ff) << 12);
Wen Congyangfae001f2012-05-07 12:04:57 +080043 memory_mapping_list_add_merge_sorted(list, start_paddr,
44 start_vaddr, 1 << 12);
45 }
46}
47
48/* 32-bit Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +010049static void walk_pte2(MemoryMappingList *list, AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +020050 hwaddr pte_start_addr, int32_t a20_mask,
Wen Congyangfae001f2012-05-07 12:04:57 +080051 target_ulong start_line_addr)
52{
Avi Kivitya8170e52012-10-23 12:30:10 +020053 hwaddr pte_addr, start_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +080054 uint32_t pte;
55 target_ulong start_vaddr;
56 int i;
57
58 for (i = 0; i < 1024; i++) {
59 pte_addr = (pte_start_addr + i * 4) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +010060 pte = address_space_ldl(as, pte_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +080061 if (!(pte & PG_PRESENT_MASK)) {
62 /* not present */
63 continue;
64 }
65
66 start_paddr = pte & ~0xfff;
67 if (cpu_physical_memory_is_io(start_paddr)) {
68 /* I/O region */
69 continue;
70 }
71
72 start_vaddr = start_line_addr | ((i & 0x3ff) << 12);
73 memory_mapping_list_add_merge_sorted(list, start_paddr,
74 start_vaddr, 1 << 12);
75 }
76}
77
78/* PAE Paging or IA-32e Paging */
Stefan Weil00fdef62013-09-29 17:55:56 +020079#define PLM4_ADDR_MASK 0xffffffffff000ULL /* selects bits 51:12 */
Luiz Capitulinofbc2ed92013-05-28 14:19:22 -040080
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +010081static void walk_pde(MemoryMappingList *list, AddressSpace *as,
82 hwaddr pde_start_addr,
Wen Congyangfae001f2012-05-07 12:04:57 +080083 int32_t a20_mask, target_ulong start_line_addr)
84{
Avi Kivitya8170e52012-10-23 12:30:10 +020085 hwaddr pde_addr, pte_start_addr, start_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +080086 uint64_t pde;
87 target_ulong line_addr, start_vaddr;
88 int i;
89
90 for (i = 0; i < 512; i++) {
91 pde_addr = (pde_start_addr + i * 8) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +010092 pde = address_space_ldq(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +080093 if (!(pde & PG_PRESENT_MASK)) {
94 /* not present */
95 continue;
96 }
97
98 line_addr = start_line_addr | ((i & 0x1ff) << 21);
99 if (pde & PG_PSE_MASK) {
100 /* 2 MB page */
101 start_paddr = (pde & ~0x1fffff) & ~(0x1ULL << 63);
102 if (cpu_physical_memory_is_io(start_paddr)) {
103 /* I/O region */
104 continue;
105 }
106 start_vaddr = line_addr;
107 memory_mapping_list_add_merge_sorted(list, start_paddr,
108 start_vaddr, 1 << 21);
109 continue;
110 }
111
Luiz Capitulinofbc2ed92013-05-28 14:19:22 -0400112 pte_start_addr = (pde & PLM4_ADDR_MASK) & a20_mask;
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100113 walk_pte(list, as, pte_start_addr, a20_mask, line_addr);
Wen Congyangfae001f2012-05-07 12:04:57 +0800114 }
115}
116
117/* 32-bit Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100118static void walk_pde2(MemoryMappingList *list, AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +0200119 hwaddr pde_start_addr, int32_t a20_mask,
Wen Congyangfae001f2012-05-07 12:04:57 +0800120 bool pse)
121{
Wen Congyang6ad53bd2012-12-22 15:13:54 +0800122 hwaddr pde_addr, pte_start_addr, start_paddr, high_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800123 uint32_t pde;
124 target_ulong line_addr, start_vaddr;
125 int i;
126
127 for (i = 0; i < 1024; i++) {
128 pde_addr = (pde_start_addr + i * 4) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +0100129 pde = address_space_ldl(as, pde_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +0800130 if (!(pde & PG_PRESENT_MASK)) {
131 /* not present */
132 continue;
133 }
134
135 line_addr = (((unsigned int)i & 0x3ff) << 22);
136 if ((pde & PG_PSE_MASK) && pse) {
Wen Congyang6ad53bd2012-12-22 15:13:54 +0800137 /*
138 * 4 MB page:
139 * bits 39:32 are bits 20:13 of the PDE
140 * bit3 31:22 are bits 31:22 of the PDE
141 */
142 high_paddr = ((hwaddr)(pde & 0x1fe000) << 19);
143 start_paddr = (pde & ~0x3fffff) | high_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800144 if (cpu_physical_memory_is_io(start_paddr)) {
145 /* I/O region */
146 continue;
147 }
148 start_vaddr = line_addr;
149 memory_mapping_list_add_merge_sorted(list, start_paddr,
150 start_vaddr, 1 << 22);
151 continue;
152 }
153
154 pte_start_addr = (pde & ~0xfff) & a20_mask;
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100155 walk_pte2(list, as, pte_start_addr, a20_mask, line_addr);
Wen Congyangfae001f2012-05-07 12:04:57 +0800156 }
157}
158
159/* PAE Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100160static void walk_pdpe2(MemoryMappingList *list, AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +0200161 hwaddr pdpe_start_addr, int32_t a20_mask)
Wen Congyangfae001f2012-05-07 12:04:57 +0800162{
Avi Kivitya8170e52012-10-23 12:30:10 +0200163 hwaddr pdpe_addr, pde_start_addr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800164 uint64_t pdpe;
165 target_ulong line_addr;
166 int i;
167
168 for (i = 0; i < 4; i++) {
169 pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +0100170 pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +0800171 if (!(pdpe & PG_PRESENT_MASK)) {
172 /* not present */
173 continue;
174 }
175
176 line_addr = (((unsigned int)i & 0x3) << 30);
177 pde_start_addr = (pdpe & ~0xfff) & a20_mask;
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100178 walk_pde(list, as, pde_start_addr, a20_mask, line_addr);
Wen Congyangfae001f2012-05-07 12:04:57 +0800179 }
180}
181
182#ifdef TARGET_X86_64
183/* IA-32e Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100184static void walk_pdpe(MemoryMappingList *list, AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +0200185 hwaddr pdpe_start_addr, int32_t a20_mask,
Wen Congyangfae001f2012-05-07 12:04:57 +0800186 target_ulong start_line_addr)
187{
Avi Kivitya8170e52012-10-23 12:30:10 +0200188 hwaddr pdpe_addr, pde_start_addr, start_paddr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800189 uint64_t pdpe;
190 target_ulong line_addr, start_vaddr;
191 int i;
192
193 for (i = 0; i < 512; i++) {
194 pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +0100195 pdpe = address_space_ldq(as, pdpe_addr, MEMTXATTRS_UNSPECIFIED, NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +0800196 if (!(pdpe & PG_PRESENT_MASK)) {
197 /* not present */
198 continue;
199 }
200
201 line_addr = start_line_addr | ((i & 0x1ffULL) << 30);
202 if (pdpe & PG_PSE_MASK) {
203 /* 1 GB page */
204 start_paddr = (pdpe & ~0x3fffffff) & ~(0x1ULL << 63);
205 if (cpu_physical_memory_is_io(start_paddr)) {
206 /* I/O region */
207 continue;
208 }
209 start_vaddr = line_addr;
210 memory_mapping_list_add_merge_sorted(list, start_paddr,
211 start_vaddr, 1 << 30);
212 continue;
213 }
214
Luiz Capitulinofbc2ed92013-05-28 14:19:22 -0400215 pde_start_addr = (pdpe & PLM4_ADDR_MASK) & a20_mask;
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100216 walk_pde(list, as, pde_start_addr, a20_mask, line_addr);
Wen Congyangfae001f2012-05-07 12:04:57 +0800217 }
218}
219
220/* IA-32e Paging */
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100221static void walk_pml4e(MemoryMappingList *list, AddressSpace *as,
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300222 hwaddr pml4e_start_addr, int32_t a20_mask,
223 target_ulong start_line_addr)
Wen Congyangfae001f2012-05-07 12:04:57 +0800224{
Avi Kivitya8170e52012-10-23 12:30:10 +0200225 hwaddr pml4e_addr, pdpe_start_addr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800226 uint64_t pml4e;
227 target_ulong line_addr;
228 int i;
229
230 for (i = 0; i < 512; i++) {
231 pml4e_addr = (pml4e_start_addr + i * 8) & a20_mask;
Peter Maydell42874d32015-04-26 16:49:24 +0100232 pml4e = address_space_ldq(as, pml4e_addr, MEMTXATTRS_UNSPECIFIED,
233 NULL);
Wen Congyangfae001f2012-05-07 12:04:57 +0800234 if (!(pml4e & PG_PRESENT_MASK)) {
235 /* not present */
236 continue;
237 }
238
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300239 line_addr = start_line_addr | ((i & 0x1ffULL) << 39);
Luiz Capitulinofbc2ed92013-05-28 14:19:22 -0400240 pdpe_start_addr = (pml4e & PLM4_ADDR_MASK) & a20_mask;
Edgar E. Iglesiasfdfba1a2013-11-15 14:46:38 +0100241 walk_pdpe(list, as, pdpe_start_addr, a20_mask, line_addr);
Wen Congyangfae001f2012-05-07 12:04:57 +0800242 }
243}
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300244
245static void walk_pml5e(MemoryMappingList *list, AddressSpace *as,
246 hwaddr pml5e_start_addr, int32_t a20_mask)
247{
248 hwaddr pml5e_addr, pml4e_start_addr;
249 uint64_t pml5e;
250 target_ulong line_addr;
251 int i;
252
253 for (i = 0; i < 512; i++) {
254 pml5e_addr = (pml5e_start_addr + i * 8) & a20_mask;
255 pml5e = address_space_ldq(as, pml5e_addr, MEMTXATTRS_UNSPECIFIED,
256 NULL);
257 if (!(pml5e & PG_PRESENT_MASK)) {
258 /* not present */
259 continue;
260 }
261
262 line_addr = (0x7fULL << 57) | ((i & 0x1ffULL) << 48);
263 pml4e_start_addr = (pml5e & PLM4_ADDR_MASK) & a20_mask;
264 walk_pml4e(list, as, pml4e_start_addr, a20_mask, line_addr);
265 }
266}
Wen Congyangfae001f2012-05-07 12:04:57 +0800267#endif
268
Andreas Färbera23bbfd2013-05-28 13:52:01 +0200269void x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
270 Error **errp)
Wen Congyangfae001f2012-05-07 12:04:57 +0800271{
Andreas Färbera23bbfd2013-05-28 13:52:01 +0200272 X86CPU *cpu = X86_CPU(cs);
273 CPUX86State *env = &cpu->env;
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200274 int32_t a20_mask;
Andreas Färbera23bbfd2013-05-28 13:52:01 +0200275
276 if (!cpu_paging_enabled(cs)) {
Wen Congyangfae001f2012-05-07 12:04:57 +0800277 /* paging is disabled */
Andreas Färbera23bbfd2013-05-28 13:52:01 +0200278 return;
Wen Congyangfae001f2012-05-07 12:04:57 +0800279 }
280
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200281 a20_mask = x86_get_a20_mask(env);
Wen Congyangfae001f2012-05-07 12:04:57 +0800282 if (env->cr[4] & CR4_PAE_MASK) {
283#ifdef TARGET_X86_64
284 if (env->hflags & HF_LMA_MASK) {
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300285 if (env->cr[4] & CR4_LA57_MASK) {
286 hwaddr pml5e_addr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800287
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200288 pml5e_addr = (env->cr[3] & PLM4_ADDR_MASK) & a20_mask;
289 walk_pml5e(list, cs->as, pml5e_addr, a20_mask);
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300290 } else {
291 hwaddr pml4e_addr;
292
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200293 pml4e_addr = (env->cr[3] & PLM4_ADDR_MASK) & a20_mask;
294 walk_pml4e(list, cs->as, pml4e_addr, a20_mask,
Kirill A. Shutemov6c7c3c22016-12-15 03:13:05 +0300295 0xffffULL << 48);
296 }
Wen Congyangfae001f2012-05-07 12:04:57 +0800297 } else
298#endif
299 {
Avi Kivitya8170e52012-10-23 12:30:10 +0200300 hwaddr pdpe_addr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800301
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200302 pdpe_addr = (env->cr[3] & ~0x1f) & a20_mask;
303 walk_pdpe2(list, cs->as, pdpe_addr, a20_mask);
Wen Congyangfae001f2012-05-07 12:04:57 +0800304 }
305 } else {
Avi Kivitya8170e52012-10-23 12:30:10 +0200306 hwaddr pde_addr;
Wen Congyangfae001f2012-05-07 12:04:57 +0800307 bool pse;
308
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200309 pde_addr = (env->cr[3] & ~0xfff) & a20_mask;
Wen Congyangfae001f2012-05-07 12:04:57 +0800310 pse = !!(env->cr[4] & CR4_PSE_MASK);
Paolo Bonzinic8bc83a2017-05-11 13:35:28 +0200311 walk_pde2(list, cs->as, pde_addr, a20_mask, pse);
Wen Congyangfae001f2012-05-07 12:04:57 +0800312 }
Wen Congyangfae001f2012-05-07 12:04:57 +0800313}
Wen Congyang31a22072012-05-07 12:05:42 +0800314