blob: 033bcc95767131f8ada30993700f0a64ecb2eca1 [file] [log] [blame]
Markus Armbruster2a6a4072016-06-29 13:47:03 +02001#ifndef QEMU_ELF_H
2#define QEMU_ELF_H
bellard31e31b82003-02-18 22:55:36 +00003
bellard88570522003-04-07 21:32:32 +00004/* 32-bit ELF base types. */
5typedef uint32_t Elf32_Addr;
bellard31e31b82003-02-18 22:55:36 +00006typedef uint16_t Elf32_Half;
7typedef uint32_t Elf32_Off;
8typedef int32_t Elf32_Sword;
9typedef uint32_t Elf32_Word;
10
bellard88570522003-04-07 21:32:32 +000011/* 64-bit ELF base types. */
12typedef uint64_t Elf64_Addr;
13typedef uint16_t Elf64_Half;
14typedef int16_t Elf64_SHalf;
15typedef uint64_t Elf64_Off;
16typedef int32_t Elf64_Sword;
17typedef uint32_t Elf64_Word;
18typedef uint64_t Elf64_Xword;
19typedef int64_t Elf64_Sxword;
20
bellard31e31b82003-02-18 22:55:36 +000021/* These constants are for the segment types stored in the image headers */
22#define PT_NULL 0
23#define PT_LOAD 1
24#define PT_DYNAMIC 2
25#define PT_INTERP 3
26#define PT_NOTE 4
27#define PT_SHLIB 5
28#define PT_PHDR 6
Richard Henderson069175b2020-10-21 10:37:40 -070029#define PT_LOOS 0x60000000
30#define PT_HIOS 0x6fffffff
bellard31e31b82003-02-18 22:55:36 +000031#define PT_LOPROC 0x70000000
32#define PT_HIPROC 0x7fffffff
Stefan Markovica3251972018-10-05 16:38:46 +020033
Richard Henderson069175b2020-10-21 10:37:40 -070034#define PT_GNU_PROPERTY (PT_LOOS + 0x474e553)
35
Stefan Markovica3251972018-10-05 16:38:46 +020036#define PT_MIPS_REGINFO 0x70000000
37#define PT_MIPS_RTPROC 0x70000001
38#define PT_MIPS_OPTIONS 0x70000002
39#define PT_MIPS_ABIFLAGS 0x70000003
bellard88570522003-04-07 21:32:32 +000040
41/* Flags in the e_flags field of the header */
bellard6af0bf92005-07-02 14:58:51 +000042/* MIPS architecture level. */
YunQiang Su45506bd2018-02-20 18:33:07 +010043#define EF_MIPS_ARCH 0xf0000000
44
45/* Legal values for MIPS architecture level. */
bellard6af0bf92005-07-02 14:58:51 +000046#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
47#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
48#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
49#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
50#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
51#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
52#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
YunQiang Su45506bd2018-02-20 18:33:07 +010053#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32r2 code. */
54#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64r2 code. */
55#define EF_MIPS_ARCH_32R6 0x90000000 /* MIPS32r6 code. */
56#define EF_MIPS_ARCH_64R6 0xa0000000 /* MIPS64r6 code. */
bellard6af0bf92005-07-02 14:58:51 +000057
58/* The ABI of a file. */
59#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
60#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
61
bellard88570522003-04-07 21:32:32 +000062#define EF_MIPS_NOREORDER 0x00000001
63#define EF_MIPS_PIC 0x00000002
64#define EF_MIPS_CPIC 0x00000004
bellard6af0bf92005-07-02 14:58:51 +000065#define EF_MIPS_ABI2 0x00000020
66#define EF_MIPS_OPTIONS_FIRST 0x00000080
67#define EF_MIPS_32BITMODE 0x00000100
68#define EF_MIPS_ABI 0x0000f000
Aleksandar Markovic52d4c8e2016-06-10 11:57:32 +020069#define EF_MIPS_FP64 0x00000200
70#define EF_MIPS_NAN2008 0x00000400
bellard31e31b82003-02-18 22:55:36 +000071
Aleksandar Markovicc20eafa2018-08-02 16:15:58 +020072/* MIPS machine variant */
73#define EF_MIPS_MACH_NONE 0x00000000 /* A standard MIPS implementation */
74#define EF_MIPS_MACH_3900 0x00810000 /* Toshiba R3900 */
75#define EF_MIPS_MACH_4010 0x00820000 /* LSI R4010 */
76#define EF_MIPS_MACH_4100 0x00830000 /* NEC VR4100 */
77#define EF_MIPS_MACH_4650 0x00850000 /* MIPS R4650 */
78#define EF_MIPS_MACH_4120 0x00870000 /* NEC VR4120 */
79#define EF_MIPS_MACH_4111 0x00880000 /* NEC VR4111/VR4181 */
80#define EF_MIPS_MACH_SB1 0x008a0000 /* Broadcom SB-1 */
81#define EF_MIPS_MACH_OCTEON 0x008b0000 /* Cavium Networks Octeon */
82#define EF_MIPS_MACH_XLR 0x008c0000 /* RMI Xlr */
83#define EF_MIPS_MACH_OCTEON2 0x008d0000 /* Cavium Networks Octeon2 */
84#define EF_MIPS_MACH_OCTEON3 0x008e0000 /* Cavium Networks Octeon3 */
85#define EF_MIPS_MACH_5400 0x00910000 /* NEC VR5400 */
Fredrik Noringf0a997c2018-10-18 18:08:46 +020086#define EF_MIPS_MACH_5900 0x00920000 /* Toshiba/Sony R5900 */
Aleksandar Markovicc20eafa2018-08-02 16:15:58 +020087#define EF_MIPS_MACH_5500 0x00980000 /* NEC VR5500 */
Fredrik Noringf0a997c2018-10-18 18:08:46 +020088#define EF_MIPS_MACH_9000 0x00990000 /* PMC-Sierra RM9000 */
Aleksandar Markovicc20eafa2018-08-02 16:15:58 +020089#define EF_MIPS_MACH_LS2E 0x00a00000 /* ST Microelectronics Loongson 2E */
90#define EF_MIPS_MACH_LS2F 0x00a10000 /* ST Microelectronics Loongson 2F */
91#define EF_MIPS_MACH_LS3A 0x00a20000 /* ST Microelectronics Loongson 3A */
92#define EF_MIPS_MACH 0x00ff0000 /* EF_MIPS_MACH_xxx selection mask */
93
Stefan Markovic3f8e8ac2018-10-26 15:28:07 +020094#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */
95
Stefan Markovic967a1102018-10-05 16:58:45 +020096#define MIPS_ABI_FP_ANY 0x0 /* FP ABI doesn't matter */
97#define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float */
98#define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float */
99#define MIPS_ABI_FP_SOFT 0x3 /* -msoft-float */
100#define MIPS_ABI_FP_OLD_64 0x4 /* -mips32r2 -mfp64 */
101#define MIPS_ABI_FP_XX 0x5 /* -mfpxx */
102#define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 */
103#define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spreg */
Aleksandar Markovicc20eafa2018-08-02 16:15:58 +0200104
Stefan Markovice4615582018-10-05 17:06:35 +0200105typedef struct mips_elf_abiflags_v0 {
106 uint16_t version; /* Version of flags structure */
107 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
108 uint8_t isa_rev; /* The revision of ISA: */
109 /* - 0 for MIPS V and below, */
110 /* - 1-n otherwise. */
111 uint8_t gpr_size; /* The size of general purpose registers */
112 uint8_t cpr1_size; /* The size of co-processor 1 registers */
113 uint8_t cpr2_size; /* The size of co-processor 2 registers */
114 uint8_t fp_abi; /* The floating-point ABI */
115 uint32_t isa_ext; /* Mask of processor-specific extensions */
116 uint32_t ases; /* Mask of ASEs used */
117 uint32_t flags1; /* Mask of general flags */
118 uint32_t flags2;
119} Mips_elf_abiflags_v0;
120
bellard31e31b82003-02-18 22:55:36 +0000121/* These constants define the different elf file types */
122#define ET_NONE 0
123#define ET_REL 1
124#define ET_EXEC 2
125#define ET_DYN 3
126#define ET_CORE 4
bellard88570522003-04-07 21:32:32 +0000127#define ET_LOPROC 0xff00
128#define ET_HIPROC 0xffff
bellard31e31b82003-02-18 22:55:36 +0000129
130/* These constants define the various ELF target machines */
131#define EM_NONE 0
132#define EM_M32 1
133#define EM_SPARC 2
134#define EM_386 3
135#define EM_68K 4
136#define EM_88K 5
137#define EM_486 6 /* Perhaps disused */
138#define EM_860 7
139
140#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
141
142#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
143
bellard31e31b82003-02-18 22:55:36 +0000144#define EM_PARISC 15 /* HPPA */
145
146#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
147
148#define EM_PPC 20 /* PowerPC */
bellard88570522003-04-07 21:32:32 +0000149#define EM_PPC64 21 /* PowerPC64 */
150
151#define EM_ARM 40 /* ARM */
152
153#define EM_SH 42 /* SuperH */
154
155#define EM_SPARCV9 43 /* SPARC v9 64-bit */
156
Bastian Koppelmann48e06fe2014-09-01 12:59:46 +0100157#define EM_TRICORE 44 /* Infineon TriCore */
158
bellard88570522003-04-07 21:32:32 +0000159#define EM_IA_64 50 /* HP/Intel IA-64 */
160
161#define EM_X86_64 62 /* AMD x86-64 */
162
163#define EM_S390 22 /* IBM S/390 */
164
165#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
166
Philippe Mathieu-Daudé7dd8f6f2020-01-24 01:51:25 +0100167#define EM_AVR 83 /* AVR 8-bit microcontroller */
168
bellard88570522003-04-07 21:32:32 +0000169#define EM_V850 87 /* NEC v850 */
170
171#define EM_H8_300H 47 /* Hitachi H8/300H */
172#define EM_H8S 48 /* Hitachi H8S */
Michael Walle81ea0e12011-02-17 23:45:02 +0100173#define EM_LATTICEMICO32 138 /* LatticeMico32 */
bellard31e31b82003-02-18 22:55:36 +0000174
Jia Liue67db062012-07-20 15:50:39 +0800175#define EM_OPENRISC 92 /* OpenCores OpenRISC */
176
Taylor Simpson560f5a12021-02-07 23:45:53 -0600177#define EM_HEXAGON 164 /* Qualcomm Hexagon */
Markus Armbruster43692232021-05-03 10:40:34 +0200178
Yoshinori Satod06edec2020-08-14 22:14:38 +0900179#define EM_RX 173 /* Renesas RX family */
180
Michael Clarkf71a8ea2018-03-03 01:31:09 +1300181#define EM_RISCV 243 /* RISC-V */
182
Aleksandar Rikalo2a94de02018-08-13 17:34:05 +0200183#define EM_NANOMIPS 249 /* Wave Computing nanoMIPS */
184
bellard31e31b82003-02-18 22:55:36 +0000185/*
186 * This is an interim value that we will use until the committee comes
187 * up with a final number.
188 */
189#define EM_ALPHA 0x9026
190
bellard88570522003-04-07 21:32:32 +0000191/* Bogus old v850 magic number, used by old tools. */
192#define EM_CYGNUS_V850 0x9080
193
194/*
195 * This is the old interim value for S/390 architecture
196 */
197#define EM_S390_OLD 0xA390
bellard31e31b82003-02-18 22:55:36 +0000198
Marek Vasuta0a839b2017-01-18 23:01:42 +0100199#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
200
Edgar E. Iglesias0d5d4692010-05-19 15:24:17 +0200201#define EM_MICROBLAZE 189
202#define EM_MICROBLAZE_OLD 0xBAAB
Edgar E. Iglesiasb779e292009-05-20 21:31:33 +0200203
Max Filippov23288262011-09-06 03:55:25 +0400204#define EM_XTENSA 94 /* Tensilica Xtensa */
205
Claudio Fontana1d256772013-06-12 16:20:22 +0100206#define EM_AARCH64 183
207
Philippe Mathieu-Daudé7dd8f6f2020-01-24 01:51:25 +0100208#define EF_AVR_MACH 0x7F /* Mask for AVR e_flags to get core type */
209
bellard31e31b82003-02-18 22:55:36 +0000210/* This is the info that is needed to parse the dynamic section of the file */
211#define DT_NULL 0
212#define DT_NEEDED 1
213#define DT_PLTRELSZ 2
214#define DT_PLTGOT 3
215#define DT_HASH 4
216#define DT_STRTAB 5
217#define DT_SYMTAB 6
218#define DT_RELA 7
219#define DT_RELASZ 8
220#define DT_RELAENT 9
221#define DT_STRSZ 10
222#define DT_SYMENT 11
223#define DT_INIT 12
224#define DT_FINI 13
225#define DT_SONAME 14
226#define DT_RPATH 15
227#define DT_SYMBOLIC 16
228#define DT_REL 17
229#define DT_RELSZ 18
230#define DT_RELENT 19
231#define DT_PLTREL 20
232#define DT_DEBUG 21
233#define DT_TEXTREL 22
234#define DT_JMPREL 23
Richard Hendersone167d462010-07-27 10:25:28 -0700235#define DT_BINDNOW 24
236#define DT_INIT_ARRAY 25
237#define DT_FINI_ARRAY 26
238#define DT_INIT_ARRAYSZ 27
239#define DT_FINI_ARRAYSZ 28
240#define DT_RUNPATH 29
241#define DT_FLAGS 30
242#define DT_LOOS 0x6000000d
243#define DT_HIOS 0x6ffff000
bellard31e31b82003-02-18 22:55:36 +0000244#define DT_LOPROC 0x70000000
245#define DT_HIPROC 0x7fffffff
Richard Hendersone167d462010-07-27 10:25:28 -0700246
247/* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use
248 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */
249#define DT_VALRNGLO 0x6ffffd00
250#define DT_VALRNGHI 0x6ffffdff
251
252/* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use
253 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */
254#define DT_ADDRRNGLO 0x6ffffe00
255#define DT_ADDRRNGHI 0x6ffffeff
256
257#define DT_VERSYM 0x6ffffff0
258#define DT_RELACOUNT 0x6ffffff9
259#define DT_RELCOUNT 0x6ffffffa
260#define DT_FLAGS_1 0x6ffffffb
261#define DT_VERDEF 0x6ffffffc
262#define DT_VERDEFNUM 0x6ffffffd
263#define DT_VERNEED 0x6ffffffe
264#define DT_VERNEEDNUM 0x6fffffff
265
bellard88570522003-04-07 21:32:32 +0000266#define DT_MIPS_RLD_VERSION 0x70000001
267#define DT_MIPS_TIME_STAMP 0x70000002
268#define DT_MIPS_ICHECKSUM 0x70000003
269#define DT_MIPS_IVERSION 0x70000004
270#define DT_MIPS_FLAGS 0x70000005
271 #define RHF_NONE 0
272 #define RHF_HARDWAY 1
273 #define RHF_NOTPOT 2
274#define DT_MIPS_BASE_ADDRESS 0x70000006
275#define DT_MIPS_CONFLICT 0x70000008
276#define DT_MIPS_LIBLIST 0x70000009
277#define DT_MIPS_LOCAL_GOTNO 0x7000000a
278#define DT_MIPS_CONFLICTNO 0x7000000b
279#define DT_MIPS_LIBLISTNO 0x70000010
280#define DT_MIPS_SYMTABNO 0x70000011
281#define DT_MIPS_UNREFEXTNO 0x70000012
282#define DT_MIPS_GOTSYM 0x70000013
283#define DT_MIPS_HIPAGENO 0x70000014
284#define DT_MIPS_RLD_MAP 0x70000016
bellard31e31b82003-02-18 22:55:36 +0000285
286/* This info is needed when parsing the symbol table */
287#define STB_LOCAL 0
288#define STB_GLOBAL 1
289#define STB_WEAK 2
290
291#define STT_NOTYPE 0
292#define STT_OBJECT 1
293#define STT_FUNC 2
294#define STT_SECTION 3
295#define STT_FILE 4
296
bellard88570522003-04-07 21:32:32 +0000297#define ELF_ST_BIND(x) ((x) >> 4)
298#define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf)
Richard Henderson813da622012-03-19 12:25:11 -0700299#define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf))
bellard88570522003-04-07 21:32:32 +0000300#define ELF32_ST_BIND(x) ELF_ST_BIND(x)
301#define ELF32_ST_TYPE(x) ELF_ST_TYPE(x)
302#define ELF64_ST_BIND(x) ELF_ST_BIND(x)
303#define ELF64_ST_TYPE(x) ELF_ST_TYPE(x)
bellard31e31b82003-02-18 22:55:36 +0000304
305/* Symbolic values for the entries in the auxiliary table
306 put on the initial stack */
307#define AT_NULL 0 /* end of vector */
308#define AT_IGNORE 1 /* entry should be ignored */
309#define AT_EXECFD 2 /* file descriptor of program */
310#define AT_PHDR 3 /* program headers for program */
311#define AT_PHENT 4 /* size of program header entry */
312#define AT_PHNUM 5 /* number of program headers */
313#define AT_PAGESZ 6 /* system page size */
314#define AT_BASE 7 /* base address of interpreter */
315#define AT_FLAGS 8 /* flags */
316#define AT_ENTRY 9 /* entry point of program */
317#define AT_NOTELF 10 /* program is not ELF */
318#define AT_UID 11 /* real uid */
319#define AT_EUID 12 /* effective uid */
320#define AT_GID 13 /* real gid */
321#define AT_EGID 14 /* effective gid */
bellard88570522003-04-07 21:32:32 +0000322#define AT_PLATFORM 15 /* string identifying CPU for optimizations */
323#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */
324#define AT_CLKTCK 17 /* frequency at which times() increments */
Richard Hendersone167d462010-07-27 10:25:28 -0700325#define AT_FPUCW 18 /* info about fpu initialization by kernel */
326#define AT_DCACHEBSIZE 19 /* data cache block size */
327#define AT_ICACHEBSIZE 20 /* instruction cache block size */
328#define AT_UCACHEBSIZE 21 /* unified cache block size */
329#define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */
330#define AT_SECURE 23 /* boolean, was exec suid-like? */
331#define AT_BASE_PLATFORM 24 /* string identifying real platforms */
332#define AT_RANDOM 25 /* address of 16 random bytes */
Peter Maydellad6919d2014-05-02 14:45:15 +0100333#define AT_HWCAP2 26 /* extension of AT_HWCAP */
Richard Hendersone167d462010-07-27 10:25:28 -0700334#define AT_EXECFN 31 /* filename of the executable */
335#define AT_SYSINFO 32 /* address of kernel entry point */
336#define AT_SYSINFO_EHDR 33 /* address of kernel vdso */
337#define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */
338#define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */
339#define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */
340#define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */
bellard31e31b82003-02-18 22:55:36 +0000341
342typedef struct dynamic{
343 Elf32_Sword d_tag;
344 union{
345 Elf32_Sword d_val;
346 Elf32_Addr d_ptr;
347 } d_un;
348} Elf32_Dyn;
349
350typedef struct {
bellard88570522003-04-07 21:32:32 +0000351 Elf64_Sxword d_tag; /* entry tag value */
bellard31e31b82003-02-18 22:55:36 +0000352 union {
bellard88570522003-04-07 21:32:32 +0000353 Elf64_Xword d_val;
354 Elf64_Addr d_ptr;
bellard31e31b82003-02-18 22:55:36 +0000355 } d_un;
356} Elf64_Dyn;
357
358/* The following are used with relocations */
359#define ELF32_R_SYM(x) ((x) >> 8)
360#define ELF32_R_TYPE(x) ((x) & 0xff)
361
bellard88570522003-04-07 21:32:32 +0000362#define ELF64_R_SYM(i) ((i) >> 32)
363#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
bellard74ccb342006-07-18 21:23:34 +0000364#define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
bellard88570522003-04-07 21:32:32 +0000365
bellard31e31b82003-02-18 22:55:36 +0000366#define R_386_NONE 0
367#define R_386_32 1
368#define R_386_PC32 2
369#define R_386_GOT32 3
370#define R_386_PLT32 4
371#define R_386_COPY 5
372#define R_386_GLOB_DAT 6
373#define R_386_JMP_SLOT 7
374#define R_386_RELATIVE 8
375#define R_386_GOTOFF 9
376#define R_386_GOTPC 10
377#define R_386_NUM 11
Richard Hendersonf75b56c2010-02-06 11:47:58 -0800378/* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */
379#define R_386_PC8 23
bellard31e31b82003-02-18 22:55:36 +0000380
bellard88570522003-04-07 21:32:32 +0000381#define R_MIPS_NONE 0
382#define R_MIPS_16 1
383#define R_MIPS_32 2
384#define R_MIPS_REL32 3
385#define R_MIPS_26 4
386#define R_MIPS_HI16 5
387#define R_MIPS_LO16 6
388#define R_MIPS_GPREL16 7
389#define R_MIPS_LITERAL 8
390#define R_MIPS_GOT16 9
391#define R_MIPS_PC16 10
392#define R_MIPS_CALL16 11
393#define R_MIPS_GPREL32 12
394/* The remaining relocs are defined on Irix, although they are not
395 in the MIPS ELF ABI. */
396#define R_MIPS_UNUSED1 13
397#define R_MIPS_UNUSED2 14
398#define R_MIPS_UNUSED3 15
399#define R_MIPS_SHIFT5 16
400#define R_MIPS_SHIFT6 17
401#define R_MIPS_64 18
402#define R_MIPS_GOT_DISP 19
403#define R_MIPS_GOT_PAGE 20
404#define R_MIPS_GOT_OFST 21
405/*
406 * The following two relocation types are specified in the MIPS ABI
407 * conformance guide version 1.2 but not yet in the psABI.
408 */
409#define R_MIPS_GOTHI16 22
410#define R_MIPS_GOTLO16 23
411#define R_MIPS_SUB 24
412#define R_MIPS_INSERT_A 25
413#define R_MIPS_INSERT_B 26
414#define R_MIPS_DELETE 27
415#define R_MIPS_HIGHER 28
416#define R_MIPS_HIGHEST 29
417/*
418 * The following two relocation types are specified in the MIPS ABI
419 * conformance guide version 1.2 but not yet in the psABI.
420 */
421#define R_MIPS_CALLHI16 30
422#define R_MIPS_CALLLO16 31
423/*
424 * This range is reserved for vendor specific relocations.
425 */
426#define R_MIPS_LOVENDOR 100
427#define R_MIPS_HIVENDOR 127
428
429
Richard Hendersoncb1977d2012-03-24 10:47:39 -0700430/* SUN SPARC specific definitions. */
431
432/* Values for Elf64_Ehdr.e_flags. */
433
434#define EF_SPARCV9_MM 3
435#define EF_SPARCV9_TSO 0
436#define EF_SPARCV9_PSO 1
437#define EF_SPARCV9_RMO 2
438#define EF_SPARC_LEDATA 0x800000 /* little endian data */
439#define EF_SPARC_EXT_MASK 0xFFFF00
440#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
441#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
442#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
443#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
444
bellard88570522003-04-07 21:32:32 +0000445/*
446 * Sparc ELF relocation types
447 */
448#define R_SPARC_NONE 0
449#define R_SPARC_8 1
450#define R_SPARC_16 2
451#define R_SPARC_32 3
452#define R_SPARC_DISP8 4
453#define R_SPARC_DISP16 5
454#define R_SPARC_DISP32 6
455#define R_SPARC_WDISP30 7
456#define R_SPARC_WDISP22 8
457#define R_SPARC_HI22 9
458#define R_SPARC_22 10
459#define R_SPARC_13 11
460#define R_SPARC_LO10 12
461#define R_SPARC_GOT10 13
462#define R_SPARC_GOT13 14
463#define R_SPARC_GOT22 15
464#define R_SPARC_PC10 16
465#define R_SPARC_PC22 17
466#define R_SPARC_WPLT30 18
467#define R_SPARC_COPY 19
468#define R_SPARC_GLOB_DAT 20
469#define R_SPARC_JMP_SLOT 21
470#define R_SPARC_RELATIVE 22
471#define R_SPARC_UA32 23
472#define R_SPARC_PLT32 24
473#define R_SPARC_HIPLT22 25
474#define R_SPARC_LOPLT10 26
475#define R_SPARC_PCPLT32 27
476#define R_SPARC_PCPLT22 28
477#define R_SPARC_PCPLT10 29
478#define R_SPARC_10 30
479#define R_SPARC_11 31
480#define R_SPARC_64 32
bellard74ccb342006-07-18 21:23:34 +0000481#define R_SPARC_OLO10 33
thsb80029c2007-02-10 21:31:43 +0000482#define R_SPARC_HH22 34
483#define R_SPARC_HM10 35
484#define R_SPARC_LM22 36
bellard88570522003-04-07 21:32:32 +0000485#define R_SPARC_WDISP16 40
486#define R_SPARC_WDISP19 41
487#define R_SPARC_7 43
488#define R_SPARC_5 44
489#define R_SPARC_6 45
490
Richard Henderson41d9ea82013-06-07 07:26:20 -0700491/* Bits present in AT_HWCAP for ARM. */
492
493#define HWCAP_ARM_SWP (1 << 0)
494#define HWCAP_ARM_HALF (1 << 1)
495#define HWCAP_ARM_THUMB (1 << 2)
496#define HWCAP_ARM_26BIT (1 << 3)
497#define HWCAP_ARM_FAST_MULT (1 << 4)
498#define HWCAP_ARM_FPA (1 << 5)
499#define HWCAP_ARM_VFP (1 << 6)
500#define HWCAP_ARM_EDSP (1 << 7)
501#define HWCAP_ARM_JAVA (1 << 8)
502#define HWCAP_ARM_IWMMXT (1 << 9)
503#define HWCAP_ARM_CRUNCH (1 << 10)
504#define HWCAP_ARM_THUMBEE (1 << 11)
505#define HWCAP_ARM_NEON (1 << 12)
506#define HWCAP_ARM_VFPv3 (1 << 13)
507#define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
508#define HWCAP_ARM_TLS (1 << 15)
509#define HWCAP_ARM_VFPv4 (1 << 16)
510#define HWCAP_ARM_IDIVA (1 << 17)
511#define HWCAP_ARM_IDIVT (1 << 18)
512#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
513#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */
514#define HWCAP_LPAE (1 << 20)
515
Richard Hendersoncd629de2013-06-04 11:37:17 -0700516/* Bits present in AT_HWCAP for PowerPC. */
517
518#define PPC_FEATURE_32 0x80000000
519#define PPC_FEATURE_64 0x40000000
520#define PPC_FEATURE_601_INSTR 0x20000000
521#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
522#define PPC_FEATURE_HAS_FPU 0x08000000
523#define PPC_FEATURE_HAS_MMU 0x04000000
524#define PPC_FEATURE_HAS_4xxMAC 0x02000000
525#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
526#define PPC_FEATURE_HAS_SPE 0x00800000
527#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
528#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
529#define PPC_FEATURE_NO_TB 0x00100000
530#define PPC_FEATURE_POWER4 0x00080000
531#define PPC_FEATURE_POWER5 0x00040000
532#define PPC_FEATURE_POWER5_PLUS 0x00020000
533#define PPC_FEATURE_CELL 0x00010000
534#define PPC_FEATURE_BOOKE 0x00008000
535#define PPC_FEATURE_SMT 0x00004000
536#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
537#define PPC_FEATURE_ARCH_2_05 0x00001000
538#define PPC_FEATURE_PA6T 0x00000800
539#define PPC_FEATURE_HAS_DFP 0x00000400
540#define PPC_FEATURE_POWER6_EXT 0x00000200
541#define PPC_FEATURE_ARCH_2_06 0x00000100
542#define PPC_FEATURE_HAS_VSX 0x00000080
543
544#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
545 0x00000040
546
547#define PPC_FEATURE_TRUE_LE 0x00000002
548#define PPC_FEATURE_PPC_LE 0x00000001
549
Anton Blanchard42bff472016-06-07 22:28:42 +1000550/* Bits present in AT_HWCAP2 for PowerPC. */
551
552#define PPC_FEATURE2_ARCH_2_07 0x80000000
553#define PPC_FEATURE2_HAS_HTM 0x40000000
554#define PPC_FEATURE2_HAS_DSCR 0x20000000
555#define PPC_FEATURE2_HAS_EBB 0x10000000
556#define PPC_FEATURE2_HAS_ISEL 0x08000000
557#define PPC_FEATURE2_HAS_TAR 0x04000000
558#define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000
559#define PPC_FEATURE2_HTM_NOSC 0x01000000
560#define PPC_FEATURE2_ARCH_3_00 0x00800000
561#define PPC_FEATURE2_HAS_IEEE128 0x00400000
Lijun Pande55d3b2020-07-23 23:58:40 -0500562#define PPC_FEATURE2_ARCH_3_10 0x00040000
Anton Blanchard42bff472016-06-07 22:28:42 +1000563
Richard Henderson90379ca2014-08-06 11:48:48 -0700564/* Bits present in AT_HWCAP for Sparc. */
bellard88570522003-04-07 21:32:32 +0000565
Richard Henderson90379ca2014-08-06 11:48:48 -0700566#define HWCAP_SPARC_FLUSH 0x00000001
567#define HWCAP_SPARC_STBAR 0x00000002
568#define HWCAP_SPARC_SWAP 0x00000004
569#define HWCAP_SPARC_MULDIV 0x00000008
570#define HWCAP_SPARC_V9 0x00000010
571#define HWCAP_SPARC_ULTRA3 0x00000020
572#define HWCAP_SPARC_BLKINIT 0x00000040
573#define HWCAP_SPARC_N2 0x00000080
574#define HWCAP_SPARC_MUL32 0x00000100
575#define HWCAP_SPARC_DIV32 0x00000200
576#define HWCAP_SPARC_FSMULD 0x00000400
577#define HWCAP_SPARC_V8PLUS 0x00000800
578#define HWCAP_SPARC_POPC 0x00001000
579#define HWCAP_SPARC_VIS 0x00002000
580#define HWCAP_SPARC_VIS2 0x00004000
581#define HWCAP_SPARC_ASI_BLK_INIT 0x00008000
582#define HWCAP_SPARC_FMAF 0x00010000
583#define HWCAP_SPARC_VIS3 0x00020000
584#define HWCAP_SPARC_HPC 0x00040000
585#define HWCAP_SPARC_RANDOM 0x00080000
586#define HWCAP_SPARC_TRANS 0x00100000
587#define HWCAP_SPARC_FJFMAU 0x00200000
588#define HWCAP_SPARC_IMA 0x00400000
589#define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000
590#define HWCAP_SPARC_PAUSE 0x01000000
591#define HWCAP_SPARC_CBCOND 0x02000000
592#define HWCAP_SPARC_CRYPTO 0x04000000
bellard88570522003-04-07 21:32:32 +0000593
Richard Hendersonc9baa302013-06-07 07:43:33 -0700594/* Bits present in AT_HWCAP for s390. */
595
596#define HWCAP_S390_ESAN3 1
597#define HWCAP_S390_ZARCH 2
598#define HWCAP_S390_STFLE 4
599#define HWCAP_S390_MSA 8
600#define HWCAP_S390_LDISP 16
601#define HWCAP_S390_EIMM 32
602#define HWCAP_S390_DFP 64
603#define HWCAP_S390_HPAGE 128
604#define HWCAP_S390_ETF3EH 256
605#define HWCAP_S390_HIGH_GPRS 512
606#define HWCAP_S390_TE 1024
David Hildenbrand6d88baf2019-06-04 11:30:07 +0200607#define HWCAP_S390_VXRS 2048
Richard Hendersonc9baa302013-06-07 07:43:33 -0700608
Laurent Vivier33dff5f2018-02-20 18:33:06 +0100609/* M68K specific definitions. */
610/* We use the top 24 bits to encode information about the
611 architecture variant. */
612#define EF_M68K_CPU32 0x00810000
613#define EF_M68K_M68000 0x01000000
614#define EF_M68K_CFV4E 0x00008000
615#define EF_M68K_FIDO 0x02000000
616#define EF_M68K_ARCH_MASK \
617 (EF_M68K_M68000 | EF_M68K_CPU32 | EF_M68K_CFV4E | EF_M68K_FIDO)
618
619/* We use the bottom 8 bits to encode information about the
620 coldfire variant. If we use any of these bits, the top 24 bits are
621 either 0 or EF_M68K_CFV4E. */
622#define EF_M68K_CF_ISA_MASK 0x0F /* Which ISA */
623#define EF_M68K_CF_ISA_A_NODIV 0x01 /* ISA A except for div */
624#define EF_M68K_CF_ISA_A 0x02
625#define EF_M68K_CF_ISA_A_PLUS 0x03
626#define EF_M68K_CF_ISA_B_NOUSP 0x04 /* ISA_B except for USP */
627#define EF_M68K_CF_ISA_B 0x05
628#define EF_M68K_CF_ISA_C 0x06
629#define EF_M68K_CF_ISA_C_NODIV 0x07 /* ISA C except for div */
630#define EF_M68K_CF_MAC_MASK 0x30
631#define EF_M68K_CF_MAC 0x10 /* MAC */
632#define EF_M68K_CF_EMAC 0x20 /* EMAC */
633#define EF_M68K_CF_EMAC_B 0x30 /* EMAC_B */
634#define EF_M68K_CF_FLOAT 0x40 /* Has float insns */
635#define EF_M68K_CF_MASK 0xFF
636
bellard88570522003-04-07 21:32:32 +0000637/*
638 * 68k ELF relocation types
639 */
640#define R_68K_NONE 0
641#define R_68K_32 1
642#define R_68K_16 2
643#define R_68K_8 3
644#define R_68K_PC32 4
645#define R_68K_PC16 5
646#define R_68K_PC8 6
647#define R_68K_GOT32 7
648#define R_68K_GOT16 8
649#define R_68K_GOT8 9
650#define R_68K_GOT32O 10
651#define R_68K_GOT16O 11
652#define R_68K_GOT8O 12
653#define R_68K_PLT32 13
654#define R_68K_PLT16 14
655#define R_68K_PLT8 15
656#define R_68K_PLT32O 16
657#define R_68K_PLT16O 17
658#define R_68K_PLT8O 18
659#define R_68K_COPY 19
660#define R_68K_GLOB_DAT 20
661#define R_68K_JMP_SLOT 21
662#define R_68K_RELATIVE 22
663
664/*
665 * Alpha ELF relocation types
666 */
667#define R_ALPHA_NONE 0 /* No reloc */
668#define R_ALPHA_REFLONG 1 /* Direct 32 bit */
669#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
670#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
671#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
672#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */
673#define R_ALPHA_GPDISP 6 /* Add displacement to GP */
674#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
675#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
676#define R_ALPHA_SREL16 9 /* PC relative 16 bit */
677#define R_ALPHA_SREL32 10 /* PC relative 32 bit */
678#define R_ALPHA_SREL64 11 /* PC relative 64 bit */
679#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
680#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
681#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
682#define R_ALPHA_COPY 24 /* Copy symbol at runtime */
683#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */
684#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */
685#define R_ALPHA_RELATIVE 27 /* Adjust by program base */
686#define R_ALPHA_BRSGP 28
687#define R_ALPHA_TLSGD 29
688#define R_ALPHA_TLS_LDM 30
689#define R_ALPHA_DTPMOD64 31
690#define R_ALPHA_GOTDTPREL 32
691#define R_ALPHA_DTPREL64 33
692#define R_ALPHA_DTPRELHI 34
693#define R_ALPHA_DTPRELLO 35
694#define R_ALPHA_DTPREL16 36
695#define R_ALPHA_GOTTPREL 37
696#define R_ALPHA_TPREL64 38
697#define R_ALPHA_TPRELHI 39
698#define R_ALPHA_TPRELLO 40
699#define R_ALPHA_TPREL16 41
700
701#define SHF_ALPHA_GPREL 0x10000000
702
703
Doug Kwand90b94c2014-05-29 09:12:19 -0500704/* PowerPC specific definitions. */
705
706/* Processor specific flags for the ELF header e_flags field. */
707#define EF_PPC64_ABI 0x3
708
bellard88570522003-04-07 21:32:32 +0000709/* PowerPC relocations defined by the ABIs */
710#define R_PPC_NONE 0
711#define R_PPC_ADDR32 1 /* 32bit absolute address */
712#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
713#define R_PPC_ADDR16 3 /* 16bit absolute address */
714#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
715#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
716#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
717#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
718#define R_PPC_ADDR14_BRTAKEN 8
719#define R_PPC_ADDR14_BRNTAKEN 9
720#define R_PPC_REL24 10 /* PC relative 26 bit */
721#define R_PPC_REL14 11 /* PC relative 16 bit */
722#define R_PPC_REL14_BRTAKEN 12
723#define R_PPC_REL14_BRNTAKEN 13
724#define R_PPC_GOT16 14
725#define R_PPC_GOT16_LO 15
726#define R_PPC_GOT16_HI 16
727#define R_PPC_GOT16_HA 17
728#define R_PPC_PLTREL24 18
729#define R_PPC_COPY 19
730#define R_PPC_GLOB_DAT 20
731#define R_PPC_JMP_SLOT 21
732#define R_PPC_RELATIVE 22
733#define R_PPC_LOCAL24PC 23
734#define R_PPC_UADDR32 24
735#define R_PPC_UADDR16 25
736#define R_PPC_REL32 26
737#define R_PPC_PLT32 27
738#define R_PPC_PLTREL32 28
739#define R_PPC_PLT16_LO 29
740#define R_PPC_PLT16_HI 30
741#define R_PPC_PLT16_HA 31
742#define R_PPC_SDAREL16 32
743#define R_PPC_SECTOFF 33
744#define R_PPC_SECTOFF_LO 34
745#define R_PPC_SECTOFF_HI 35
746#define R_PPC_SECTOFF_HA 36
747/* Keep this the last entry. */
malc3efa9a62009-07-18 13:10:12 +0400748#ifndef R_PPC_NUM
bellard88570522003-04-07 21:32:32 +0000749#define R_PPC_NUM 37
malc3efa9a62009-07-18 13:10:12 +0400750#endif
bellard88570522003-04-07 21:32:32 +0000751
752/* ARM specific declarations */
753
754/* Processor specific flags for the ELF header e_flags field. */
755#define EF_ARM_RELEXEC 0x01
756#define EF_ARM_HASENTRY 0x02
757#define EF_ARM_INTERWORK 0x04
758#define EF_ARM_APCS_26 0x08
759#define EF_ARM_APCS_FLOAT 0x10
760#define EF_ARM_PIC 0x20
761#define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
762#define EF_NEW_ABI 0x80
763#define EF_OLD_ABI 0x100
Peter Maydellef8b0c02012-03-30 18:02:49 +0100764#define EF_ARM_SOFT_FLOAT 0x200
765#define EF_ARM_VFP_FLOAT 0x400
766#define EF_ARM_MAVERICK_FLOAT 0x800
767
768/* Other constants defined in the ARM ELF spec. version B-01. */
769#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */
770#define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */
771#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */
772#define EF_ARM_EABIMASK 0xFF000000
773
774/* Constants defined in AAELF. */
775#define EF_ARM_BE8 0x00800000
776#define EF_ARM_LE8 0x00400000
777
778#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
779#define EF_ARM_EABI_UNKNOWN 0x00000000
780#define EF_ARM_EABI_VER1 0x01000000
781#define EF_ARM_EABI_VER2 0x02000000
782#define EF_ARM_EABI_VER3 0x03000000
783#define EF_ARM_EABI_VER4 0x04000000
784#define EF_ARM_EABI_VER5 0x05000000
bellard88570522003-04-07 21:32:32 +0000785
786/* Additional symbol types for Thumb */
787#define STT_ARM_TFUNC 0xd
788
789/* ARM-specific values for sh_flags */
790#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */
791#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined
Paolo Bonzini7d374352018-12-13 23:37:37 +0100792 in the input to a link step */
bellard88570522003-04-07 21:32:32 +0000793
794/* ARM-specific program header flags */
795#define PF_ARM_SB 0x10000000 /* Segment contains the location
Paolo Bonzini7d374352018-12-13 23:37:37 +0100796 addressed by the static base */
bellard88570522003-04-07 21:32:32 +0000797
798/* ARM relocs. */
799#define R_ARM_NONE 0 /* No reloc */
800#define R_ARM_PC24 1 /* PC relative 26 bit branch */
801#define R_ARM_ABS32 2 /* Direct 32 bit */
802#define R_ARM_REL32 3 /* PC relative 32 bit */
803#define R_ARM_PC13 4
804#define R_ARM_ABS16 5 /* Direct 16 bit */
805#define R_ARM_ABS12 6 /* Direct 12 bit */
806#define R_ARM_THM_ABS5 7
807#define R_ARM_ABS8 8 /* Direct 8 bit */
808#define R_ARM_SBREL32 9
809#define R_ARM_THM_PC22 10
810#define R_ARM_THM_PC8 11
811#define R_ARM_AMP_VCALL9 12
812#define R_ARM_SWI24 13
813#define R_ARM_THM_SWI8 14
814#define R_ARM_XPC25 15
815#define R_ARM_THM_XPC22 16
816#define R_ARM_COPY 20 /* Copy symbol at runtime */
817#define R_ARM_GLOB_DAT 21 /* Create GOT entry */
818#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
819#define R_ARM_RELATIVE 23 /* Adjust by program base */
820#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
821#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
822#define R_ARM_GOT32 26 /* 32 bit GOT entry */
823#define R_ARM_PLT32 27 /* 32 bit PLT address */
pbrook46152182006-07-30 19:16:29 +0000824#define R_ARM_CALL 28
825#define R_ARM_JUMP24 29
bellard88570522003-04-07 21:32:32 +0000826#define R_ARM_GNU_VTENTRY 100
827#define R_ARM_GNU_VTINHERIT 101
828#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
829#define R_ARM_THM_PC9 103 /* thumb conditional branch */
830#define R_ARM_RXPC25 249
831#define R_ARM_RSBREL32 250
832#define R_ARM_THM_RPC22 251
833#define R_ARM_RREL32 252
834#define R_ARM_RABS22 253
835#define R_ARM_RPC24 254
836#define R_ARM_RBASE 255
837/* Keep this the last entry. */
838#define R_ARM_NUM 256
839
Claudio Fontana1d256772013-06-12 16:20:22 +0100840/* ARM Aarch64 relocation types */
841#define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */
842/* static data relocations */
843#define R_AARCH64_ABS64 257
844#define R_AARCH64_ABS32 258
845#define R_AARCH64_ABS16 259
846#define R_AARCH64_PREL64 260
847#define R_AARCH64_PREL32 261
848#define R_AARCH64_PREL16 262
849/* static aarch64 group relocations */
850/* group relocs to create unsigned data value or address inline */
851#define R_AARCH64_MOVW_UABS_G0 263
852#define R_AARCH64_MOVW_UABS_G0_NC 264
853#define R_AARCH64_MOVW_UABS_G1 265
854#define R_AARCH64_MOVW_UABS_G1_NC 266
855#define R_AARCH64_MOVW_UABS_G2 267
856#define R_AARCH64_MOVW_UABS_G2_NC 268
857#define R_AARCH64_MOVW_UABS_G3 269
858/* group relocs to create signed data or offset value inline */
859#define R_AARCH64_MOVW_SABS_G0 270
860#define R_AARCH64_MOVW_SABS_G1 271
861#define R_AARCH64_MOVW_SABS_G2 272
862/* relocs to generate 19, 21, and 33 bit PC-relative addresses */
863#define R_AARCH64_LD_PREL_LO19 273
864#define R_AARCH64_ADR_PREL_LO21 274
865#define R_AARCH64_ADR_PREL_PG_HI21 275
866#define R_AARCH64_ADR_PREL_PG_HI21_NC 276
867#define R_AARCH64_ADD_ABS_LO12_NC 277
868#define R_AARCH64_LDST8_ABS_LO12_NC 278
869#define R_AARCH64_LDST16_ABS_LO12_NC 284
870#define R_AARCH64_LDST32_ABS_LO12_NC 285
871#define R_AARCH64_LDST64_ABS_LO12_NC 286
872#define R_AARCH64_LDST128_ABS_LO12_NC 299
873/* relocs for control-flow - all offsets as multiple of 4 */
874#define R_AARCH64_TSTBR14 279
875#define R_AARCH64_CONDBR19 280
876#define R_AARCH64_JUMP26 282
877#define R_AARCH64_CALL26 283
878/* group relocs to create pc-relative offset inline */
879#define R_AARCH64_MOVW_PREL_G0 287
880#define R_AARCH64_MOVW_PREL_G0_NC 288
881#define R_AARCH64_MOVW_PREL_G1 289
882#define R_AARCH64_MOVW_PREL_G1_NC 290
883#define R_AARCH64_MOVW_PREL_G2 291
884#define R_AARCH64_MOVW_PREL_G2_NC 292
885#define R_AARCH64_MOVW_PREL_G3 293
886/* group relocs to create a GOT-relative offset inline */
887#define R_AARCH64_MOVW_GOTOFF_G0 300
888#define R_AARCH64_MOVW_GOTOFF_G0_NC 301
889#define R_AARCH64_MOVW_GOTOFF_G1 302
890#define R_AARCH64_MOVW_GOTOFF_G1_NC 303
891#define R_AARCH64_MOVW_GOTOFF_G2 304
892#define R_AARCH64_MOVW_GOTOFF_G2_NC 305
893#define R_AARCH64_MOVW_GOTOFF_G3 306
894/* GOT-relative data relocs */
895#define R_AARCH64_GOTREL64 307
896#define R_AARCH64_GOTREL32 308
897/* GOT-relative instr relocs */
898#define R_AARCH64_GOT_LD_PREL19 309
899#define R_AARCH64_LD64_GOTOFF_LO15 310
900#define R_AARCH64_ADR_GOT_PAGE 311
901#define R_AARCH64_LD64_GOT_LO12_NC 312
902#define R_AARCH64_LD64_GOTPAGE_LO15 313
903/* General Dynamic TLS relocations */
904#define R_AARCH64_TLSGD_ADR_PREL21 512
905#define R_AARCH64_TLSGD_ADR_PAGE21 513
906#define R_AARCH64_TLSGD_ADD_LO12_NC 514
907#define R_AARCH64_TLSGD_MOVW_G1 515
908#define R_AARCH64_TLSGD_MOVW_G0_NC 516
909/* Local Dynamic TLS relocations */
910#define R_AARCH64_TLSLD_ADR_PREL21 517
911#define R_AARCH64_TLSLD_ADR_PAGE21 518
912#define R_AARCH64_TLSLD_ADD_LO12_NC 519
913#define R_AARCH64_TLSLD_MOVW_G1 520
914#define R_AARCH64_TLSLD_MOVW_G0_NC 521
915#define R_AARCH64_TLSLD_LD_PREL19 522
916#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523
917#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524
918#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525
919#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526
920#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527
921#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528
922#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529
923#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530
924#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531
925#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532
926#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533
927#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534
928#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535
929#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536
930#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537
931#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538
932/* initial exec TLS relocations */
933#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539
934#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540
935#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541
936#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542
937#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543
938/* local exec TLS relocations */
939#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544
940#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545
941#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546
942#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547
943#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548
944#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549
945#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550
946#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551
947#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552
948#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553
949#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554
950#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555
951#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556
952#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557
953#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558
954#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559
955/* Dynamic Relocations */
956#define R_AARCH64_COPY 1024
957#define R_AARCH64_GLOB_DAT 1025
958#define R_AARCH64_JUMP_SLOT 1026
959#define R_AARCH64_RELATIVE 1027
960#define R_AARCH64_TLS_DTPREL64 1028
961#define R_AARCH64_TLS_DTPMOD64 1029
962#define R_AARCH64_TLS_TPREL64 1030
963#define R_AARCH64_TLS_DTPREL32 1031
964#define R_AARCH64_TLS_DTPMOD32 1032
965#define R_AARCH64_TLS_TPREL32 1033
966
bellard88570522003-04-07 21:32:32 +0000967/* s390 relocations defined by the ABIs */
968#define R_390_NONE 0 /* No reloc. */
969#define R_390_8 1 /* Direct 8 bit. */
970#define R_390_12 2 /* Direct 12 bit. */
971#define R_390_16 3 /* Direct 16 bit. */
972#define R_390_32 4 /* Direct 32 bit. */
973#define R_390_PC32 5 /* PC relative 32 bit. */
974#define R_390_GOT12 6 /* 12 bit GOT offset. */
975#define R_390_GOT32 7 /* 32 bit GOT offset. */
976#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
977#define R_390_COPY 9 /* Copy symbol at runtime. */
978#define R_390_GLOB_DAT 10 /* Create GOT entry. */
979#define R_390_JMP_SLOT 11 /* Create PLT entry. */
980#define R_390_RELATIVE 12 /* Adjust by program base. */
981#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
982#define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
983#define R_390_GOT16 15 /* 16 bit GOT offset. */
984#define R_390_PC16 16 /* PC relative 16 bit. */
985#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
986#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
987#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
988#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
989#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
990#define R_390_64 22 /* Direct 64 bit. */
991#define R_390_PC64 23 /* PC relative 64 bit. */
992#define R_390_GOT64 24 /* 64 bit GOT offset. */
993#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
994#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
995#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
996#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
997#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
998#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
999#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
1000#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
1001#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
1002#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
1003#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
1004#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
1005#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
1006#define R_390_TLS_GDCALL 38 /* Tag for function call in general
1007 dynamic TLS code. */
1008#define R_390_TLS_LDCALL 39 /* Tag for function call in local
1009 dynamic TLS code. */
1010#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
1011 thread local data. */
1012#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
1013 thread local data. */
1014#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
1015 block offset. */
1016#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
1017 block offset. */
1018#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
1019 block offset. */
1020#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
1021 thread local data in LD code. */
1022#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
1023 thread local data in LD code. */
1024#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
1025 negated static TLS block offset. */
1026#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
1027 negated static TLS block offset. */
1028#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
1029 negated static TLS block offset. */
1030#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
1031 static TLS block. */
1032#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
1033 static TLS block. */
1034#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
1035 block. */
1036#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
1037 block. */
1038#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
1039#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
1040#define R_390_TLS_TPOFF 56 /* Negate offset in static TLS
1041 block. */
Richard Henderson28eef8a2017-07-31 19:16:02 -07001042#define R_390_20 57
bellard88570522003-04-07 21:32:32 +00001043/* Keep this the last entry. */
Richard Henderson28eef8a2017-07-31 19:16:02 -07001044#define R_390_NUM 58
bellard88570522003-04-07 21:32:32 +00001045
1046/* x86-64 relocation types */
1047#define R_X86_64_NONE 0 /* No reloc */
1048#define R_X86_64_64 1 /* Direct 64 bit */
1049#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
1050#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
1051#define R_X86_64_PLT32 4 /* 32 bit PLT address */
1052#define R_X86_64_COPY 5 /* Copy symbol at runtime */
1053#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
1054#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
1055#define R_X86_64_RELATIVE 8 /* Adjust by program base */
1056#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
Paolo Bonzini7d374352018-12-13 23:37:37 +01001057 offset to GOT */
bellard88570522003-04-07 21:32:32 +00001058#define R_X86_64_32 10 /* Direct 32 bit zero extended */
1059#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
1060#define R_X86_64_16 12 /* Direct 16 bit zero extended */
1061#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
1062#define R_X86_64_8 14 /* Direct 8 bit sign extended */
1063#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
1064
1065#define R_X86_64_NUM 16
1066
1067/* Legal values for e_flags field of Elf64_Ehdr. */
1068
1069#define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */
1070
1071/* HPPA specific definitions. */
1072
1073/* Legal values for e_flags field of Elf32_Ehdr. */
1074
1075#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
1076#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
1077#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
1078#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
1079#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
Paolo Bonzini7d374352018-12-13 23:37:37 +01001080 prediction. */
bellard88570522003-04-07 21:32:32 +00001081#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
1082#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
1083
1084/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
1085
1086#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
1087#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
1088#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
1089
1090/* Additional section indeces. */
1091
1092#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
Paolo Bonzini7d374352018-12-13 23:37:37 +01001093 symbols in ANSI C. */
bellard88570522003-04-07 21:32:32 +00001094#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
1095
1096/* Legal values for sh_type field of Elf32_Shdr. */
1097
1098#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
1099#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
1100#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
1101
1102/* Legal values for sh_flags field of Elf32_Shdr. */
1103
1104#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
1105#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
1106#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
1107
1108/* Legal values for ST_TYPE subfield of st_info (symbol type). */
1109
1110#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
1111
1112#define STT_HP_OPAQUE (STT_LOOS + 0x1)
1113#define STT_HP_STUB (STT_LOOS + 0x2)
1114
1115/* HPPA relocs. */
1116
1117#define R_PARISC_NONE 0 /* No reloc. */
1118#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
1119#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
1120#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
1121#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
1122#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
1123#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
1124#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
1125#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
1126#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
1127#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
1128#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
1129#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
1130#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
1131#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
1132#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
1133#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
1134#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
1135#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
1136#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
1137#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
1138#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
1139#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
1140#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
1141#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
1142#define R_PARISC_FPTR64 64 /* 64 bits function address. */
1143#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
1144#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
1145#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
1146#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
1147#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
1148#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
1149#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
1150#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
1151#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
1152#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
1153#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
1154#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
1155#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
1156#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
1157#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
1158#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
1159#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
1160#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
1161#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
1162#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
1163#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
1164#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
1165#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
1166#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
1167#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
1168#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
1169#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
1170#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
1171#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
1172#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
1173#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
1174#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
1175#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
1176#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
1177#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
1178#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
1179#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
1180#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
1181#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
1182#define R_PARISC_LORESERVE 128
1183#define R_PARISC_COPY 128 /* Copy relocation. */
1184#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
1185#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
1186#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
1187#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
1188#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
1189#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
1190#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
1191#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
1192#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
1193#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
1194#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
1195#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
1196#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
1197#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
1198#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
1199#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
1200#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
1201#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
1202#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
1203#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
1204#define R_PARISC_HIRESERVE 255
1205
1206/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
1207
1208#define PT_HP_TLS (PT_LOOS + 0x0)
1209#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
1210#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
1211#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
1212#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
1213#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
1214#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
1215#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
1216#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
1217#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
1218#define PT_HP_PARALLEL (PT_LOOS + 0x10)
1219#define PT_HP_FASTBIND (PT_LOOS + 0x11)
1220#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
1221#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
1222#define PT_HP_STACK (PT_LOOS + 0x14)
1223
1224#define PT_PARISC_ARCHEXT 0x70000000
1225#define PT_PARISC_UNWIND 0x70000001
1226
1227/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
1228
1229#define PF_PARISC_SBP 0x08000000
1230
1231#define PF_HP_PAGE_SIZE 0x00100000
1232#define PF_HP_FAR_SHARED 0x00200000
1233#define PF_HP_NEAR_SHARED 0x00400000
1234#define PF_HP_CODE 0x01000000
1235#define PF_HP_MODIFY 0x02000000
1236#define PF_HP_LAZYSWAP 0x04000000
1237#define PF_HP_SBP 0x08000000
1238
bellard0d330192003-04-29 21:10:09 +00001239/* IA-64 specific declarations. */
1240
1241/* Processor specific flags for the Ehdr e_flags field. */
1242#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
1243#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
1244#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
1245
1246/* Processor specific values for the Phdr p_type field. */
1247#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */
1248#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */
1249
1250/* Processor specific flags for the Phdr p_flags field. */
1251#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */
1252
1253/* Processor specific values for the Shdr sh_type field. */
1254#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */
1255#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */
1256
1257/* Processor specific flags for the Shdr sh_flags field. */
1258#define SHF_IA_64_SHORT 0x10000000 /* section near gp */
1259#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */
1260
1261/* Processor specific values for the Dyn d_tag field. */
1262#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
1263#define DT_IA_64_NUM 1
1264
1265/* IA-64 relocations. */
1266#define R_IA64_NONE 0x00 /* none */
1267#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
1268#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
1269#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
1270#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
1271#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
1272#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
1273#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
1274#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */
1275#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */
1276#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */
1277#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */
1278#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */
1279#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */
1280#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */
1281#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */
1282#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */
1283#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */
1284#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */
1285#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */
1286#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */
1287#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */
1288#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */
1289#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */
1290#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */
1291#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */
1292#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */
1293#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */
1294#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */
1295#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */
1296#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */
1297#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */
1298#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */
1299#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
1300#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
1301#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */
1302#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */
1303#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */
1304#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */
1305#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */
1306#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */
1307#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */
1308#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */
1309#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */
1310#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */
1311#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */
1312#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */
1313#define R_IA64_REL32MSB 0x6c /* data 4 + REL */
1314#define R_IA64_REL32LSB 0x6d /* data 4 + REL */
1315#define R_IA64_REL64MSB 0x6e /* data 8 + REL */
1316#define R_IA64_REL64LSB 0x6f /* data 8 + REL */
1317#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
1318#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
1319#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
1320#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
1321#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
1322#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
1323#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
1324#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
1325#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
1326#define R_IA64_COPY 0x84 /* copy relocation */
1327#define R_IA64_SUB 0x85 /* Addend and symbol difference */
1328#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
1329#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
1330#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */
1331#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */
1332#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */
1333#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */
1334#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */
1335#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */
1336#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */
1337#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */
1338#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */
1339#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */
1340#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */
1341#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */
1342#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */
1343#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */
1344#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */
1345#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */
1346#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
bellard88570522003-04-07 21:32:32 +00001347
Alistair Francis6d06fdd2018-12-19 19:16:22 +00001348/* RISC-V relocations. */
1349#define R_RISCV_NONE 0
1350#define R_RISCV_32 1
1351#define R_RISCV_64 2
1352#define R_RISCV_RELATIVE 3
1353#define R_RISCV_COPY 4
1354#define R_RISCV_JUMP_SLOT 5
1355#define R_RISCV_TLS_DTPMOD32 6
1356#define R_RISCV_TLS_DTPMOD64 7
1357#define R_RISCV_TLS_DTPREL32 8
1358#define R_RISCV_TLS_DTPREL64 9
1359#define R_RISCV_TLS_TPREL32 10
1360#define R_RISCV_TLS_TPREL64 11
1361#define R_RISCV_BRANCH 16
1362#define R_RISCV_JAL 17
1363#define R_RISCV_CALL 18
1364#define R_RISCV_CALL_PLT 19
1365#define R_RISCV_GOT_HI20 20
1366#define R_RISCV_TLS_GOT_HI20 21
1367#define R_RISCV_TLS_GD_HI20 22
1368#define R_RISCV_PCREL_HI20 23
1369#define R_RISCV_PCREL_LO12_I 24
1370#define R_RISCV_PCREL_LO12_S 25
1371#define R_RISCV_HI20 26
1372#define R_RISCV_LO12_I 27
1373#define R_RISCV_LO12_S 28
1374#define R_RISCV_TPREL_HI20 29
1375#define R_RISCV_TPREL_LO12_I 30
1376#define R_RISCV_TPREL_LO12_S 31
1377#define R_RISCV_TPREL_ADD 32
1378#define R_RISCV_ADD8 33
1379#define R_RISCV_ADD16 34
1380#define R_RISCV_ADD32 35
1381#define R_RISCV_ADD64 36
1382#define R_RISCV_SUB8 37
1383#define R_RISCV_SUB16 38
1384#define R_RISCV_SUB32 39
1385#define R_RISCV_SUB64 40
1386#define R_RISCV_GNU_VTINHERIT 41
1387#define R_RISCV_GNU_VTENTRY 42
1388#define R_RISCV_ALIGN 43
1389#define R_RISCV_RVC_BRANCH 44
1390#define R_RISCV_RVC_JUMP 45
1391#define R_RISCV_RVC_LUI 46
1392#define R_RISCV_GPREL_I 47
1393#define R_RISCV_GPREL_S 48
1394#define R_RISCV_TPREL_I 49
1395#define R_RISCV_TPREL_S 50
1396#define R_RISCV_RELAX 51
1397#define R_RISCV_SUB6 52
1398#define R_RISCV_SET6 53
1399#define R_RISCV_SET8 54
1400#define R_RISCV_SET16 55
1401#define R_RISCV_SET32 56
1402
Michael Clarkc02b78c2019-03-16 01:20:37 +00001403/* RISC-V ELF Flags. */
1404#define EF_RISCV_RVC 0x0001
1405#define EF_RISCV_FLOAT_ABI 0x0006
1406#define EF_RISCV_FLOAT_ABI_SOFT 0x0000
1407#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002
1408#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004
1409#define EF_RISCV_FLOAT_ABI_QUAD 0x0006
1410#define EF_RISCV_RVE 0x0008
1411#define EF_RISCV_TSO 0x0010
1412
bellard31e31b82003-02-18 22:55:36 +00001413typedef struct elf32_rel {
1414 Elf32_Addr r_offset;
1415 Elf32_Word r_info;
1416} Elf32_Rel;
1417
1418typedef struct elf64_rel {
bellard88570522003-04-07 21:32:32 +00001419 Elf64_Addr r_offset; /* Location at which to apply the action */
1420 Elf64_Xword r_info; /* index and type of relocation */
bellard31e31b82003-02-18 22:55:36 +00001421} Elf64_Rel;
1422
1423typedef struct elf32_rela{
1424 Elf32_Addr r_offset;
1425 Elf32_Word r_info;
1426 Elf32_Sword r_addend;
1427} Elf32_Rela;
1428
1429typedef struct elf64_rela {
bellard88570522003-04-07 21:32:32 +00001430 Elf64_Addr r_offset; /* Location at which to apply the action */
1431 Elf64_Xword r_info; /* index and type of relocation */
1432 Elf64_Sxword r_addend; /* Constant addend used to compute value */
bellard31e31b82003-02-18 22:55:36 +00001433} Elf64_Rela;
1434
1435typedef struct elf32_sym{
1436 Elf32_Word st_name;
1437 Elf32_Addr st_value;
1438 Elf32_Word st_size;
1439 unsigned char st_info;
1440 unsigned char st_other;
1441 Elf32_Half st_shndx;
1442} Elf32_Sym;
1443
1444typedef struct elf64_sym {
bellard88570522003-04-07 21:32:32 +00001445 Elf64_Word st_name; /* Symbol name, index in string tbl */
1446 unsigned char st_info; /* Type and binding attributes */
1447 unsigned char st_other; /* No defined meaning, 0 */
1448 Elf64_Half st_shndx; /* Associated section index */
1449 Elf64_Addr st_value; /* Value of the symbol */
1450 Elf64_Xword st_size; /* Associated symbol size */
bellard31e31b82003-02-18 22:55:36 +00001451} Elf64_Sym;
1452
1453
1454#define EI_NIDENT 16
1455
Wen Congyang783e9b42012-05-07 12:10:47 +08001456/* Special value for e_phnum. This indicates that the real number of
1457 program headers is too large to fit into e_phnum. Instead the real
1458 value is in the field sh_info of section 0. */
1459#define PN_XNUM 0xffff
1460
bellard31e31b82003-02-18 22:55:36 +00001461typedef struct elf32_hdr{
1462 unsigned char e_ident[EI_NIDENT];
1463 Elf32_Half e_type;
1464 Elf32_Half e_machine;
1465 Elf32_Word e_version;
1466 Elf32_Addr e_entry; /* Entry point */
1467 Elf32_Off e_phoff;
1468 Elf32_Off e_shoff;
1469 Elf32_Word e_flags;
1470 Elf32_Half e_ehsize;
1471 Elf32_Half e_phentsize;
1472 Elf32_Half e_phnum;
1473 Elf32_Half e_shentsize;
1474 Elf32_Half e_shnum;
1475 Elf32_Half e_shstrndx;
1476} Elf32_Ehdr;
1477
1478typedef struct elf64_hdr {
1479 unsigned char e_ident[16]; /* ELF "magic number" */
bellard88570522003-04-07 21:32:32 +00001480 Elf64_Half e_type;
1481 Elf64_Half e_machine;
1482 Elf64_Word e_version;
1483 Elf64_Addr e_entry; /* Entry point virtual address */
1484 Elf64_Off e_phoff; /* Program header table file offset */
1485 Elf64_Off e_shoff; /* Section header table file offset */
1486 Elf64_Word e_flags;
1487 Elf64_Half e_ehsize;
1488 Elf64_Half e_phentsize;
1489 Elf64_Half e_phnum;
1490 Elf64_Half e_shentsize;
1491 Elf64_Half e_shnum;
1492 Elf64_Half e_shstrndx;
bellard31e31b82003-02-18 22:55:36 +00001493} Elf64_Ehdr;
1494
1495/* These constants define the permissions on sections in the program
1496 header, p_flags. */
1497#define PF_R 0x4
1498#define PF_W 0x2
1499#define PF_X 0x1
1500
1501typedef struct elf32_phdr{
1502 Elf32_Word p_type;
1503 Elf32_Off p_offset;
1504 Elf32_Addr p_vaddr;
1505 Elf32_Addr p_paddr;
1506 Elf32_Word p_filesz;
1507 Elf32_Word p_memsz;
1508 Elf32_Word p_flags;
1509 Elf32_Word p_align;
1510} Elf32_Phdr;
1511
1512typedef struct elf64_phdr {
bellard88570522003-04-07 21:32:32 +00001513 Elf64_Word p_type;
1514 Elf64_Word p_flags;
1515 Elf64_Off p_offset; /* Segment file offset */
1516 Elf64_Addr p_vaddr; /* Segment virtual address */
1517 Elf64_Addr p_paddr; /* Segment physical address */
1518 Elf64_Xword p_filesz; /* Segment size in file */
1519 Elf64_Xword p_memsz; /* Segment size in memory */
1520 Elf64_Xword p_align; /* Segment alignment, file & memory */
bellard31e31b82003-02-18 22:55:36 +00001521} Elf64_Phdr;
1522
1523/* sh_type */
1524#define SHT_NULL 0
1525#define SHT_PROGBITS 1
1526#define SHT_SYMTAB 2
1527#define SHT_STRTAB 3
1528#define SHT_RELA 4
1529#define SHT_HASH 5
1530#define SHT_DYNAMIC 6
1531#define SHT_NOTE 7
1532#define SHT_NOBITS 8
1533#define SHT_REL 9
1534#define SHT_SHLIB 10
1535#define SHT_DYNSYM 11
1536#define SHT_NUM 12
1537#define SHT_LOPROC 0x70000000
1538#define SHT_HIPROC 0x7fffffff
1539#define SHT_LOUSER 0x80000000
1540#define SHT_HIUSER 0xffffffff
bellard88570522003-04-07 21:32:32 +00001541#define SHT_MIPS_LIST 0x70000000
1542#define SHT_MIPS_CONFLICT 0x70000002
1543#define SHT_MIPS_GPTAB 0x70000003
1544#define SHT_MIPS_UCODE 0x70000004
bellard31e31b82003-02-18 22:55:36 +00001545
1546/* sh_flags */
1547#define SHF_WRITE 0x1
1548#define SHF_ALLOC 0x2
1549#define SHF_EXECINSTR 0x4
1550#define SHF_MASKPROC 0xf0000000
bellard88570522003-04-07 21:32:32 +00001551#define SHF_MIPS_GPREL 0x10000000
bellard31e31b82003-02-18 22:55:36 +00001552
1553/* special section indexes */
1554#define SHN_UNDEF 0
1555#define SHN_LORESERVE 0xff00
1556#define SHN_LOPROC 0xff00
1557#define SHN_HIPROC 0xff1f
1558#define SHN_ABS 0xfff1
1559#define SHN_COMMON 0xfff2
1560#define SHN_HIRESERVE 0xffff
bellard88570522003-04-07 21:32:32 +00001561#define SHN_MIPS_ACCOMON 0xff00
ths5fafdf22007-09-16 21:08:06 +00001562
bellard88570522003-04-07 21:32:32 +00001563typedef struct elf32_shdr {
bellard31e31b82003-02-18 22:55:36 +00001564 Elf32_Word sh_name;
1565 Elf32_Word sh_type;
1566 Elf32_Word sh_flags;
1567 Elf32_Addr sh_addr;
1568 Elf32_Off sh_offset;
1569 Elf32_Word sh_size;
1570 Elf32_Word sh_link;
1571 Elf32_Word sh_info;
1572 Elf32_Word sh_addralign;
1573 Elf32_Word sh_entsize;
1574} Elf32_Shdr;
1575
1576typedef struct elf64_shdr {
bellard88570522003-04-07 21:32:32 +00001577 Elf64_Word sh_name; /* Section name, index in string tbl */
1578 Elf64_Word sh_type; /* Type of section */
1579 Elf64_Xword sh_flags; /* Miscellaneous section attributes */
1580 Elf64_Addr sh_addr; /* Section virtual addr at execution */
1581 Elf64_Off sh_offset; /* Section file offset */
1582 Elf64_Xword sh_size; /* Size of section in bytes */
1583 Elf64_Word sh_link; /* Index of another section */
1584 Elf64_Word sh_info; /* Additional section information */
1585 Elf64_Xword sh_addralign; /* Section alignment */
1586 Elf64_Xword sh_entsize; /* Entry size if section holds table */
bellard31e31b82003-02-18 22:55:36 +00001587} Elf64_Shdr;
1588
1589#define EI_MAG0 0 /* e_ident[] indexes */
1590#define EI_MAG1 1
1591#define EI_MAG2 2
1592#define EI_MAG3 3
1593#define EI_CLASS 4
1594#define EI_DATA 5
1595#define EI_VERSION 6
Mika Westerbergedf8e2a2009-04-07 09:57:11 +03001596#define EI_OSABI 7
1597#define EI_PAD 8
1598
1599#define ELFOSABI_NONE 0 /* UNIX System V ABI */
1600#define ELFOSABI_SYSV 0 /* Alias. */
1601#define ELFOSABI_HPUX 1 /* HP-UX */
1602#define ELFOSABI_NETBSD 2 /* NetBSD. */
1603#define ELFOSABI_LINUX 3 /* Linux. */
1604#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */
1605#define ELFOSABI_AIX 7 /* IBM AIX. */
1606#define ELFOSABI_IRIX 8 /* SGI Irix. */
1607#define ELFOSABI_FREEBSD 9 /* FreeBSD. */
1608#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */
1609#define ELFOSABI_MODESTO 11 /* Novell Modesto. */
1610#define ELFOSABI_OPENBSD 12 /* OpenBSD. */
Christophe Lyoncf58aff2018-04-30 10:03:42 +02001611#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */
Mika Westerbergedf8e2a2009-04-07 09:57:11 +03001612#define ELFOSABI_ARM 97 /* ARM */
1613#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
bellard31e31b82003-02-18 22:55:36 +00001614
1615#define ELFMAG0 0x7f /* EI_MAG */
1616#define ELFMAG1 'E'
1617#define ELFMAG2 'L'
1618#define ELFMAG3 'F'
1619#define ELFMAG "\177ELF"
1620#define SELFMAG 4
1621
1622#define ELFCLASSNONE 0 /* EI_CLASS */
1623#define ELFCLASS32 1
1624#define ELFCLASS64 2
1625#define ELFCLASSNUM 3
1626
1627#define ELFDATANONE 0 /* e_ident[EI_DATA] */
1628#define ELFDATA2LSB 1
1629#define ELFDATA2MSB 2
1630
1631#define EV_NONE 0 /* e_version, EI_VERSION */
1632#define EV_CURRENT 1
1633#define EV_NUM 2
1634
1635/* Notes used in ET_CORE */
1636#define NT_PRSTATUS 1
Ekaterina Tumanova9b4f38e2013-07-10 15:26:46 +02001637#define NT_FPREGSET 2
bellard31e31b82003-02-18 22:55:36 +00001638#define NT_PRFPREG 2
1639#define NT_PRPSINFO 3
1640#define NT_TASKSTRUCT 4
Mika Westerbergedf8e2a2009-04-07 09:57:11 +03001641#define NT_AUXV 6
bellard88570522003-04-07 21:32:32 +00001642#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
Christian Borntraeger21a10692017-03-08 10:36:04 +01001643#define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
Eric Farmaneeef5592014-11-12 14:22:55 -05001644#define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
1645#define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */
Ekaterina Tumanova9b4f38e2013-07-10 15:26:46 +02001646#define NT_S390_PREFIX 0x305 /* s390 prefix register */
1647#define NT_S390_CTRS 0x304 /* s390 control registers */
1648#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */
1649#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
1650#define NT_S390_TIMER 0x301 /* s390 timer register */
Aneesh Kumar K.Ve62fbc52013-10-01 21:49:33 +05301651#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
1652#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
1653#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
Andrew Jones7d68e472016-01-11 20:56:24 +01001654#define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
1655#define NT_ARM_TLS 0x401 /* ARM TLS register */
1656#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
1657#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
1658#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
Andrew Jones538baab2020-01-23 15:22:40 +00001659#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension regs */
bellard88570522003-04-07 21:32:32 +00001660
Richard Henderson069175b2020-10-21 10:37:40 -07001661/* Defined note types for GNU systems. */
1662
1663#define NT_GNU_PROPERTY_TYPE_0 5 /* Program property */
1664
1665/* Values used in GNU .note.gnu.property notes (NT_GNU_PROPERTY_TYPE_0). */
1666
1667#define GNU_PROPERTY_STACK_SIZE 1
1668#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
1669
1670#define GNU_PROPERTY_LOPROC 0xc0000000
1671#define GNU_PROPERTY_HIPROC 0xdfffffff
1672#define GNU_PROPERTY_LOUSER 0xe0000000
1673#define GNU_PROPERTY_HIUSER 0xffffffff
1674
1675#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000
1676#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1u << 0)
1677#define GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1u << 1)
1678
Liam Merwickab969082019-01-15 12:18:06 +00001679/*
1680 * Physical entry point into the kernel.
1681 *
1682 * 32bit entry point into the kernel. When requested to launch the
1683 * guest kernel, use this entry point to launch the guest in 32-bit
1684 * protected mode with paging disabled.
1685 *
1686 * [ Corresponding definition in Linux kernel: include/xen/interface/elfnote.h ]
1687 */
1688#define XEN_ELFNOTE_PHYS32_ENTRY 18 /* 0x12 */
bellard31e31b82003-02-18 22:55:36 +00001689
1690/* Note header in a PT_NOTE section */
1691typedef struct elf32_note {
1692 Elf32_Word n_namesz; /* Name size */
1693 Elf32_Word n_descsz; /* Content size */
1694 Elf32_Word n_type; /* Content type */
1695} Elf32_Nhdr;
1696
1697/* Note header in a PT_NOTE section */
bellard31e31b82003-02-18 22:55:36 +00001698typedef struct elf64_note {
bellard88570522003-04-07 21:32:32 +00001699 Elf64_Word n_namesz; /* Name size */
1700 Elf64_Word n_descsz; /* Content size */
1701 Elf64_Word n_type; /* Content type */
bellard31e31b82003-02-18 22:55:36 +00001702} Elf64_Nhdr;
1703
Mike Frysinger1af02e82011-02-07 01:05:50 -05001704
1705/* This data structure represents a PT_LOAD segment. */
1706struct elf32_fdpic_loadseg {
1707 /* Core address to which the segment is mapped. */
1708 Elf32_Addr addr;
1709 /* VMA recorded in the program header. */
1710 Elf32_Addr p_vaddr;
1711 /* Size of this segment in memory. */
1712 Elf32_Word p_memsz;
1713};
1714struct elf32_fdpic_loadmap {
1715 /* Protocol version number, must be zero. */
1716 Elf32_Half version;
1717 /* Number of segments in this map. */
1718 Elf32_Half nsegs;
1719 /* The actual memory map. */
1720 struct elf32_fdpic_loadseg segs[/*nsegs*/];
1721};
1722
blueswir1eb38c522008-09-06 17:47:39 +00001723#ifdef ELF_CLASS
bellard31e31b82003-02-18 22:55:36 +00001724#if ELF_CLASS == ELFCLASS32
1725
bellard31e31b82003-02-18 22:55:36 +00001726#define elfhdr elf32_hdr
1727#define elf_phdr elf32_phdr
1728#define elf_note elf32_note
bellard88570522003-04-07 21:32:32 +00001729#define elf_shdr elf32_shdr
bellard689f9362003-04-29 20:40:07 +00001730#define elf_sym elf32_sym
j_mayered26abd2007-10-07 16:07:25 +00001731#define elf_addr_t Elf32_Off
Thomas Huth5dce07e2015-03-09 11:12:52 +01001732#define elf_rela elf32_rela
bellard88570522003-04-07 21:32:32 +00001733
1734#ifdef ELF_USES_RELOCA
1735# define ELF_RELOC Elf32_Rela
1736#else
1737# define ELF_RELOC Elf32_Rel
1738#endif
bellard31e31b82003-02-18 22:55:36 +00001739
1740#else
1741
bellard31e31b82003-02-18 22:55:36 +00001742#define elfhdr elf64_hdr
1743#define elf_phdr elf64_phdr
1744#define elf_note elf64_note
bellard88570522003-04-07 21:32:32 +00001745#define elf_shdr elf64_shdr
bellard689f9362003-04-29 20:40:07 +00001746#define elf_sym elf64_sym
j_mayered26abd2007-10-07 16:07:25 +00001747#define elf_addr_t Elf64_Off
Thomas Huth5dce07e2015-03-09 11:12:52 +01001748#define elf_rela elf64_rela
bellard31e31b82003-02-18 22:55:36 +00001749
bellard88570522003-04-07 21:32:32 +00001750#ifdef ELF_USES_RELOCA
1751# define ELF_RELOC Elf64_Rela
1752#else
1753# define ELF_RELOC Elf64_Rel
1754#endif
1755
1756#endif /* ELF_CLASS */
1757
1758#ifndef ElfW
1759# if ELF_CLASS == ELFCLASS32
1760# define ElfW(x) Elf32_ ## x
1761# define ELFW(x) ELF32_ ## x
1762# else
1763# define ElfW(x) Elf64_ ## x
1764# define ELFW(x) ELF64_ ## x
1765# endif
bellard31e31b82003-02-18 22:55:36 +00001766#endif
1767
blueswir1eb38c522008-09-06 17:47:39 +00001768#endif /* ELF_CLASS */
1769
bellard31e31b82003-02-18 22:55:36 +00001770
Markus Armbruster2a6a4072016-06-29 13:47:03 +02001771#endif /* QEMU_ELF_H */