Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * x86 condition code helpers |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include "cpu.h" |
Richard Henderson | 2ef6175 | 2014-04-07 22:31:41 -0700 | [diff] [blame] | 21 | #include "exec/helper-proto.h" |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 22 | |
| 23 | const uint8_t parity_table[256] = { |
| 24 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 25 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 26 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 27 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 28 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 29 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 30 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 31 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 32 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 33 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 34 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 35 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 36 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 37 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 38 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 39 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 40 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 41 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 42 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 43 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 44 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 45 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 46 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 47 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 48 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 49 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 50 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 51 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 52 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 53 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 54 | CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, |
| 55 | 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, |
| 56 | }; |
| 57 | |
| 58 | #define SHIFT 0 |
| 59 | #include "cc_helper_template.h" |
| 60 | #undef SHIFT |
| 61 | |
| 62 | #define SHIFT 1 |
| 63 | #include "cc_helper_template.h" |
| 64 | #undef SHIFT |
| 65 | |
| 66 | #define SHIFT 2 |
| 67 | #include "cc_helper_template.h" |
| 68 | #undef SHIFT |
| 69 | |
| 70 | #ifdef TARGET_X86_64 |
| 71 | |
| 72 | #define SHIFT 3 |
| 73 | #include "cc_helper_template.h" |
| 74 | #undef SHIFT |
| 75 | |
| 76 | #endif |
| 77 | |
Richard Henderson | cd7f97c | 2013-01-23 18:17:33 -0800 | [diff] [blame] | 78 | static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1, |
| 79 | target_ulong src2) |
| 80 | { |
| 81 | return (src1 & ~CC_C) | (dst * CC_C); |
| 82 | } |
| 83 | |
| 84 | static target_ulong compute_all_adox(target_ulong dst, target_ulong src1, |
| 85 | target_ulong src2) |
| 86 | { |
| 87 | return (src1 & ~CC_O) | (src2 * CC_O); |
| 88 | } |
| 89 | |
| 90 | static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1, |
| 91 | target_ulong src2) |
| 92 | { |
| 93 | return (src1 & ~(CC_C | CC_O)) | (dst * CC_C) | (src2 * CC_O); |
| 94 | } |
| 95 | |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 96 | target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1, |
| 97 | target_ulong src2, int op) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 98 | { |
| 99 | switch (op) { |
| 100 | default: /* should never happen */ |
| 101 | return 0; |
| 102 | |
| 103 | case CC_OP_EFLAGS: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 104 | return src1; |
Richard Henderson | 436ff2d | 2013-01-29 13:38:43 -0800 | [diff] [blame] | 105 | case CC_OP_CLR: |
Richard Henderson | d2fe51b | 2014-01-10 12:38:40 -0800 | [diff] [blame] | 106 | return CC_Z | CC_P; |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 107 | |
| 108 | case CC_OP_MULB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 109 | return compute_all_mulb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 110 | case CC_OP_MULW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 111 | return compute_all_mulw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 112 | case CC_OP_MULL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 113 | return compute_all_mull(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 114 | |
| 115 | case CC_OP_ADDB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 116 | return compute_all_addb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 117 | case CC_OP_ADDW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 118 | return compute_all_addw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 119 | case CC_OP_ADDL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 120 | return compute_all_addl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 121 | |
| 122 | case CC_OP_ADCB: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 123 | return compute_all_adcb(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 124 | case CC_OP_ADCW: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 125 | return compute_all_adcw(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 126 | case CC_OP_ADCL: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 127 | return compute_all_adcl(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 128 | |
| 129 | case CC_OP_SUBB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 130 | return compute_all_subb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 131 | case CC_OP_SUBW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 132 | return compute_all_subw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 133 | case CC_OP_SUBL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 134 | return compute_all_subl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 135 | |
| 136 | case CC_OP_SBBB: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 137 | return compute_all_sbbb(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 138 | case CC_OP_SBBW: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 139 | return compute_all_sbbw(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 140 | case CC_OP_SBBL: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 141 | return compute_all_sbbl(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 142 | |
| 143 | case CC_OP_LOGICB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 144 | return compute_all_logicb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 145 | case CC_OP_LOGICW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 146 | return compute_all_logicw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 147 | case CC_OP_LOGICL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 148 | return compute_all_logicl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 149 | |
| 150 | case CC_OP_INCB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 151 | return compute_all_incb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 152 | case CC_OP_INCW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 153 | return compute_all_incw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 154 | case CC_OP_INCL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 155 | return compute_all_incl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 156 | |
| 157 | case CC_OP_DECB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 158 | return compute_all_decb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 159 | case CC_OP_DECW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 160 | return compute_all_decw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 161 | case CC_OP_DECL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 162 | return compute_all_decl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 163 | |
| 164 | case CC_OP_SHLB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 165 | return compute_all_shlb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 166 | case CC_OP_SHLW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 167 | return compute_all_shlw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 168 | case CC_OP_SHLL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 169 | return compute_all_shll(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 170 | |
| 171 | case CC_OP_SARB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 172 | return compute_all_sarb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 173 | case CC_OP_SARW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 174 | return compute_all_sarw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 175 | case CC_OP_SARL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 176 | return compute_all_sarl(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 177 | |
Richard Henderson | bc4b43d | 2013-01-23 16:44:37 -0800 | [diff] [blame] | 178 | case CC_OP_BMILGB: |
| 179 | return compute_all_bmilgb(dst, src1); |
| 180 | case CC_OP_BMILGW: |
| 181 | return compute_all_bmilgw(dst, src1); |
| 182 | case CC_OP_BMILGL: |
| 183 | return compute_all_bmilgl(dst, src1); |
| 184 | |
Richard Henderson | cd7f97c | 2013-01-23 18:17:33 -0800 | [diff] [blame] | 185 | case CC_OP_ADCX: |
| 186 | return compute_all_adcx(dst, src1, src2); |
| 187 | case CC_OP_ADOX: |
| 188 | return compute_all_adox(dst, src1, src2); |
| 189 | case CC_OP_ADCOX: |
| 190 | return compute_all_adcox(dst, src1, src2); |
| 191 | |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 192 | #ifdef TARGET_X86_64 |
| 193 | case CC_OP_MULQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 194 | return compute_all_mulq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 195 | case CC_OP_ADDQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 196 | return compute_all_addq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 197 | case CC_OP_ADCQ: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 198 | return compute_all_adcq(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 199 | case CC_OP_SUBQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 200 | return compute_all_subq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 201 | case CC_OP_SBBQ: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 202 | return compute_all_sbbq(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 203 | case CC_OP_LOGICQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 204 | return compute_all_logicq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 205 | case CC_OP_INCQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 206 | return compute_all_incq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 207 | case CC_OP_DECQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 208 | return compute_all_decq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 209 | case CC_OP_SHLQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 210 | return compute_all_shlq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 211 | case CC_OP_SARQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 212 | return compute_all_sarq(dst, src1); |
Richard Henderson | bc4b43d | 2013-01-23 16:44:37 -0800 | [diff] [blame] | 213 | case CC_OP_BMILGQ: |
| 214 | return compute_all_bmilgq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 215 | #endif |
| 216 | } |
| 217 | } |
| 218 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 219 | uint32_t cpu_cc_compute_all(CPUX86State *env, int op) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 220 | { |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 221 | return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 222 | } |
| 223 | |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 224 | target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1, |
| 225 | target_ulong src2, int op) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 226 | { |
| 227 | switch (op) { |
| 228 | default: /* should never happen */ |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 229 | case CC_OP_LOGICB: |
| 230 | case CC_OP_LOGICW: |
| 231 | case CC_OP_LOGICL: |
| 232 | case CC_OP_LOGICQ: |
Richard Henderson | 436ff2d | 2013-01-29 13:38:43 -0800 | [diff] [blame] | 233 | case CC_OP_CLR: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 234 | return 0; |
| 235 | |
| 236 | case CC_OP_EFLAGS: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 237 | case CC_OP_SARB: |
| 238 | case CC_OP_SARW: |
| 239 | case CC_OP_SARL: |
| 240 | case CC_OP_SARQ: |
Richard Henderson | cd7f97c | 2013-01-23 18:17:33 -0800 | [diff] [blame] | 241 | case CC_OP_ADOX: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 242 | return src1 & 1; |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 243 | |
| 244 | case CC_OP_INCB: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 245 | case CC_OP_INCW: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 246 | case CC_OP_INCL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 247 | case CC_OP_INCQ: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 248 | case CC_OP_DECB: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 249 | case CC_OP_DECW: |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 250 | case CC_OP_DECL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 251 | case CC_OP_DECQ: |
| 252 | return src1; |
| 253 | |
| 254 | case CC_OP_MULB: |
| 255 | case CC_OP_MULW: |
| 256 | case CC_OP_MULL: |
| 257 | case CC_OP_MULQ: |
| 258 | return src1 != 0; |
| 259 | |
Richard Henderson | cd7f97c | 2013-01-23 18:17:33 -0800 | [diff] [blame] | 260 | case CC_OP_ADCX: |
| 261 | case CC_OP_ADCOX: |
| 262 | return dst; |
| 263 | |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 264 | case CC_OP_ADDB: |
| 265 | return compute_c_addb(dst, src1); |
| 266 | case CC_OP_ADDW: |
| 267 | return compute_c_addw(dst, src1); |
| 268 | case CC_OP_ADDL: |
| 269 | return compute_c_addl(dst, src1); |
| 270 | |
| 271 | case CC_OP_ADCB: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 272 | return compute_c_adcb(dst, src1, src2); |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 273 | case CC_OP_ADCW: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 274 | return compute_c_adcw(dst, src1, src2); |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 275 | case CC_OP_ADCL: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 276 | return compute_c_adcl(dst, src1, src2); |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 277 | |
| 278 | case CC_OP_SUBB: |
| 279 | return compute_c_subb(dst, src1); |
| 280 | case CC_OP_SUBW: |
| 281 | return compute_c_subw(dst, src1); |
| 282 | case CC_OP_SUBL: |
| 283 | return compute_c_subl(dst, src1); |
| 284 | |
| 285 | case CC_OP_SBBB: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 286 | return compute_c_sbbb(dst, src1, src2); |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 287 | case CC_OP_SBBW: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 288 | return compute_c_sbbw(dst, src1, src2); |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 289 | case CC_OP_SBBL: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 290 | return compute_c_sbbl(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 291 | |
| 292 | case CC_OP_SHLB: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 293 | return compute_c_shlb(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 294 | case CC_OP_SHLW: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 295 | return compute_c_shlw(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 296 | case CC_OP_SHLL: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 297 | return compute_c_shll(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 298 | |
Richard Henderson | bc4b43d | 2013-01-23 16:44:37 -0800 | [diff] [blame] | 299 | case CC_OP_BMILGB: |
| 300 | return compute_c_bmilgb(dst, src1); |
| 301 | case CC_OP_BMILGW: |
| 302 | return compute_c_bmilgw(dst, src1); |
| 303 | case CC_OP_BMILGL: |
| 304 | return compute_c_bmilgl(dst, src1); |
| 305 | |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 306 | #ifdef TARGET_X86_64 |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 307 | case CC_OP_ADDQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 308 | return compute_c_addq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 309 | case CC_OP_ADCQ: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 310 | return compute_c_adcq(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 311 | case CC_OP_SUBQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 312 | return compute_c_subq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 313 | case CC_OP_SBBQ: |
Richard Henderson | 988c3eb | 2013-01-23 16:03:16 -0800 | [diff] [blame] | 314 | return compute_c_sbbq(dst, src1, src2); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 315 | case CC_OP_SHLQ: |
Richard Henderson | 8601c0b | 2013-01-23 16:06:38 -0800 | [diff] [blame] | 316 | return compute_c_shlq(dst, src1); |
Richard Henderson | bc4b43d | 2013-01-23 16:44:37 -0800 | [diff] [blame] | 317 | case CC_OP_BMILGQ: |
| 318 | return compute_c_bmilgq(dst, src1); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 319 | #endif |
| 320 | } |
| 321 | } |
| 322 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 323 | void helper_write_eflags(CPUX86State *env, target_ulong t0, |
| 324 | uint32_t update_mask) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 325 | { |
| 326 | cpu_load_eflags(env, t0, update_mask); |
| 327 | } |
| 328 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 329 | target_ulong helper_read_eflags(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 330 | { |
| 331 | uint32_t eflags; |
| 332 | |
Richard Henderson | db9f259 | 2013-01-23 16:10:49 -0800 | [diff] [blame] | 333 | eflags = cpu_cc_compute_all(env, CC_OP); |
liguang | 80cf2c8 | 2013-05-28 16:21:08 +0800 | [diff] [blame] | 334 | eflags |= (env->df & DF_MASK); |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 335 | eflags |= env->eflags & ~(VM_MASK | RF_MASK); |
| 336 | return eflags; |
| 337 | } |
| 338 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 339 | void helper_clts(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 340 | { |
| 341 | env->cr[0] &= ~CR0_TS_MASK; |
| 342 | env->hflags &= ~HF_TS_MASK; |
| 343 | } |
| 344 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 345 | void helper_reset_rf(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 346 | { |
| 347 | env->eflags &= ~RF_MASK; |
| 348 | } |
| 349 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 350 | void helper_cli(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 351 | { |
| 352 | env->eflags &= ~IF_MASK; |
| 353 | } |
| 354 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 355 | void helper_sti(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 356 | { |
| 357 | env->eflags |= IF_MASK; |
| 358 | } |
| 359 | |
H. Peter Anvin | a9321a4 | 2012-09-26 13:18:43 -0700 | [diff] [blame] | 360 | void helper_clac(CPUX86State *env) |
| 361 | { |
| 362 | env->eflags &= ~AC_MASK; |
| 363 | } |
| 364 | |
| 365 | void helper_stac(CPUX86State *env) |
| 366 | { |
| 367 | env->eflags |= AC_MASK; |
| 368 | } |
| 369 | |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 370 | #if 0 |
| 371 | /* vm86plus instructions */ |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 372 | void helper_cli_vm(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 373 | { |
| 374 | env->eflags &= ~VIF_MASK; |
| 375 | } |
| 376 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 377 | void helper_sti_vm(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 378 | { |
| 379 | env->eflags |= VIF_MASK; |
| 380 | if (env->eflags & VIP_MASK) { |
| 381 | raise_exception(env, EXCP0D_GPF); |
| 382 | } |
| 383 | } |
| 384 | #endif |
| 385 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 386 | void helper_set_inhibit_irq(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 387 | { |
| 388 | env->hflags |= HF_INHIBIT_IRQ_MASK; |
| 389 | } |
| 390 | |
Blue Swirl | f0967a1 | 2012-04-29 12:45:34 +0000 | [diff] [blame] | 391 | void helper_reset_inhibit_irq(CPUX86State *env) |
Blue Swirl | 5918fff | 2012-04-29 12:21:21 +0000 | [diff] [blame] | 392 | { |
| 393 | env->hflags &= ~HF_INHIBIT_IRQ_MASK; |
| 394 | } |