ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Renesas SH7751R R2D-PLUS emulation |
| 3 | * |
| 4 | * Copyright (c) 2007 Magnus Damm |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 5 | * Copyright (c) 2008 Paul Mundt |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | * of this software and associated documentation files (the "Software"), to deal |
| 9 | * in the Software without restriction, including without limitation the rights |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | * copies of the Software, and to permit persons to whom the Software is |
| 12 | * furnished to do so, subject to the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice shall be included in |
| 15 | * all copies or substantial portions of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | * THE SOFTWARE. |
| 24 | */ |
| 25 | |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 26 | #include "hw.h" |
| 27 | #include "sh.h" |
blueswir1 | ffd3925 | 2008-11-05 20:24:35 +0000 | [diff] [blame] | 28 | #include "devices.h" |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 29 | #include "sysemu.h" |
| 30 | #include "boards.h" |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 31 | #include "pci.h" |
| 32 | #include "net.h" |
| 33 | #include "sh7750_regs.h" |
Gerd Hoffmann | 3d2bf4a | 2009-08-20 15:22:22 +0200 | [diff] [blame] | 34 | #include "ide.h" |
Blue Swirl | ca20cf3 | 2009-09-20 14:58:02 +0000 | [diff] [blame] | 35 | #include "loader.h" |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 36 | |
| 37 | #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ |
| 38 | #define SDRAM_SIZE 0x04000000 |
| 39 | |
blueswir1 | ffd3925 | 2008-11-05 20:24:35 +0000 | [diff] [blame] | 40 | #define SM501_VRAM_SIZE 0x800000 |
| 41 | |
aurel32 | e8afa065 | 2009-03-28 23:14:32 +0000 | [diff] [blame] | 42 | /* CONFIG_BOOT_LINK_OFFSET of Linux kernel */ |
| 43 | #define LINUX_LOAD_OFFSET 0x800000 |
| 44 | |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 45 | #define PA_IRLMSK 0x00 |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 46 | #define PA_POWOFF 0x30 |
| 47 | #define PA_VERREG 0x32 |
| 48 | #define PA_OUTPORT 0x36 |
| 49 | |
| 50 | typedef struct { |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 51 | uint16_t bcr; |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 52 | uint16_t irlmsk; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 53 | uint16_t irlmon; |
| 54 | uint16_t cfctl; |
| 55 | uint16_t cfpow; |
| 56 | uint16_t dispctl; |
| 57 | uint16_t sdmpow; |
| 58 | uint16_t rtcce; |
| 59 | uint16_t pcicd; |
| 60 | uint16_t voyagerrts; |
| 61 | uint16_t cfrst; |
| 62 | uint16_t admrts; |
| 63 | uint16_t extrst; |
| 64 | uint16_t cfcdintclr; |
| 65 | uint16_t keyctlclr; |
| 66 | uint16_t pad0; |
| 67 | uint16_t pad1; |
| 68 | uint16_t powoff; |
| 69 | uint16_t verreg; |
| 70 | uint16_t inport; |
| 71 | uint16_t outport; |
| 72 | uint16_t bverreg; |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 73 | |
| 74 | /* output pin */ |
| 75 | qemu_irq irl; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 76 | } r2d_fpga_t; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 77 | |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 78 | enum r2d_fpga_irq { |
| 79 | PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T, |
| 80 | SDCARD, PCI_INTA, PCI_INTB, EXT, TP, |
| 81 | NR_IRQS |
| 82 | }; |
| 83 | |
| 84 | static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = { |
| 85 | [CF_IDE] = { 1, 1<<9 }, |
| 86 | [CF_CD] = { 2, 1<<8 }, |
| 87 | [PCI_INTA] = { 9, 1<<14 }, |
| 88 | [PCI_INTB] = { 10, 1<<13 }, |
| 89 | [PCI_INTC] = { 3, 1<<12 }, |
| 90 | [PCI_INTD] = { 0, 1<<11 }, |
| 91 | [SM501] = { 4, 1<<10 }, |
| 92 | [KEY] = { 5, 1<<6 }, |
| 93 | [RTC_A] = { 6, 1<<5 }, |
| 94 | [RTC_T] = { 7, 1<<4 }, |
| 95 | [SDCARD] = { 8, 1<<7 }, |
| 96 | [EXT] = { 11, 1<<0 }, |
| 97 | [TP] = { 12, 1<<15 }, |
| 98 | }; |
| 99 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 100 | static void update_irl(r2d_fpga_t *fpga) |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 101 | { |
| 102 | int i, irl = 15; |
| 103 | for (i = 0; i < NR_IRQS; i++) |
| 104 | if (fpga->irlmon & fpga->irlmsk & irqtab[i].msk) |
| 105 | if (irqtab[i].irl < irl) |
| 106 | irl = irqtab[i].irl; |
| 107 | qemu_set_irq(fpga->irl, irl ^ 15); |
| 108 | } |
| 109 | |
| 110 | static void r2d_fpga_irq_set(void *opaque, int n, int level) |
| 111 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 112 | r2d_fpga_t *fpga = opaque; |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 113 | if (level) |
| 114 | fpga->irlmon |= irqtab[n].msk; |
| 115 | else |
| 116 | fpga->irlmon &= ~irqtab[n].msk; |
| 117 | update_irl(fpga); |
| 118 | } |
| 119 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 120 | static uint32_t r2d_fpga_read(void *opaque, target_phys_addr_t addr) |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 121 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 122 | r2d_fpga_t *s = opaque; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 123 | |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 124 | switch (addr) { |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 125 | case PA_IRLMSK: |
| 126 | return s->irlmsk; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 127 | case PA_OUTPORT: |
| 128 | return s->outport; |
| 129 | case PA_POWOFF: |
| 130 | return s->powoff; |
| 131 | case PA_VERREG: |
| 132 | return 0x10; |
| 133 | } |
| 134 | |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | static void |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 139 | r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value) |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 140 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 141 | r2d_fpga_t *s = opaque; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 142 | |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 143 | switch (addr) { |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 144 | case PA_IRLMSK: |
| 145 | s->irlmsk = value; |
| 146 | update_irl(s); |
| 147 | break; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 148 | case PA_OUTPORT: |
| 149 | s->outport = value; |
| 150 | break; |
| 151 | case PA_POWOFF: |
| 152 | s->powoff = value; |
| 153 | break; |
| 154 | case PA_VERREG: |
| 155 | /* Discard writes */ |
| 156 | break; |
| 157 | } |
| 158 | } |
| 159 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 160 | static CPUReadMemoryFunc * const r2d_fpga_readfn[] = { |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 161 | r2d_fpga_read, |
| 162 | r2d_fpga_read, |
aurel32 | b2463a6 | 2008-09-02 23:26:23 +0000 | [diff] [blame] | 163 | NULL, |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 164 | }; |
| 165 | |
Blue Swirl | d60efc6 | 2009-08-25 18:29:31 +0000 | [diff] [blame] | 166 | static CPUWriteMemoryFunc * const r2d_fpga_writefn[] = { |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 167 | r2d_fpga_write, |
| 168 | r2d_fpga_write, |
aurel32 | b2463a6 | 2008-09-02 23:26:23 +0000 | [diff] [blame] | 169 | NULL, |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 170 | }; |
| 171 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 172 | static qemu_irq *r2d_fpga_init(target_phys_addr_t base, qemu_irq irl) |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 173 | { |
| 174 | int iomemtype; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 175 | r2d_fpga_t *s; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 176 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 177 | s = qemu_mallocz(sizeof(r2d_fpga_t)); |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 178 | |
| 179 | s->irl = irl; |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 180 | |
Avi Kivity | 1eed09c | 2009-06-14 11:38:51 +0300 | [diff] [blame] | 181 | iomemtype = cpu_register_io_memory(r2d_fpga_readfn, |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 182 | r2d_fpga_writefn, s); |
| 183 | cpu_register_physical_memory(base, 0x40, iomemtype); |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 184 | return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS); |
aurel32 | b319feb | 2008-09-02 16:18:38 +0000 | [diff] [blame] | 185 | } |
| 186 | |
Juan Quintela | 5d4e84c | 2009-08-28 15:28:17 +0200 | [diff] [blame] | 187 | static void r2d_pci_set_irq(void *opaque, int n, int l) |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 188 | { |
Juan Quintela | 5d4e84c | 2009-08-28 15:28:17 +0200 | [diff] [blame] | 189 | qemu_irq *p = opaque; |
| 190 | |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 191 | qemu_set_irq(p[n], l); |
| 192 | } |
| 193 | |
| 194 | static int r2d_pci_map_irq(PCIDevice *d, int irq_num) |
| 195 | { |
| 196 | const int intx[] = { PCI_INTA, PCI_INTB, PCI_INTC, PCI_INTD }; |
| 197 | return intx[d->devfn >> 3]; |
| 198 | } |
| 199 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 200 | static void r2d_init(ram_addr_t ram_size, |
aliguori | 3023f33 | 2009-01-16 19:04:14 +0000 | [diff] [blame] | 201 | const char *boot_device, |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 202 | const char *kernel_filename, const char *kernel_cmdline, |
| 203 | const char *initrd_filename, const char *cpu_model) |
| 204 | { |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 205 | CPUState *env; |
| 206 | struct SH7750State *s; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 207 | ram_addr_t sdram_addr; |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 208 | qemu_irq *irq; |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 209 | PCIBus *pci; |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 210 | DriveInfo *dinfo; |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 211 | int i; |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 212 | |
bellard | aaed909 | 2007-11-10 15:15:54 +0000 | [diff] [blame] | 213 | if (!cpu_model) |
aurel32 | 0fd3ca3 | 2008-09-02 16:18:28 +0000 | [diff] [blame] | 214 | cpu_model = "SH7751R"; |
bellard | aaed909 | 2007-11-10 15:15:54 +0000 | [diff] [blame] | 215 | |
| 216 | env = cpu_init(cpu_model); |
| 217 | if (!env) { |
| 218 | fprintf(stderr, "Unable to find CPU definition\n"); |
| 219 | exit(1); |
| 220 | } |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 221 | |
| 222 | /* Allocate memory space */ |
blueswir1 | ffd3925 | 2008-11-05 20:24:35 +0000 | [diff] [blame] | 223 | sdram_addr = qemu_ram_alloc(SDRAM_SIZE); |
| 224 | cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, sdram_addr); |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 225 | /* Register peripherals */ |
| 226 | s = sh7750_init(env); |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 227 | irq = r2d_fpga_init(0x04000000, sh7750_irl(s)); |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 228 | pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4); |
balrog | d47ede6 | 2008-12-07 18:59:57 +0000 | [diff] [blame] | 229 | |
aurel32 | ac61134 | 2009-04-19 09:15:50 +0000 | [diff] [blame] | 230 | sm501_init(0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]); |
balrog | a4a771c | 2008-12-07 18:41:42 +0000 | [diff] [blame] | 231 | |
| 232 | /* onboard CF (True IDE mode, Master only). */ |
Gerd Hoffmann | 751c6a1 | 2009-07-22 16:42:57 +0200 | [diff] [blame] | 233 | if ((dinfo = drive_get(IF_IDE, 0, 0)) != NULL) |
aurel32 | ab2da56 | 2009-03-03 06:23:17 +0000 | [diff] [blame] | 234 | mmio_ide_init(0x14001000, 0x1400080c, irq[CF_IDE], 1, |
Gerd Hoffmann | f455e98 | 2009-08-28 15:47:03 +0200 | [diff] [blame] | 235 | dinfo, NULL); |
balrog | a4a771c | 2008-12-07 18:41:42 +0000 | [diff] [blame] | 236 | |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 237 | /* NIC: rtl8139 on-board, and 2 slots. */ |
aurel32 | ab2da56 | 2009-03-03 06:23:17 +0000 | [diff] [blame] | 238 | for (i = 0; i < nb_nics; i++) |
Markus Armbruster | 07caea3 | 2009-09-25 03:53:51 +0200 | [diff] [blame] | 239 | pci_nic_init_nofail(&nd_table[i], "rtl8139", i==0 ? "2" : NULL); |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 240 | |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 241 | /* Todo: register on board registers */ |
aurel32 | e8afa065 | 2009-03-28 23:14:32 +0000 | [diff] [blame] | 242 | if (kernel_filename) { |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 243 | int kernel_size; |
balrog | c2f0177 | 2008-12-07 19:20:43 +0000 | [diff] [blame] | 244 | /* initialization which should be done by firmware */ |
aurel32 | 0ec3ff5 | 2009-01-24 18:18:20 +0000 | [diff] [blame] | 245 | stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */ |
| 246 | stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */ |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 247 | |
aurel32 | e8afa065 | 2009-03-28 23:14:32 +0000 | [diff] [blame] | 248 | if (kernel_cmdline) { |
| 249 | kernel_size = load_image_targphys(kernel_filename, |
| 250 | SDRAM_BASE + LINUX_LOAD_OFFSET, |
| 251 | SDRAM_SIZE - LINUX_LOAD_OFFSET); |
| 252 | env->pc = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; |
Gerd Hoffmann | 3c178e7 | 2009-10-07 13:37:06 +0200 | [diff] [blame] | 253 | pstrcpy_targphys("cmdline", SDRAM_BASE + 0x10100, 256, kernel_cmdline); |
aurel32 | e8afa065 | 2009-03-28 23:14:32 +0000 | [diff] [blame] | 254 | } else { |
aurel32 | f3e3aa8 | 2009-03-28 23:18:47 +0000 | [diff] [blame] | 255 | kernel_size = load_image_targphys(kernel_filename, SDRAM_BASE, SDRAM_SIZE); |
aurel32 | e8afa065 | 2009-03-28 23:14:32 +0000 | [diff] [blame] | 256 | env->pc = SDRAM_BASE | 0xa0000000; /* Start from P2 area */ |
| 257 | } |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 258 | |
| 259 | if (kernel_size < 0) { |
| 260 | fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); |
| 261 | exit(1); |
| 262 | } |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 263 | } |
| 264 | } |
| 265 | |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 266 | static QEMUMachine r2d_machine = { |
aliguori | 4b32e16 | 2008-10-07 20:34:35 +0000 | [diff] [blame] | 267 | .name = "r2d", |
| 268 | .desc = "r2d-plus board", |
| 269 | .init = r2d_init, |
ths | 0d78f54 | 2007-09-29 19:24:41 +0000 | [diff] [blame] | 270 | }; |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 271 | |
| 272 | static void r2d_machine_init(void) |
| 273 | { |
| 274 | qemu_register_machine(&r2d_machine); |
| 275 | } |
| 276 | |
| 277 | machine_init(r2d_machine_init); |