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Richard Henderson61766fe2016-12-15 11:26:14 -08001/*
2 * QEMU HPPA CPU
3 *
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
19 */
20
21#include "qemu/osdep.h"
22#include "qapi/error.h"
Markus Armbruster04424282019-04-17 21:17:57 +020023#include "qemu/qemu-print.h"
Richard Henderson61766fe2016-12-15 11:26:14 -080024#include "cpu.h"
Markus Armbruster0b8fa322019-05-23 16:35:07 +020025#include "qemu/module.h"
Richard Henderson61766fe2016-12-15 11:26:14 -080026#include "exec/exec-all.h"
Alex Bennée24f91e82018-01-19 18:24:22 +000027#include "fpu/softfloat.h"
Richard Henderson61766fe2016-12-15 11:26:14 -080028
29
30static void hppa_cpu_set_pc(CPUState *cs, vaddr value)
31{
32 HPPACPU *cpu = HPPA_CPU(cs);
33
34 cpu->env.iaoq_f = value;
35 cpu->env.iaoq_b = value + 4;
36}
37
Richard Henderson04a37d42020-10-29 12:30:01 -070038static void hppa_cpu_synchronize_from_tb(CPUState *cs,
39 const TranslationBlock *tb)
Richard Henderson61766fe2016-12-15 11:26:14 -080040{
41 HPPACPU *cpu = HPPA_CPU(cs);
42
Richard Hendersonc301f342017-10-21 22:53:35 -070043#ifdef CONFIG_USER_ONLY
Richard Henderson61766fe2016-12-15 11:26:14 -080044 cpu->env.iaoq_f = tb->pc;
45 cpu->env.iaoq_b = tb->cs_base;
Richard Hendersonc301f342017-10-21 22:53:35 -070046#else
47 /* Recover the IAOQ values from the GVA + PRIV. */
48 uint32_t priv = (tb->flags >> TB_FLAG_PRIV_SHIFT) & 3;
49 target_ulong cs_base = tb->cs_base;
50 target_ulong iasq_f = cs_base & ~0xffffffffull;
51 int32_t diff = cs_base;
52
53 cpu->env.iasq_f = iasq_f;
54 cpu->env.iaoq_f = (tb->pc & ~iasq_f) + priv;
55 if (diff) {
56 cpu->env.iaoq_b = cpu->env.iaoq_f + diff;
57 }
58#endif
59
Richard Henderson3d68ee72017-10-09 10:17:24 -070060 cpu->env.psw_n = (tb->flags & PSW_N) != 0;
Richard Henderson61766fe2016-12-15 11:26:14 -080061}
62
Richard Henderson4f5f2542017-12-28 17:36:45 -080063static bool hppa_cpu_has_work(CPUState *cs)
64{
65 return cs->interrupt_request & CPU_INTERRUPT_HARD;
66}
67
Richard Henderson61766fe2016-12-15 11:26:14 -080068static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
69{
70 info->mach = bfd_mach_hppa20;
71 info->print_insn = print_insn_hppa;
72}
73
Claudio Fontana8535dd72021-02-04 17:39:19 +010074#ifndef CONFIG_USER_ONLY
Richard Henderson08aec8b2017-10-29 16:31:08 +010075static void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
76 MMUAccessType access_type,
77 int mmu_idx, uintptr_t retaddr)
78{
79 HPPACPU *cpu = HPPA_CPU(cs);
80 CPUHPPAState *env = &cpu->env;
81
82 cs->exception_index = EXCP_UNALIGN;
83 if (env->psw & PSW_Q) {
84 /* ??? Needs tweaking for hppa64. */
85 env->cr[CR_IOR] = addr;
86 env->cr[CR_ISR] = addr >> 32;
87 }
88
89 cpu_loop_exit_restore(cs, retaddr);
90}
Claudio Fontana8535dd72021-02-04 17:39:19 +010091#endif /* CONFIG_USER_ONLY */
Richard Henderson08aec8b2017-10-29 16:31:08 +010092
Richard Henderson61766fe2016-12-15 11:26:14 -080093static void hppa_cpu_realizefn(DeviceState *dev, Error **errp)
94{
95 CPUState *cs = CPU(dev);
96 HPPACPUClass *acc = HPPA_CPU_GET_CLASS(dev);
97 Error *local_err = NULL;
98
99 cpu_exec_realizefn(cs, &local_err);
100 if (local_err != NULL) {
101 error_propagate(errp, local_err);
102 return;
103 }
104
105 qemu_init_vcpu(cs);
106 acc->parent_realize(dev, errp);
Richard Henderson49c29d62017-12-28 17:50:14 -0800107
108#ifndef CONFIG_USER_ONLY
109 {
110 HPPACPU *cpu = HPPA_CPU(cs);
111 cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
112 hppa_cpu_alarm_timer, cpu);
113 }
114#endif
Richard Henderson61766fe2016-12-15 11:26:14 -0800115}
116
Richard Henderson61766fe2016-12-15 11:26:14 -0800117static void hppa_cpu_initfn(Object *obj)
118{
119 CPUState *cs = CPU(obj);
120 HPPACPU *cpu = HPPA_CPU(obj);
121 CPUHPPAState *env = &cpu->env;
122
Richard Henderson7506ed92019-03-28 11:26:22 -1000123 cpu_set_cpustate_pointers(cpu);
Richard Henderson1a19da02017-10-11 13:19:11 -0700124 cs->exception_index = -1;
Richard Henderson61766fe2016-12-15 11:26:14 -0800125 cpu_hppa_loaded_fr0(env);
Richard Henderson1a19da02017-10-11 13:19:11 -0700126 cpu_hppa_put_psw(env, PSW_W);
Richard Henderson61766fe2016-12-15 11:26:14 -0800127}
128
Igor Mammedov8fc24ad2017-08-24 18:31:33 +0200129static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
Richard Henderson61766fe2016-12-15 11:26:14 -0800130{
Igor Mammedov8fc24ad2017-08-24 18:31:33 +0200131 return object_class_by_name(TYPE_HPPA_CPU);
Richard Henderson61766fe2016-12-15 11:26:14 -0800132}
133
Philippe Mathieu-Daudé8b80bd22021-05-17 12:51:31 +0200134#ifndef CONFIG_USER_ONLY
135#include "hw/core/sysemu-cpu-ops.h"
136
137static const struct SysemuCPUOps hppa_sysemu_ops = {
Philippe Mathieu-Daudé08928c62021-05-17 12:51:37 +0200138 .get_phys_page_debug = hppa_cpu_get_phys_page_debug,
Philippe Mathieu-Daudé8b80bd22021-05-17 12:51:31 +0200139};
140#endif
141
Claudio Fontana78271682021-02-04 17:39:23 +0100142#include "hw/core/tcg-cpu-ops.h"
143
Richard Henderson11906552021-02-27 15:21:17 -0800144static const struct TCGCPUOps hppa_tcg_ops = {
Claudio Fontana78271682021-02-04 17:39:23 +0100145 .initialize = hppa_translate_init,
146 .synchronize_from_tb = hppa_cpu_synchronize_from_tb,
147 .cpu_exec_interrupt = hppa_cpu_exec_interrupt,
148 .tlb_fill = hppa_cpu_tlb_fill,
149
150#ifndef CONFIG_USER_ONLY
151 .do_interrupt = hppa_cpu_do_interrupt,
152 .do_unaligned_access = hppa_cpu_do_unaligned_access,
153#endif /* !CONFIG_USER_ONLY */
154};
155
Richard Henderson61766fe2016-12-15 11:26:14 -0800156static void hppa_cpu_class_init(ObjectClass *oc, void *data)
157{
158 DeviceClass *dc = DEVICE_CLASS(oc);
159 CPUClass *cc = CPU_CLASS(oc);
160 HPPACPUClass *acc = HPPA_CPU_CLASS(oc);
161
Philippe Mathieu-Daudébf853882018-01-13 23:04:12 -0300162 device_class_set_parent_realize(dc, hppa_cpu_realizefn,
163 &acc->parent_realize);
Richard Henderson61766fe2016-12-15 11:26:14 -0800164
Igor Mammedov8fc24ad2017-08-24 18:31:33 +0200165 cc->class_by_name = hppa_cpu_class_by_name;
Richard Henderson4f5f2542017-12-28 17:36:45 -0800166 cc->has_work = hppa_cpu_has_work;
Richard Henderson61766fe2016-12-15 11:26:14 -0800167 cc->dump_state = hppa_cpu_dump_state;
168 cc->set_pc = hppa_cpu_set_pc;
Richard Henderson61766fe2016-12-15 11:26:14 -0800169 cc->gdb_read_register = hppa_cpu_gdb_read_register;
170 cc->gdb_write_register = hppa_cpu_gdb_write_register;
Richard Henderson3c7bef02019-04-02 15:30:10 +0700171#ifndef CONFIG_USER_ONLY
Richard Hendersonc6436032017-11-20 11:06:04 +0100172 dc->vmsd = &vmstate_hppa_cpu;
Philippe Mathieu-Daudé8b80bd22021-05-17 12:51:31 +0200173 cc->sysemu_ops = &hppa_sysemu_ops;
Helge Deller813dff12017-10-01 22:11:45 +0200174#endif
Richard Henderson61766fe2016-12-15 11:26:14 -0800175 cc->disas_set_info = hppa_cpu_disas_set_info;
Richard Henderson61766fe2016-12-15 11:26:14 -0800176 cc->gdb_num_core_regs = 128;
Claudio Fontana78271682021-02-04 17:39:23 +0100177 cc->tcg_ops = &hppa_tcg_ops;
Richard Henderson61766fe2016-12-15 11:26:14 -0800178}
179
180static const TypeInfo hppa_cpu_type_info = {
181 .name = TYPE_HPPA_CPU,
182 .parent = TYPE_CPU,
183 .instance_size = sizeof(HPPACPU),
184 .instance_init = hppa_cpu_initfn,
185 .abstract = false,
186 .class_size = sizeof(HPPACPUClass),
187 .class_init = hppa_cpu_class_init,
188};
189
190static void hppa_cpu_register_types(void)
191{
192 type_register_static(&hppa_cpu_type_info);
193}
194
195type_init(hppa_cpu_register_types)