| bellard | 044ef8e | 2008-05-13 18:27:16 +0000 | [diff] [blame] | 1 | Correctness issues: |
| 2 | |
| bellard | bd7a7b3 | 2008-05-21 17:07:20 +0000 | [diff] [blame] | 3 | - some eflags manipulation incorrectly reset the bit 0x2. |
| bellard | 872929a | 2008-05-28 16:16:54 +0000 | [diff] [blame] | 4 | - SVM: test, cpu save/restore, SMM save/restore. |
| bellard | 044ef8e | 2008-05-13 18:27:16 +0000 | [diff] [blame] | 5 | - x86_64: lcall/ljmp intel/amd differences ? |
| bellard | 044ef8e | 2008-05-13 18:27:16 +0000 | [diff] [blame] | 6 | - better code fetch (different exception handling + CS.limit support) |
| 7 | - user/kernel PUSHL/POPL in helper.c |
| 8 | - add missing cpuid tests |
| 9 | - return UD exception if LOCK prefix incorrectly used |
| 10 | - test ldt limit < 7 ? |
| 11 | - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret) |
| 12 | - full support of segment limit/rights |
| 13 | - full x87 exception support |
| 14 | - improve x87 bit exactness (use bochs code ?) |
| bellard | b8b6a50 | 2008-05-15 16:46:30 +0000 | [diff] [blame] | 15 | - DRx register support |
| 16 | - CR0.AC emulation |
| 17 | - SSE alignment checks |
| bellard | 044ef8e | 2008-05-13 18:27:16 +0000 | [diff] [blame] | 18 | |
| 19 | Optimizations/Features: |
| 20 | |
| bellard | b8b6a50 | 2008-05-15 16:46:30 +0000 | [diff] [blame] | 21 | - add SVM nested paging support |
| 22 | - add VMX support |
| 23 | - add AVX support |
| 24 | - add SSE5 support |
| bellard | 12e26b7 | 2008-05-22 10:13:38 +0000 | [diff] [blame] | 25 | - fxsave/fxrstor AMD extensions |
| 26 | - improve monitor/mwait support |
| bellard | 3bd7da9 | 2008-05-21 16:34:06 +0000 | [diff] [blame] | 27 | - faster EFLAGS update: consider SZAP, C, O can be updated separately |
| 28 | with a bit field in CC_OP and more state variables. |
| bellard | 044ef8e | 2008-05-13 18:27:16 +0000 | [diff] [blame] | 29 | - evaluate x87 stack pointer statically |
| 30 | - find a way to avoid translating several time the same TB if CR0.TS |
| 31 | is set or not. |
