aurel32 | 8dd3dca | 2008-05-04 13:11:44 +0000 | [diff] [blame] | 1 | #include "hw/hw.h" |
| 2 | #include "hw/boards.h" |
| 3 | |
edgar_igl | 877d8ad | 2008-06-09 23:44:20 +0000 | [diff] [blame] | 4 | void cpu_save(QEMUFile *f, void *opaque) |
| 5 | { |
| 6 | CPUCRISState *env = opaque; |
| 7 | int i; |
| 8 | int s; |
| 9 | int mmu; |
| 10 | |
| 11 | for (i = 0; i < 16; i++) |
| 12 | qemu_put_be32(f, env->regs[i]); |
| 13 | for (i = 0; i < 16; i++) |
| 14 | qemu_put_be32(f, env->pregs[i]); |
| 15 | |
| 16 | qemu_put_be32(f, env->pc); |
| 17 | qemu_put_be32(f, env->ksp); |
| 18 | |
| 19 | qemu_put_be32(f, env->dslot); |
| 20 | qemu_put_be32(f, env->btaken); |
| 21 | qemu_put_be32(f, env->btarget); |
| 22 | |
| 23 | qemu_put_be32(f, env->cc_op); |
| 24 | qemu_put_be32(f, env->cc_mask); |
| 25 | qemu_put_be32(f, env->cc_dest); |
| 26 | qemu_put_be32(f, env->cc_src); |
| 27 | qemu_put_be32(f, env->cc_result); |
| 28 | qemu_put_be32(f, env->cc_size); |
| 29 | qemu_put_be32(f, env->cc_x); |
| 30 | |
edgar_igl | d488ddd | 2009-03-03 18:07:11 +0000 | [diff] [blame] | 31 | for (s = 0; s < 4; s++) { |
edgar_igl | 877d8ad | 2008-06-09 23:44:20 +0000 | [diff] [blame] | 32 | for (i = 0; i < 16; i++) |
| 33 | qemu_put_be32(f, env->sregs[s][i]); |
| 34 | } |
| 35 | |
| 36 | qemu_put_be32(f, env->mmu_rand_lfsr); |
| 37 | for (mmu = 0; mmu < 2; mmu++) { |
edgar_igl | d488ddd | 2009-03-03 18:07:11 +0000 | [diff] [blame] | 38 | for (s = 0; s < 4; s++) { |
edgar_igl | 877d8ad | 2008-06-09 23:44:20 +0000 | [diff] [blame] | 39 | for (i = 0; i < 16; i++) { |
| 40 | qemu_put_be32(f, env->tlbsets[mmu][s][i].lo); |
| 41 | qemu_put_be32(f, env->tlbsets[mmu][s][i].hi); |
| 42 | } |
| 43 | } |
| 44 | } |
| 45 | } |
| 46 | |
| 47 | int cpu_load(QEMUFile *f, void *opaque, int version_id) |
| 48 | { |
| 49 | CPUCRISState *env = opaque; |
| 50 | int i; |
| 51 | int s; |
| 52 | int mmu; |
| 53 | |
| 54 | for (i = 0; i < 16; i++) |
| 55 | env->regs[i] = qemu_get_be32(f); |
| 56 | for (i = 0; i < 16; i++) |
| 57 | env->pregs[i] = qemu_get_be32(f); |
| 58 | |
| 59 | env->pc = qemu_get_be32(f); |
| 60 | env->ksp = qemu_get_be32(f); |
| 61 | |
| 62 | env->dslot = qemu_get_be32(f); |
| 63 | env->btaken = qemu_get_be32(f); |
| 64 | env->btarget = qemu_get_be32(f); |
| 65 | |
| 66 | env->cc_op = qemu_get_be32(f); |
| 67 | env->cc_mask = qemu_get_be32(f); |
| 68 | env->cc_dest = qemu_get_be32(f); |
| 69 | env->cc_src = qemu_get_be32(f); |
| 70 | env->cc_result = qemu_get_be32(f); |
| 71 | env->cc_size = qemu_get_be32(f); |
| 72 | env->cc_x = qemu_get_be32(f); |
| 73 | |
edgar_igl | d488ddd | 2009-03-03 18:07:11 +0000 | [diff] [blame] | 74 | for (s = 0; s < 4; s++) { |
edgar_igl | 877d8ad | 2008-06-09 23:44:20 +0000 | [diff] [blame] | 75 | for (i = 0; i < 16; i++) |
| 76 | env->sregs[s][i] = qemu_get_be32(f); |
| 77 | } |
| 78 | |
| 79 | env->mmu_rand_lfsr = qemu_get_be32(f); |
| 80 | for (mmu = 0; mmu < 2; mmu++) { |
edgar_igl | d488ddd | 2009-03-03 18:07:11 +0000 | [diff] [blame] | 81 | for (s = 0; s < 4; s++) { |
edgar_igl | 877d8ad | 2008-06-09 23:44:20 +0000 | [diff] [blame] | 82 | for (i = 0; i < 16; i++) { |
| 83 | env->tlbsets[mmu][s][i].lo = qemu_get_be32(f); |
| 84 | env->tlbsets[mmu][s][i].hi = qemu_get_be32(f); |
| 85 | } |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | return 0; |
| 90 | } |