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bellardb9adb4a2003-04-29 20:41:16 +00001/* General "disassemble this chunk" code. Used for debugging. */
Peter Maydelld38ea872016-01-29 17:50:05 +00002#include "qemu/osdep.h"
Markus Armbruster3979fca2019-04-17 21:18:04 +02003#include "disas/dis-asm.h"
bellardb9adb4a2003-04-29 20:41:16 +00004#include "elf.h"
Markus Armbruster30cc9832019-04-17 21:18:03 +02005#include "qemu/qemu-print.h"
bellardb9adb4a2003-04-29 20:41:16 +00006
bellardc6105c02003-10-27 21:13:58 +00007#include "cpu.h"
Paolo Bonzini76cad712012-10-24 11:12:21 +02008#include "disas/disas.h"
Richard Henderson8ca80762017-09-14 09:41:12 -07009#include "disas/capstone.h"
bellardc6105c02003-10-27 21:13:58 +000010
Blue Swirlf4359b92012-09-08 12:40:00 +000011typedef struct CPUDebug {
12 struct disassemble_info info;
Peter Crosthwaited49190c2015-05-24 14:20:41 -070013 CPUState *cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +000014} CPUDebug;
15
bellardb9adb4a2003-04-29 20:41:16 +000016/* Filled in by elfload.c. Simplistic, but will do for now. */
bellarde80cfcf2004-12-19 23:18:01 +000017struct syminfo *syminfos = NULL;
bellardb9adb4a2003-04-29 20:41:16 +000018
bellardaa0aa4f2003-06-09 15:23:31 +000019/* Get LENGTH bytes from info's buffer, at target address memaddr.
20 Transfer them to myaddr. */
21int
pbrook3a742b72008-10-22 15:55:18 +000022buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
23 struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000024{
bellardc6105c02003-10-27 21:13:58 +000025 if (memaddr < info->buffer_vma
26 || memaddr + length > info->buffer_vma + info->buffer_length)
27 /* Out of bounds. Use EIO because GDB uses it. */
28 return EIO;
29 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
30 return 0;
bellardaa0aa4f2003-06-09 15:23:31 +000031}
32
bellardc6105c02003-10-27 21:13:58 +000033/* Get LENGTH bytes from info's buffer, at target address memaddr.
34 Transfer them to myaddr. */
35static int
bellardc27004e2005-01-03 23:35:10 +000036target_read_memory (bfd_vma memaddr,
37 bfd_byte *myaddr,
38 int length,
39 struct disassemble_info *info)
bellardc6105c02003-10-27 21:13:58 +000040{
Blue Swirlf4359b92012-09-08 12:40:00 +000041 CPUDebug *s = container_of(info, CPUDebug, info);
42
Peter Crosthwaited49190c2015-05-24 14:20:41 -070043 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
bellardc6105c02003-10-27 21:13:58 +000044 return 0;
45}
bellardc6105c02003-10-27 21:13:58 +000046
bellardaa0aa4f2003-06-09 15:23:31 +000047/* Print an error message. We can assume that this is in response to
48 an error return from buffer_read_memory. */
49void
pbrook3a742b72008-10-22 15:55:18 +000050perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000051{
52 if (status != EIO)
53 /* Can't happen. */
54 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
55 else
56 /* Actually, address between memaddr and memaddr + len was
57 out of bounds. */
58 (*info->fprintf_func) (info->stream,
bellard26a76462006-06-25 18:15:32 +000059 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
bellardaa0aa4f2003-06-09 15:23:31 +000060}
61
Jim Meyeringa31f0532012-05-09 05:12:04 +000062/* This could be in a separate file, to save minuscule amounts of space
bellardaa0aa4f2003-06-09 15:23:31 +000063 in statically linked executables. */
64
65/* Just print the address is hex. This is included for completeness even
66 though both GDB and objdump provide their own (to print symbolic
67 addresses). */
68
69void
pbrook3a742b72008-10-22 15:55:18 +000070generic_print_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000071{
bellard26a76462006-06-25 18:15:32 +000072 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
bellardaa0aa4f2003-06-09 15:23:31 +000073}
74
Peter Maydell636bd282012-06-25 04:55:55 +000075/* Print address in hex, truncated to the width of a host virtual address. */
76static void
77generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
78{
79 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr & mask, info);
81}
82
bellardaa0aa4f2003-06-09 15:23:31 +000083/* Just return the given address. */
84
85int
pbrook3a742b72008-10-22 15:55:18 +000086generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000087{
88 return 1;
89}
90
Aurelien Jarno903ec552010-03-29 02:12:51 +020091bfd_vma bfd_getl64 (const bfd_byte *addr)
92{
93 unsigned long long v;
94
95 v = (unsigned long long) addr[0];
96 v |= (unsigned long long) addr[1] << 8;
97 v |= (unsigned long long) addr[2] << 16;
98 v |= (unsigned long long) addr[3] << 24;
99 v |= (unsigned long long) addr[4] << 32;
100 v |= (unsigned long long) addr[5] << 40;
101 v |= (unsigned long long) addr[6] << 48;
102 v |= (unsigned long long) addr[7] << 56;
103 return (bfd_vma) v;
104}
105
bellardaa0aa4f2003-06-09 15:23:31 +0000106bfd_vma bfd_getl32 (const bfd_byte *addr)
107{
108 unsigned long v;
109
110 v = (unsigned long) addr[0];
111 v |= (unsigned long) addr[1] << 8;
112 v |= (unsigned long) addr[2] << 16;
113 v |= (unsigned long) addr[3] << 24;
114 return (bfd_vma) v;
115}
116
117bfd_vma bfd_getb32 (const bfd_byte *addr)
118{
119 unsigned long v;
120
121 v = (unsigned long) addr[0] << 24;
122 v |= (unsigned long) addr[1] << 16;
123 v |= (unsigned long) addr[2] << 8;
124 v |= (unsigned long) addr[3];
125 return (bfd_vma) v;
126}
127
bellard6af0bf92005-07-02 14:58:51 +0000128bfd_vma bfd_getl16 (const bfd_byte *addr)
129{
130 unsigned long v;
131
132 v = (unsigned long) addr[0];
133 v |= (unsigned long) addr[1] << 8;
134 return (bfd_vma) v;
135}
136
137bfd_vma bfd_getb16 (const bfd_byte *addr)
138{
139 unsigned long v;
140
141 v = (unsigned long) addr[0] << 24;
142 v |= (unsigned long) addr[1] << 16;
143 return (bfd_vma) v;
144}
145
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700146static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
147 const char *prefix)
148{
149 int i, n = info->buffer_length;
150 uint8_t *buf = g_malloc(n);
151
152 info->read_memory_func(pc, buf, n, info);
153
154 for (i = 0; i < n; ++i) {
155 if (i % 32 == 0) {
156 info->fprintf_func(info->stream, "\n%s: ", prefix);
157 }
158 info->fprintf_func(info->stream, "%02x", buf[i]);
159 }
160
161 g_free(buf);
162 return n;
163}
164
165static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
166{
167 return print_insn_objdump(pc, info, "OBJD-H");
168}
169
170static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
171{
172 return print_insn_objdump(pc, info, "OBJD-T");
173}
174
Richard Henderson8ca80762017-09-14 09:41:12 -0700175#ifdef CONFIG_CAPSTONE
176/* Temporary storage for the capstone library. This will be alloced via
177 malloc with a size private to the library; thus there's no reason not
178 to share this across calls and across host vs target disassembly. */
179static __thread cs_insn *cap_insn;
180
181/* Initialize the Capstone library. */
182/* ??? It would be nice to cache this. We would need one handle for the
183 host and one for the target. For most targets we can reset specific
184 parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change
185 CS_ARCH_* in this way. Thus we would need to be able to close and
186 re-open the target handle with a different arch for the target in order
187 to handle AArch64 vs AArch32 mode switching. */
188static cs_err cap_disas_start(disassemble_info *info, csh *handle)
189{
190 cs_mode cap_mode = info->cap_mode;
191 cs_err err;
192
193 cap_mode += (info->endian == BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN
194 : CS_MODE_LITTLE_ENDIAN);
195
196 err = cs_open(info->cap_arch, cap_mode, handle);
197 if (err != CS_ERR_OK) {
198 return err;
199 }
200
201 /* ??? There probably ought to be a better place to put this. */
202 if (info->cap_arch == CS_ARCH_X86) {
203 /* We don't care about errors (if for some reason the library
204 is compiled without AT&T syntax); the user will just have
205 to deal with the Intel syntax. */
206 cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);
207 }
208
209 /* "Disassemble" unknown insns as ".byte W,X,Y,Z". */
210 cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON);
211
212 /* Allocate temp space for cs_disasm_iter. */
213 if (cap_insn == NULL) {
214 cap_insn = cs_malloc(*handle);
215 if (cap_insn == NULL) {
216 cs_close(handle);
217 return CS_ERR_MEM;
218 }
219 }
220 return CS_ERR_OK;
221}
222
Richard Henderson15fa1a02017-11-07 13:19:18 +0100223static void cap_dump_insn_units(disassemble_info *info, cs_insn *insn,
224 int i, int n)
225{
226 fprintf_function print = info->fprintf_func;
227 FILE *stream = info->stream;
228
229 switch (info->cap_insn_unit) {
230 case 4:
231 if (info->endian == BFD_ENDIAN_BIG) {
232 for (; i < n; i += 4) {
233 print(stream, " %08x", ldl_be_p(insn->bytes + i));
234
235 }
236 } else {
237 for (; i < n; i += 4) {
238 print(stream, " %08x", ldl_le_p(insn->bytes + i));
239 }
240 }
241 break;
242
243 case 2:
244 if (info->endian == BFD_ENDIAN_BIG) {
245 for (; i < n; i += 2) {
246 print(stream, " %04x", lduw_be_p(insn->bytes + i));
247 }
248 } else {
249 for (; i < n; i += 2) {
250 print(stream, " %04x", lduw_le_p(insn->bytes + i));
251 }
252 }
253 break;
254
255 default:
256 for (; i < n; i++) {
257 print(stream, " %02x", insn->bytes[i]);
258 }
259 break;
260 }
261}
262
263static void cap_dump_insn(disassemble_info *info, cs_insn *insn)
264{
265 fprintf_function print = info->fprintf_func;
266 int i, n, split;
267
268 print(info->stream, "0x%08" PRIx64 ": ", insn->address);
269
270 n = insn->size;
271 split = info->cap_insn_split;
272
273 /* Dump the first SPLIT bytes of the instruction. */
274 cap_dump_insn_units(info, insn, 0, MIN(n, split));
275
276 /* Add padding up to SPLIT so that mnemonics line up. */
277 if (n < split) {
278 int width = (split - n) / info->cap_insn_unit;
279 width *= (2 * info->cap_insn_unit + 1);
280 print(info->stream, "%*s", width, "");
281 }
282
283 /* Print the actual instruction. */
284 print(info->stream, " %-8s %s\n", insn->mnemonic, insn->op_str);
285
286 /* Dump any remaining part of the insn on subsequent lines. */
287 for (i = split; i < n; i += split) {
288 print(info->stream, "0x%08" PRIx64 ": ", insn->address + i);
289 cap_dump_insn_units(info, insn, i, MIN(n, i + split));
290 print(info->stream, "\n");
291 }
292}
293
Richard Henderson8ca80762017-09-14 09:41:12 -0700294/* Disassemble SIZE bytes at PC for the target. */
295static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size)
296{
297 uint8_t cap_buf[1024];
298 csh handle;
299 cs_insn *insn;
300 size_t csize = 0;
301
302 if (cap_disas_start(info, &handle) != CS_ERR_OK) {
303 return false;
304 }
305 insn = cap_insn;
306
307 while (1) {
308 size_t tsize = MIN(sizeof(cap_buf) - csize, size);
309 const uint8_t *cbuf = cap_buf;
310
311 target_read_memory(pc + csize, cap_buf + csize, tsize, info);
312 csize += tsize;
313 size -= tsize;
314
315 while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
Richard Henderson15fa1a02017-11-07 13:19:18 +0100316 cap_dump_insn(info, insn);
Richard Henderson8ca80762017-09-14 09:41:12 -0700317 }
318
319 /* If the target memory is not consumed, go back for more... */
320 if (size != 0) {
321 /* ... taking care to move any remaining fractional insn
322 to the beginning of the buffer. */
323 if (csize != 0) {
324 memmove(cap_buf, cbuf, csize);
325 }
326 continue;
327 }
328
329 /* Since the target memory is consumed, we should not have
330 a remaining fractional insn. */
331 if (csize != 0) {
332 (*info->fprintf_func)(info->stream,
333 "Disassembler disagrees with translator "
334 "over instruction decoding\n"
335 "Please report this to qemu-devel@nongnu.org\n");
336 }
337 break;
338 }
339
340 cs_close(&handle);
341 return true;
342}
343
344/* Disassemble SIZE bytes at CODE for the host. */
345static bool cap_disas_host(disassemble_info *info, void *code, size_t size)
346{
347 csh handle;
348 const uint8_t *cbuf;
349 cs_insn *insn;
350 uint64_t pc;
351
352 if (cap_disas_start(info, &handle) != CS_ERR_OK) {
353 return false;
354 }
355 insn = cap_insn;
356
357 cbuf = code;
358 pc = (uintptr_t)code;
359
360 while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) {
Richard Henderson15fa1a02017-11-07 13:19:18 +0100361 cap_dump_insn(info, insn);
Richard Henderson8ca80762017-09-14 09:41:12 -0700362 }
363 if (size != 0) {
364 (*info->fprintf_func)(info->stream,
365 "Disassembler disagrees with TCG over instruction encoding\n"
366 "Please report this to qemu-devel@nongnu.org\n");
367 }
368
369 cs_close(&handle);
370 return true;
371}
372
373#if !defined(CONFIG_USER_ONLY)
374/* Disassemble COUNT insns at PC for the target. */
375static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count)
376{
377 uint8_t cap_buf[32];
378 csh handle;
379 cs_insn *insn;
380 size_t csize = 0;
381
382 if (cap_disas_start(info, &handle) != CS_ERR_OK) {
383 return false;
384 }
385 insn = cap_insn;
386
387 while (1) {
388 /* We want to read memory for one insn, but generically we do not
389 know how much memory that is. We have a small buffer which is
390 known to be sufficient for all supported targets. Try to not
391 read beyond the page, Just In Case. For even more simplicity,
392 ignore the actual target page size and use a 1k boundary. If
393 that turns out to be insufficient, we'll come back around the
394 loop and read more. */
395 uint64_t epc = QEMU_ALIGN_UP(pc + csize + 1, 1024);
396 size_t tsize = MIN(sizeof(cap_buf) - csize, epc - pc);
397 const uint8_t *cbuf = cap_buf;
398
399 /* Make certain that we can make progress. */
400 assert(tsize != 0);
401 info->read_memory_func(pc, cap_buf + csize, tsize, info);
402 csize += tsize;
403
404 if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
Richard Henderson15fa1a02017-11-07 13:19:18 +0100405 cap_dump_insn(info, insn);
Richard Henderson8ca80762017-09-14 09:41:12 -0700406 if (--count <= 0) {
407 break;
408 }
409 }
410 memmove(cap_buf, cbuf, csize);
411 }
412
413 cs_close(&handle);
414 return true;
415}
416#endif /* !CONFIG_USER_ONLY */
417#else
418# define cap_disas_target(i, p, s) false
419# define cap_disas_host(i, p, s) false
420# define cap_disas_monitor(i, p, c) false
Alex Bennéecbafa232019-05-22 10:27:14 +0100421# define cap_disas_plugin(i, p, c) false
Richard Henderson8ca80762017-09-14 09:41:12 -0700422#endif /* CONFIG_CAPSTONE */
423
Richard Henderson1d484742017-09-14 08:38:35 -0700424/* Disassemble this for me please... (debugging). */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700425void target_disas(FILE *out, CPUState *cpu, target_ulong code,
Richard Henderson1d484742017-09-14 08:38:35 -0700426 target_ulong size)
bellardb9adb4a2003-04-29 20:41:16 +0000427{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700428 CPUClass *cc = CPU_GET_CLASS(cpu);
bellardc27004e2005-01-03 23:35:10 +0000429 target_ulong pc;
bellardb9adb4a2003-04-29 20:41:16 +0000430 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000431 CPUDebug s;
bellardb9adb4a2003-04-29 20:41:16 +0000432
Blue Swirlf4359b92012-09-08 12:40:00 +0000433 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
bellardb9adb4a2003-04-29 20:41:16 +0000434
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700435 s.cpu = cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +0000436 s.info.read_memory_func = target_read_memory;
437 s.info.buffer_vma = code;
438 s.info.buffer_length = size;
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700439 s.info.print_address_func = generic_print_address;
Richard Henderson8ca80762017-09-14 09:41:12 -0700440 s.info.cap_arch = -1;
441 s.info.cap_mode = 0;
Richard Henderson15fa1a02017-11-07 13:19:18 +0100442 s.info.cap_insn_unit = 4;
443 s.info.cap_insn_split = 4;
bellardc27004e2005-01-03 23:35:10 +0000444
445#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000446 s.info.endian = BFD_ENDIAN_BIG;
bellardc27004e2005-01-03 23:35:10 +0000447#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000448 s.info.endian = BFD_ENDIAN_LITTLE;
bellardc6105c02003-10-27 21:13:58 +0000449#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700450
451 if (cc->disas_set_info) {
452 cc->disas_set_info(cpu, &s.info);
453 }
454
Richard Henderson8ca80762017-09-14 09:41:12 -0700455 if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
456 return;
457 }
458
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700459 if (s.info.print_insn == NULL) {
460 s.info.print_insn = print_insn_od_target;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700461 }
bellardc27004e2005-01-03 23:35:10 +0000462
blueswir17e000c22009-02-13 21:44:41 +0000463 for (pc = code; size > 0; pc += count, size -= count) {
bellardfa15e032005-01-31 23:32:31 +0000464 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700465 count = s.info.print_insn(pc, &s.info);
bellardc27004e2005-01-03 23:35:10 +0000466 fprintf(out, "\n");
467 if (count < 0)
468 break;
malc754d00a2009-04-21 22:26:22 +0000469 if (size < count) {
470 fprintf(out,
471 "Disassembler disagrees with translator over instruction "
472 "decoding\n"
473 "Please report this to qemu-devel@nongnu.org\n");
474 break;
475 }
bellardc27004e2005-01-03 23:35:10 +0000476 }
477}
478
Alex Bennéecbafa232019-05-22 10:27:14 +0100479static __thread GString plugin_disas_output;
480
481static int plugin_printf(FILE *stream, const char *fmt, ...)
482{
483 va_list va;
484 GString *s = &plugin_disas_output;
485 int initial_len = s->len;
486
487 va_start(va, fmt);
488 g_string_append_vprintf(s, fmt, va);
489 va_end(va);
490
491 return s->len - initial_len;
492}
493
494static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
495{
496 /* does nothing */
497}
498
499
500#ifdef CONFIG_CAPSTONE
501/* Disassemble a single instruction directly into plugin output */
502static
503bool cap_disas_plugin(disassemble_info *info, uint64_t pc, size_t size)
504{
505 uint8_t cap_buf[1024];
506 csh handle;
507 cs_insn *insn;
508 size_t csize = 0;
509 int count;
510 GString *s = &plugin_disas_output;
511
512 if (cap_disas_start(info, &handle) != CS_ERR_OK) {
513 return false;
514 }
515 insn = cap_insn;
516
517 size_t tsize = MIN(sizeof(cap_buf) - csize, size);
518 const uint8_t *cbuf = cap_buf;
519 target_read_memory(pc, cap_buf, tsize, info);
520
521 count = cs_disasm(handle, cbuf, size, 0, 1, &insn);
522
523 if (count) {
524 g_string_printf(s, "%s %s", insn->mnemonic, insn->op_str);
525 } else {
526 g_string_printf(s, "cs_disasm failed");
527 }
528
529 cs_close(&handle);
530 return true;
531}
532#endif
533
534/*
535 * We should only be dissembling one instruction at a time here. If
536 * there is left over it usually indicates the front end has read more
537 * bytes than it needed.
538 */
539char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
540{
541 CPUClass *cc = CPU_GET_CLASS(cpu);
542 int count;
543 CPUDebug s;
544 GString *ds = g_string_set_size(&plugin_disas_output, 0);
545
546 g_assert(ds == &plugin_disas_output);
547
548 INIT_DISASSEMBLE_INFO(s.info, NULL, plugin_printf);
549
550 s.cpu = cpu;
551 s.info.read_memory_func = target_read_memory;
552 s.info.buffer_vma = addr;
553 s.info.buffer_length = size;
554 s.info.print_address_func = plugin_print_address;
555 s.info.cap_arch = -1;
556 s.info.cap_mode = 0;
557 s.info.cap_insn_unit = 4;
558 s.info.cap_insn_split = 4;
559
560#ifdef TARGET_WORDS_BIGENDIAN
561 s.info.endian = BFD_ENDIAN_BIG;
562#else
563 s.info.endian = BFD_ENDIAN_LITTLE;
564#endif
565
566 if (cc->disas_set_info) {
567 cc->disas_set_info(cpu, &s.info);
568 }
569
570 if (s.info.cap_arch >= 0 && cap_disas_plugin(&s.info, addr, size)) {
571 return g_strdup(ds->str);
572 }
573
574 if (s.info.print_insn == NULL) {
575 s.info.print_insn = print_insn_od_target;
576 }
577
578 count = s.info.print_insn(addr, &s.info);
579
580 /* The decoder probably read more than it needed it's not critical */
581 if (count < size) {
582 warn_report("%s: %zu bytes left over", __func__, size - count);
583 }
584
585 return g_strdup(ds->str);
586}
587
bellardc27004e2005-01-03 23:35:10 +0000588/* Disassemble this for me please... (debugging). */
589void disas(FILE *out, void *code, unsigned long size)
590{
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200591 uintptr_t pc;
bellardc27004e2005-01-03 23:35:10 +0000592 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000593 CPUDebug s;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700594 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
bellardc27004e2005-01-03 23:35:10 +0000595
Blue Swirlf4359b92012-09-08 12:40:00 +0000596 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
597 s.info.print_address_func = generic_print_host_address;
bellardc6105c02003-10-27 21:13:58 +0000598
Blue Swirlf4359b92012-09-08 12:40:00 +0000599 s.info.buffer = code;
600 s.info.buffer_vma = (uintptr_t)code;
601 s.info.buffer_length = size;
Richard Henderson8ca80762017-09-14 09:41:12 -0700602 s.info.cap_arch = -1;
603 s.info.cap_mode = 0;
Richard Henderson15fa1a02017-11-07 13:19:18 +0100604 s.info.cap_insn_unit = 4;
605 s.info.cap_insn_split = 4;
bellardb9adb4a2003-04-29 20:41:16 +0000606
Juan Quintelae2542fe2009-07-27 16:13:06 +0200607#ifdef HOST_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000608 s.info.endian = BFD_ENDIAN_BIG;
bellardb9adb4a2003-04-29 20:41:16 +0000609#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000610 s.info.endian = BFD_ENDIAN_LITTLE;
bellardb9adb4a2003-04-29 20:41:16 +0000611#endif
Stefan Weil5826e512011-10-05 20:03:53 +0200612#if defined(CONFIG_TCG_INTERPRETER)
613 print_insn = print_insn_tci;
614#elif defined(__i386__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000615 s.info.mach = bfd_mach_i386_i386;
bellardc27004e2005-01-03 23:35:10 +0000616 print_insn = print_insn_i386;
Richard Hendersonb666d2a2017-09-14 09:50:05 -0700617 s.info.cap_arch = CS_ARCH_X86;
618 s.info.cap_mode = CS_MODE_32;
Richard Henderson15fa1a02017-11-07 13:19:18 +0100619 s.info.cap_insn_unit = 1;
620 s.info.cap_insn_split = 8;
bellardbc51c5c2004-03-17 23:46:04 +0000621#elif defined(__x86_64__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000622 s.info.mach = bfd_mach_x86_64;
bellardc27004e2005-01-03 23:35:10 +0000623 print_insn = print_insn_i386;
Richard Hendersonb666d2a2017-09-14 09:50:05 -0700624 s.info.cap_arch = CS_ARCH_X86;
625 s.info.cap_mode = CS_MODE_64;
Richard Henderson15fa1a02017-11-07 13:19:18 +0100626 s.info.cap_insn_unit = 1;
627 s.info.cap_insn_split = 8;
malce58ffeb2009-01-14 18:39:49 +0000628#elif defined(_ARCH_PPC)
Richard Henderson66d4f6a2013-01-31 11:16:21 -0800629 s.info.disassembler_options = (char *)"any";
bellardc27004e2005-01-03 23:35:10 +0000630 print_insn = print_insn_ppc;
Richard Hendersonac226892017-09-14 10:38:40 -0700631 s.info.cap_arch = CS_ARCH_PPC;
632# ifdef _ARCH_PPC64
633 s.info.cap_mode = CS_MODE_64;
634# endif
Alistair Francis91468b22018-12-19 19:20:09 +0000635#elif defined(__riscv) && defined(CONFIG_RISCV_DIS)
636#if defined(_ILP32) || (__riscv_xlen == 32)
637 print_insn = print_insn_riscv32;
638#elif defined(_LP64)
639 print_insn = print_insn_riscv64;
640#else
641#error unsupported RISC-V ABI
642#endif
Claudio Fontana999b53e2014-02-05 17:27:28 +0000643#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
644 print_insn = print_insn_arm_a64;
Richard Henderson110f6c72017-09-14 09:51:06 -0700645 s.info.cap_arch = CS_ARCH_ARM64;
bellarda993ba82003-05-11 12:25:45 +0000646#elif defined(__alpha__)
bellardc27004e2005-01-03 23:35:10 +0000647 print_insn = print_insn_alpha;
bellardaa0aa4f2003-06-09 15:23:31 +0000648#elif defined(__sparc__)
bellardc27004e2005-01-03 23:35:10 +0000649 print_insn = print_insn_sparc;
Blue Swirlf4359b92012-09-08 12:40:00 +0000650 s.info.mach = bfd_mach_sparc_v9b;
ths5fafdf22007-09-16 21:08:06 +0000651#elif defined(__arm__)
bellardc27004e2005-01-03 23:35:10 +0000652 print_insn = print_insn_arm;
Richard Henderson110f6c72017-09-14 09:51:06 -0700653 s.info.cap_arch = CS_ARCH_ARM;
654 /* TCG only generates code for arm mode. */
bellard6af0bf92005-07-02 14:58:51 +0000655#elif defined(__MIPSEB__)
656 print_insn = print_insn_big_mips;
657#elif defined(__MIPSEL__)
658 print_insn = print_insn_little_mips;
bellard48024e42005-11-06 16:52:11 +0000659#elif defined(__m68k__)
660 print_insn = print_insn_m68k;
ths8f860bb2007-07-31 23:44:21 +0000661#elif defined(__s390__)
662 print_insn = print_insn_s390;
Richard Henderson429b31a2016-09-29 10:55:53 -0700663#elif defined(__hppa__)
664 print_insn = print_insn_hppa;
bellardb9adb4a2003-04-29 20:41:16 +0000665#endif
Richard Henderson8ca80762017-09-14 09:41:12 -0700666
667 if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
668 return;
669 }
670
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700671 if (print_insn == NULL) {
672 print_insn = print_insn_od_host;
673 }
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200674 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
675 fprintf(out, "0x%08" PRIxPTR ": ", pc);
Blue Swirlf4359b92012-09-08 12:40:00 +0000676 count = print_insn(pc, &s.info);
bellardb9adb4a2003-04-29 20:41:16 +0000677 fprintf(out, "\n");
678 if (count < 0)
679 break;
680 }
681}
682
683/* Look up symbol for debugging purpose. Returns "" if unknown. */
bellardc27004e2005-01-03 23:35:10 +0000684const char *lookup_symbol(target_ulong orig_addr)
bellardb9adb4a2003-04-29 20:41:16 +0000685{
pbrook49918a72008-10-22 15:11:31 +0000686 const char *symbol = "";
bellarde80cfcf2004-12-19 23:18:01 +0000687 struct syminfo *s;
ths3b46e622007-09-17 08:09:54 +0000688
bellarde80cfcf2004-12-19 23:18:01 +0000689 for (s = syminfos; s; s = s->next) {
pbrook49918a72008-10-22 15:11:31 +0000690 symbol = s->lookup_symbol(s, orig_addr);
691 if (symbol[0] != '\0') {
692 break;
693 }
bellardb9adb4a2003-04-29 20:41:16 +0000694 }
pbrook49918a72008-10-22 15:11:31 +0000695
696 return symbol;
bellardb9adb4a2003-04-29 20:41:16 +0000697}
bellard9307c4c2004-04-04 12:57:25 +0000698
699#if !defined(CONFIG_USER_ONLY)
700
Paolo Bonzini83c90892012-12-17 18:19:49 +0100701#include "monitor/monitor.h"
bellard3d2cfdf2004-08-01 21:49:07 +0000702
bellard9307c4c2004-04-04 12:57:25 +0000703static int
Richard Hendersonb8d87202017-09-19 09:40:40 -0500704physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
blueswir1a5f1b962008-08-17 20:21:51 +0000705 struct disassemble_info *info)
bellard9307c4c2004-04-04 12:57:25 +0000706{
Peter Maydellf2c6abc2018-12-14 13:30:49 +0000707 CPUDebug *s = container_of(info, CPUDebug, info);
708
709 address_space_read(s->cpu->as, memaddr, MEMTXATTRS_UNSPECIFIED,
710 myaddr, length);
bellard9307c4c2004-04-04 12:57:25 +0000711 return 0;
712}
713
Richard Henderson1d484742017-09-14 08:38:35 -0700714/* Disassembler for the monitor. */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700715void monitor_disas(Monitor *mon, CPUState *cpu,
Richard Henderson1d484742017-09-14 08:38:35 -0700716 target_ulong pc, int nb_insn, int is_physical)
bellard9307c4c2004-04-04 12:57:25 +0000717{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700718 CPUClass *cc = CPU_GET_CLASS(cpu);
bellard9307c4c2004-04-04 12:57:25 +0000719 int count, i;
Blue Swirlf4359b92012-09-08 12:40:00 +0000720 CPUDebug s;
bellard9307c4c2004-04-04 12:57:25 +0000721
Markus Armbruster30cc9832019-04-17 21:18:03 +0200722 INIT_DISASSEMBLE_INFO(s.info, NULL, qemu_fprintf);
bellard9307c4c2004-04-04 12:57:25 +0000723
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700724 s.cpu = cpu;
Richard Hendersonb8d87202017-09-19 09:40:40 -0500725 s.info.read_memory_func
726 = (is_physical ? physical_read_memory : target_read_memory);
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700727 s.info.print_address_func = generic_print_address;
Blue Swirlf4359b92012-09-08 12:40:00 +0000728 s.info.buffer_vma = pc;
Richard Henderson8ca80762017-09-14 09:41:12 -0700729 s.info.cap_arch = -1;
730 s.info.cap_mode = 0;
Richard Henderson15fa1a02017-11-07 13:19:18 +0100731 s.info.cap_insn_unit = 4;
732 s.info.cap_insn_split = 4;
bellard9307c4c2004-04-04 12:57:25 +0000733
734#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000735 s.info.endian = BFD_ENDIAN_BIG;
bellard9307c4c2004-04-04 12:57:25 +0000736#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000737 s.info.endian = BFD_ENDIAN_LITTLE;
bellard9307c4c2004-04-04 12:57:25 +0000738#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700739
740 if (cc->disas_set_info) {
741 cc->disas_set_info(cpu, &s.info);
742 }
743
Richard Henderson8ca80762017-09-14 09:41:12 -0700744 if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {
745 return;
746 }
747
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700748 if (!s.info.print_insn) {
749 monitor_printf(mon, "0x" TARGET_FMT_lx
750 ": Asm output not supported on this arch\n", pc);
751 return;
752 }
bellard9307c4c2004-04-04 12:57:25 +0000753
754 for(i = 0; i < nb_insn; i++) {
aliguori376253e2009-03-05 23:01:23 +0000755 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700756 count = s.info.print_insn(pc, &s.info);
aliguori376253e2009-03-05 23:01:23 +0000757 monitor_printf(mon, "\n");
bellard9307c4c2004-04-04 12:57:25 +0000758 if (count < 0)
759 break;
760 pc += count;
761 }
762}
763#endif